3 files changed, 14 insertions, 3 deletions
diff --git a/gcc-4.8/gcc/config/tilepro/tilepro-c.c b/gcc-4.8/gcc/config/tilepro/tilepro-c.c
index 8f7aa00d7..b9bf24ab2 100644
--- a/gcc-4.8/gcc/config/tilepro/tilepro-c.c
+++ b/gcc-4.8/gcc/config/tilepro/tilepro-c.c
@@ -44,6 +44,11 @@ tilepro_cpu_cpp_builtins (struct cpp_reader *pfile)
   builtin_define ("__tile_chip__=1");
   builtin_define ("__tile_chip_rev__=0");
 
+  builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+  builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+  builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+  builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+
   TILEPRO_CPU_CPP_ENDIAN_BUILTINS ();
   GNU_USER_TARGET_OS_CPP_BUILTINS ();
 }
diff --git a/gcc-4.8/gcc/config/tilepro/tilepro.c b/gcc-4.8/gcc/config/tilepro/tilepro.c
index 59618e438..957146dd5 100644
--- a/gcc-4.8/gcc/config/tilepro/tilepro.c
+++ b/gcc-4.8/gcc/config/tilepro/tilepro.c
@@ -3167,6 +3167,12 @@ tilepro_expand_builtin (tree exp,
     }
   if (!pat)
     return NULL_RTX;
+
+  /* If we are generating a prefetch, tell the scheduler not to move
+     it around.  */
+  if (GET_CODE (pat) == PREFETCH)
+    PREFETCH_SCHEDULE_BARRIER_P (pat) = true;
+
   emit_insn (pat);
 
   if (nonvoid)
diff --git a/gcc-4.8/gcc/config/tilepro/tilepro.md b/gcc-4.8/gcc/config/tilepro/tilepro.md
index ca8cf80ca..ba9bc76d4 100644
--- a/gcc-4.8/gcc/config/tilepro/tilepro.md
+++ b/gcc-4.8/gcc/config/tilepro/tilepro.md
@@ -795,7 +795,7 @@
 
 (define_expand "ctzdi2"
   [(set (match_operand:DI 0 "register_operand" "")
-	(ctz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]
+	(ctz:DI (match_operand:DI 1 "register_operand" "")))]
   ""
 {
   rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, result;
@@ -823,7 +823,7 @@
 
 (define_expand "clzdi2"
   [(set (match_operand:DI 0 "register_operand" "")
-	(clz:DI (match_operand:DI 1 "reg_or_0_operand" "")))]
+	(clz:DI (match_operand:DI 1 "register_operand" "")))]
   ""
 {
   rtx lo, hi, clz_lo, clz_hi, clz_lo_plus_32, result;
@@ -851,7 +851,7 @@
 
 (define_expand "ffsdi2"
   [(set (match_operand:DI 0 "register_operand" "")
-	(ffs:DI (match_operand:DI 1 "reg_or_0_operand" "")))]
+	(ffs:DI (match_operand:DI 1 "register_operand" "")))]
   ""
 {
   rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, ctz, ctz_plus_1,ctz_cond;