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-rw-r--r--gcc-4.8/gcc/config/tilegx/sync.md11
-rw-r--r--gcc-4.8/gcc/config/tilegx/tilegx-c.c3
-rw-r--r--gcc-4.8/gcc/config/tilegx/tilegx.c37
-rw-r--r--gcc-4.8/gcc/config/tilegx/tilegx.md6
4 files changed, 49 insertions, 8 deletions
diff --git a/gcc-4.8/gcc/config/tilegx/sync.md b/gcc-4.8/gcc/config/tilegx/sync.md
index a4bea6b68..16f18922f 100644
--- a/gcc-4.8/gcc/config/tilegx/sync.md
+++ b/gcc-4.8/gcc/config/tilegx/sync.md
@@ -150,15 +150,22 @@
(match_operand:SI 3 "const_int_operand" "")] ;; model
""
{
+ rtx addend;
enum memmodel model = (enum memmodel) INTVAL (operands[3]);
if (operands[2] != const0_rtx)
- emit_move_insn (operands[2], gen_rtx_NEG (<MODE>mode, operands[2]));
+ {
+ addend = gen_reg_rtx (<MODE>mode);
+ emit_move_insn (addend,
+ gen_rtx_MINUS (<MODE>mode, const0_rtx, operands[2]));
+ }
+ else
+ addend = operands[2];
tilegx_pre_atomic_barrier (model);
emit_insn (gen_atomic_fetch_add_bare<mode> (operands[0],
operands[1],
- operands[2]));
+ addend));
tilegx_post_atomic_barrier (model);
DONE;
})
diff --git a/gcc-4.8/gcc/config/tilegx/tilegx-c.c b/gcc-4.8/gcc/config/tilegx/tilegx-c.c
index 3ecec6e04..8d19d20f7 100644
--- a/gcc-4.8/gcc/config/tilegx/tilegx-c.c
+++ b/gcc-4.8/gcc/config/tilegx/tilegx-c.c
@@ -47,6 +47,9 @@ tilegx_cpu_cpp_builtins (struct cpp_reader *pfile)
if (TARGET_32BIT)
builtin_define ("__tilegx32__");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+
TILEGX_CPU_CPP_ENDIAN_BUILTINS ();
GNU_USER_TARGET_OS_CPP_BUILTINS ();
}
diff --git a/gcc-4.8/gcc/config/tilegx/tilegx.c b/gcc-4.8/gcc/config/tilegx/tilegx.c
index beb1012cf..502b953cf 100644
--- a/gcc-4.8/gcc/config/tilegx/tilegx.c
+++ b/gcc-4.8/gcc/config/tilegx/tilegx.c
@@ -702,6 +702,16 @@ tilegx_init_expanders (void)
}
+/* Implement TARGET_EXPAND_TO_RTL_HOOK. */
+static void
+tilegx_expand_to_rtl_hook (void)
+{
+ /* Exclude earlier sets of crtl->uses_pic_offset_table, because we
+ only care about uses actually emitted. */
+ crtl->uses_pic_offset_table = 0;
+}
+
+
/* Implement TARGET_SHIFT_TRUNCATION_MASK. DImode shifts use the mode
matching insns and therefore guarantee that the shift count is
modulo 64. SImode shifts sometimes use the 64 bit version so do
@@ -3543,6 +3553,12 @@ tilegx_expand_builtin (tree exp,
}
if (!pat)
return NULL_RTX;
+
+ /* If we are generating a prefetch, tell the scheduler not to move
+ it around. */
+ if (GET_CODE (pat) == PREFETCH)
+ PREFETCH_SCHEDULE_BARRIER_P (pat) = true;
+
emit_insn (pat);
if (nonvoid)
@@ -4368,10 +4384,12 @@ tilegx_gen_bundles (void)
basic_block bb;
FOR_EACH_BB (bb)
{
- rtx insn, next;
+ rtx insn, next, prev;
rtx end = NEXT_INSN (BB_END (bb));
- for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next)
+ prev = NULL_RTX;
+ for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn;
+ prev = insn, insn = next)
{
next = next_insn_to_bundle (NEXT_INSN (insn), end);
@@ -4396,6 +4414,18 @@ tilegx_gen_bundles (void)
PUT_MODE (insn, SImode);
}
}
+
+ /* Delete barrier insns, because they can mess up the
+ emitting of bundle braces. If it is end-of-bundle, then
+ the previous insn must be marked end-of-bundle. */
+ if (get_attr_type (insn) == TYPE_NOTHING) {
+ if (GET_MODE (insn) == QImode && prev != NULL
+ && GET_MODE (prev) == SImode)
+ {
+ PUT_MODE (prev, QImode);
+ }
+ delete_insn (insn);
+ }
}
}
}
@@ -5498,6 +5528,9 @@ tilegx_file_end (void)
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS tilegx_rtx_costs
+#undef TARGET_EXPAND_TO_RTL_HOOK
+#define TARGET_EXPAND_TO_RTL_HOOK tilegx_expand_to_rtl_hook
+
#undef TARGET_SHIFT_TRUNCATION_MASK
#define TARGET_SHIFT_TRUNCATION_MASK tilegx_shift_truncation_mask
diff --git a/gcc-4.8/gcc/config/tilegx/tilegx.md b/gcc-4.8/gcc/config/tilegx/tilegx.md
index 8dfcff603..5fe177619 100644
--- a/gcc-4.8/gcc/config/tilegx/tilegx.md
+++ b/gcc-4.8/gcc/config/tilegx/tilegx.md
@@ -5076,10 +5076,8 @@
;; Network intrinsics
-;; Note the "pseudo" text is handled specially by the
-;; asm_output_opcode routine. If the output is an empty string, the
-;; instruction would bypass the asm_output_opcode routine, bypassing
-;; the bundle handling code.
+;; Note the this barrier is of type "nothing," which is deleted after
+;; the final scheduling pass so that nothing is emitted for it.
(define_insn "tilegx_network_barrier"
[(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)]
""