diff options
Diffstat (limited to 'gcc-4.8/gcc/config/sparc/sync.md')
| -rw-r--r-- | gcc-4.8/gcc/config/sparc/sync.md | 32 |
1 files changed, 25 insertions, 7 deletions
diff --git a/gcc-4.8/gcc/config/sparc/sync.md b/gcc-4.8/gcc/config/sparc/sync.md index 1c1b9774b..cf909853b 100644 --- a/gcc-4.8/gcc/config/sparc/sync.md +++ b/gcc-4.8/gcc/config/sparc/sync.md @@ -161,7 +161,8 @@ (match_operand:SI 5 "const_int_operand" "") ;; is_weak (match_operand:SI 6 "const_int_operand" "") ;; mod_s (match_operand:SI 7 "const_int_operand" "")] ;; mod_f - "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)" + "(TARGET_V9 || TARGET_LEON3) + && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)" { sparc_expand_compare_and_swap (operands); DONE; @@ -176,7 +177,7 @@ [(match_operand:I48MODE 2 "register_operand" "") (match_operand:I48MODE 3 "register_operand" "")] UNSPECV_CAS))])] - "TARGET_V9" + "TARGET_V9 || TARGET_LEON3" "") (define_insn "*atomic_compare_and_swap<mode>_1" @@ -187,10 +188,27 @@ [(match_operand:I48MODE 2 "register_operand" "r") (match_operand:I48MODE 3 "register_operand" "0")] UNSPECV_CAS))] - "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)" + "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64)" "cas<modesuffix>\t%1, %2, %0" [(set_attr "type" "multi")]) +(define_insn "*atomic_compare_and_swap_leon3_1" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operand:SI 1 "mem_noofs_operand" "+w")) + (set (match_dup 1) + (unspec_volatile:SI + [(match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "register_operand" "0")] + UNSPECV_CAS))] + "TARGET_LEON3" +{ + if (TARGET_USER_MODE) + return "casa\t%1 0xa, %2, %0"; /* ASI for user data space. */ + else + return "casa\t%1 0xb, %2, %0"; /* ASI for supervisor data space. */ +} + [(set_attr "type" "multi")]) + (define_insn "*atomic_compare_and_swapdi_v8plus" [(set (match_operand:DI 0 "register_operand" "=h") (match_operand:DI 1 "mem_noofs_operand" "+w")) @@ -220,7 +238,7 @@ (match_operand:SI 1 "memory_operand" "") (match_operand:SI 2 "register_operand" "") (match_operand:SI 3 "const_int_operand" "")] - "TARGET_V8 || TARGET_V9" + "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699" { enum memmodel model = (enum memmodel) INTVAL (operands[3]); @@ -236,7 +254,7 @@ UNSPECV_SWAP)) (set (match_dup 1) (match_operand:SI 2 "register_operand" "0"))] - "TARGET_V8 || TARGET_V9" + "(TARGET_V8 || TARGET_V9) && !sparc_fix_ut699" "swap\t%1, %0" [(set_attr "type" "multi")]) @@ -244,7 +262,7 @@ [(match_operand:QI 0 "register_operand" "") (match_operand:QI 1 "memory_operand" "") (match_operand:SI 2 "const_int_operand" "")] - "" + "!sparc_fix_ut699" { enum memmodel model = (enum memmodel) INTVAL (operands[2]); rtx ret; @@ -268,6 +286,6 @@ (unspec_volatile:QI [(match_operand:QI 1 "memory_operand" "+m")] UNSPECV_LDSTUB)) (set (match_dup 1) (const_int -1))] - "" + "!sparc_fix_ut699" "ldstub\t%1, %0" [(set_attr "type" "multi")]) |