aboutsummaryrefslogtreecommitdiffstats
path: root/gcc-4.8/gcc/config/mips/mips.h
diff options
context:
space:
mode:
Diffstat (limited to 'gcc-4.8/gcc/config/mips/mips.h')
-rw-r--r--gcc-4.8/gcc/config/mips/mips.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc-4.8/gcc/config/mips/mips.h b/gcc-4.8/gcc/config/mips/mips.h
index 819571c1a..183d96d0a 100644
--- a/gcc-4.8/gcc/config/mips/mips.h
+++ b/gcc-4.8/gcc/config/mips/mips.h
@@ -946,6 +946,11 @@ struct mips_cpu_info {
|| TARGET_SMARTMIPS) \
&& !TARGET_MIPS16)
+/* ISA has the WSBH (word swap bytes within halfwords) instruction.
+ 64-bit targets also provide DSBH and DSHD. */
+#define ISA_HAS_WSBH ((ISA_MIPS32R2 || ISA_MIPS64R2) \
+ && !TARGET_MIPS16)
+
/* ISA has data prefetch instructions. This controls use of 'pref'. */
#define ISA_HAS_PREFETCH ((ISA_MIPS4 \
|| TARGET_LOONGSON_2EF \