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-rw-r--r--gcc-4.6/gcc/config/mips/mips.md4
-rw-r--r--gcc-4.6/gcc/config/mips/mips.opt2
2 files changed, 3 insertions, 3 deletions
diff --git a/gcc-4.6/gcc/config/mips/mips.md b/gcc-4.6/gcc/config/mips/mips.md
index 3913df8dd..27ea6c155 100644
--- a/gcc-4.6/gcc/config/mips/mips.md
+++ b/gcc-4.6/gcc/config/mips/mips.md
@@ -4194,7 +4194,7 @@
[(set (match_operand:ANYF 0 "register_operand" "=f")
(mem:ANYF (plus:P (match_operand:P 1 "register_operand" "d")
(match_operand:P 2 "register_operand" "d"))))]
- "ISA_HAS_FP4"
+ "ISA_HAS_FP4 && (<MODE>mode == SFmode || TARGET_LDC1_SDC1)"
"<ANYF:loadx>\t%0,%1(%2)"
[(set_attr "type" "fpidxload")
(set_attr "mode" "<ANYF:UNITMODE>")])
@@ -4203,7 +4203,7 @@
[(set (mem:ANYF (plus:P (match_operand:P 1 "register_operand" "d")
(match_operand:P 2 "register_operand" "d")))
(match_operand:ANYF 0 "register_operand" "f"))]
- "ISA_HAS_FP4"
+ "ISA_HAS_FP4 && (<MODE>mode == SFmode || TARGET_LDC1_SDC1)"
"<ANYF:storex>\t%0,%1(%2)"
[(set_attr "type" "fpidxstore")
(set_attr "mode" "<ANYF:UNITMODE>")])
diff --git a/gcc-4.6/gcc/config/mips/mips.opt b/gcc-4.6/gcc/config/mips/mips.opt
index cb4bbbedf..bf09ef028 100644
--- a/gcc-4.6/gcc/config/mips/mips.opt
+++ b/gcc-4.6/gcc/config/mips/mips.opt
@@ -196,7 +196,7 @@ Use MIPS-3D instructions
mldc1-sdc1
Target Report Var(TARGET_LDC1_SDC1) Init(1)
-Use ldc1 and sdc1 instruction
+Use ldc1/ldxc1 and sdc1/sdxc1 instruction
mllsc
Target Report Mask(LLSC)