diff options
Diffstat (limited to 'gcc-4.4.3')
68 files changed, 617 insertions, 281 deletions
diff --git a/gcc-4.4.3/gcc/config.gcc b/gcc-4.4.3/gcc/config.gcc index 321cf5543..755b90dd0 100644 --- a/gcc-4.4.3/gcc/config.gcc +++ b/gcc-4.4.3/gcc/config.gcc @@ -515,7 +515,7 @@ case ${target} in tm_defines="$tm_defines OPTION_GLIBC=1";; esac case $target in - *-*-*android*) + *-*-*android* | *-android-linux-*) tm_defines="$tm_defines DEFAULT_LIBC=LIBC_BIONIC" ;; *-*-*uclibc*) @@ -538,7 +538,7 @@ case ${target} in esac # Enable compilation for Android by default for *android* targets. case $target in - *-*-*android*) + *-*-*android* | *-android-linux-*) tm_defines="$tm_defines ANDROID_DEFAULT=1" ;; *) @@ -1628,6 +1628,12 @@ mips*-*-linux*) # Linux MIPS, either endian. mipsisa32*) tm_defines="${tm_defines} MIPS_ISA_DEFAULT=32" esac + case ${target} in + *android*) + # Default to little-endian for MIPS Android + # tm_defines="${tm_defines} TARGET_ENDIAN_DEFAULT=0" + tmake_file="$tmake_file mips/t-linux-android" + esac test x$with_llsc != x || with_llsc=yes ;; mips*-*-openbsd*) diff --git a/gcc-4.4.3/gcc/config/arm/arm-protos.h b/gcc-4.4.3/gcc/config/arm/arm-protos.h index ee0a34393..5b94ba040 100644 --- a/gcc-4.4.3/gcc/config/arm/arm-protos.h +++ b/gcc-4.4.3/gcc/config/arm/arm-protos.h @@ -88,7 +88,7 @@ extern bool arm_cannot_force_const_mem (rtx); extern int cirrus_memory_offset (rtx); extern int arm_coproc_mem_operand (rtx, bool); -extern int neon_vector_mem_operand (rtx, bool); +extern int neon_vector_mem_operand (rtx, int); extern int neon_struct_mem_operand (rtx); extern int arm_no_early_store_addr_dep (rtx, rtx); extern int arm_no_early_alu_shift_dep (rtx, rtx); diff --git a/gcc-4.4.3/gcc/config/arm/arm.c b/gcc-4.4.3/gcc/config/arm/arm.c index 80bd3af3a..bef07e3d1 100644 --- a/gcc-4.4.3/gcc/config/arm/arm.c +++ b/gcc-4.4.3/gcc/config/arm/arm.c @@ -5133,13 +5133,25 @@ arm_legitimate_index_p (enum machine_mode mode, rtx index, RTX_CODE outer, && INTVAL (index) > -1024 && (INTVAL (index) & 3) == 0); - if (TARGET_NEON - && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))) + /* For quad modes, we restrict the constant offset to be slightly less + than what the instruction format permits. We do this because for + quad mode moves, we will actually decompose them into two separate + double-mode reads or writes. INDEX must therefore be a valid + (double-mode) offset and so should INDEX+8. */ + if (TARGET_NEON && VALID_NEON_QREG_MODE (mode)) return (code == CONST_INT && INTVAL (index) < 1016 && INTVAL (index) > -1024 && (INTVAL (index) & 3) == 0); + /* We have no such constraint on double mode offsets, so we permit the + full range of the instruction format. */ + if (TARGET_NEON && VALID_NEON_DREG_MODE (mode)) + return (code == CONST_INT + && INTVAL (index) < 1024 + && INTVAL (index) > -1024 + && (INTVAL (index) & 3) == 0); + if (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (mode)) return (code == CONST_INT && INTVAL (index) < 1024 @@ -5250,13 +5262,25 @@ thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p) && (INTVAL (index) & 3) == 0); } - if (TARGET_NEON - && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))) + /* For quad modes, we restrict the constant offset to be slightly less + than what the instruction format permits. We do this because for + quad mode moves, we will actually decompose them into two separate + double-mode reads or writes. INDEX must therefore be a valid + (double-mode) offset and so should INDEX+8. */ + if (TARGET_NEON && VALID_NEON_QREG_MODE (mode)) return (code == CONST_INT && INTVAL (index) < 1016 && INTVAL (index) > -1024 && (INTVAL (index) & 3) == 0); + /* We have no such constraint on double mode offsets, so we permit the + full range of the instruction format. */ + if (TARGET_NEON && VALID_NEON_DREG_MODE (mode)) + return (code == CONST_INT + && INTVAL (index) < 1024 + && INTVAL (index) > -1024 + && (INTVAL (index) & 3) == 0); + if (arm_address_register_rtx_p (index, strict_p) && (GET_MODE_SIZE (mode) <= 4)) return 1; @@ -8096,10 +8120,13 @@ arm_coproc_mem_operand (rtx op, bool wb) } /* Return TRUE if OP is a memory operand which we can load or store a vector - to/from. If CORE is true, we're moving from ARM registers not Neon - registers. */ + to/from. TYPE is one of the following values: + 0 - Vector load/stor (vldr) + 1 - Core registers (ldm) + 2 - Element/structure loads (vld1) + */ int -neon_vector_mem_operand (rtx op, bool core) +neon_vector_mem_operand (rtx op, int type) { rtx ind; @@ -8132,23 +8159,15 @@ neon_vector_mem_operand (rtx op, bool core) return arm_address_register_rtx_p (ind, 0); /* Allow post-increment with Neon registers. */ - if (!core && GET_CODE (ind) == POST_INC) + if (type != 1 && (GET_CODE (ind) == POST_INC || GET_CODE (ind) == PRE_DEC)) return arm_address_register_rtx_p (XEXP (ind, 0), 0); -#if 0 - /* FIXME: We can support this too if we use VLD1/VST1. */ - if (!core - && GET_CODE (ind) == POST_MODIFY - && arm_address_register_rtx_p (XEXP (ind, 0), 0) - && GET_CODE (XEXP (ind, 1)) == PLUS - && rtx_equal_p (XEXP (XEXP (ind, 1), 0), XEXP (ind, 0))) - ind = XEXP (ind, 1); -#endif + /* FIXME: vld1 allows register post-modify. */ /* Match: (plus (reg) (const)). */ - if (!core + if (type == 0 && GET_CODE (ind) == PLUS && GET_CODE (XEXP (ind, 0)) == REG && REG_MODE_OK_FOR_BASE_P (XEXP (ind, 0), VOIDmode) @@ -8218,7 +8237,7 @@ coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb) if (TARGET_NEON && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) - && neon_vector_mem_operand (x, FALSE)) + && neon_vector_mem_operand (x, 0)) return NO_REGS; if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode)) @@ -12007,7 +12026,7 @@ output_move_double (rtx *operands) } /* Output a move, load or store for quad-word vectors in ARM registers. Only - handles MEMs accepted by neon_vector_mem_operand with CORE=true. */ + handles MEMs accepted by neon_vector_mem_operand with TYPE=1. */ const char * output_move_quad (rtx *operands) @@ -12203,6 +12222,13 @@ output_move_neon (rtx *operands) ops[1] = reg; break; + case PRE_DEC: + /* FIXME: We should be using vld1/vst1 here in BE mode? */ + templ = "v%smdb%%?\t%%0!, %%h1"; + ops[0] = XEXP (addr, 0); + ops[1] = reg; + break; + case POST_MODIFY: /* FIXME: Not currently enabled in neon_vector_mem_operand. */ gcc_unreachable (); @@ -15070,6 +15096,24 @@ arm_print_operand (FILE *stream, rtx x, int code) } return; + /* Memory operand for vld1/vst1 instruction. */ + case 'A': + { + rtx addr; + bool postinc = FALSE; + gcc_assert (GET_CODE (x) == MEM); + addr = XEXP (x, 0); + if (GET_CODE (addr) == POST_INC) + { + postinc = 1; + addr = XEXP (addr, 0); + } + asm_fprintf (stream, "[%r]", REGNO (addr)); + if (postinc) + fputs("!", stream); + } + return; + default: if (x == 0) { @@ -18482,8 +18526,8 @@ thumb_far_jump_used_p (void) /* In reload pass we haven't got the exact jump instruction length, but we can get a reasonable estimation based on the maximum - possible function length. */ - if (!reload_completed) + possible function length. */ + if (optimize && !reload_completed) { int function_length = estimate_function_length(); if (function_length < SHORTEST_FAR_JUMP_LENGTH) @@ -20905,6 +20949,18 @@ arm_mangle_type (const_tree type) if (TARGET_AAPCS_BASED && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) { + /* Disable this obsolete warning for Android, because none of the exposed APIs + by NDK is impacted by this change of ARM ABI. This warning can be triggered + very easily by compiling the following code using arm-linux-androideabi-g++: + + typedef __builtin_va_list __gnuc_va_list; + typedef __gnuc_va_list va_list; + void foo(va_list v) { } + + We could advise developer to add "-Wno-psabi", but doing so also categorically + deny other cases guarded by "warn_psabi". Hence the decision to disable it + case by case here. + static bool warned; if (!warned && warn_psabi) { @@ -20912,6 +20968,7 @@ arm_mangle_type (const_tree type) inform (input_location, "the mangling of %<va_list%> has changed in GCC 4.4"); } + */ return "St9__va_list"; } diff --git a/gcc-4.4.3/gcc/config/arm/arm_neon.h b/gcc-4.4.3/gcc/config/arm/arm_neon.h index faaaf7bca..ccfc74260 100644 --- a/gcc-4.4.3/gcc/config/arm/arm_neon.h +++ b/gcc-4.4.3/gcc/config/arm/arm_neon.h @@ -61,7 +61,7 @@ typedef __builtin_neon_uhi uint16x8_t __attribute__ ((__vector_size__ (16))); typedef __builtin_neon_usi uint32x4_t __attribute__ ((__vector_size__ (16))); typedef __builtin_neon_udi uint64x2_t __attribute__ ((__vector_size__ (16))); -typedef __builtin_neon_sf float32_t; +typedef float float32_t; typedef __builtin_neon_poly8 poly8_t; typedef __builtin_neon_poly16 poly16_t; @@ -5085,7 +5085,7 @@ vset_lane_s32 (int32_t __a, int32x2_t __b, const int __c) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vset_lane_f32 (float32_t __a, float32x2_t __b, const int __c) { - return (float32x2_t)__builtin_neon_vset_lanev2sf (__a, __b, __c); + return (float32x2_t)__builtin_neon_vset_lanev2sf ((__builtin_neon_sf) __a, __b, __c); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -5151,7 +5151,7 @@ vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __c) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __c) { - return (float32x4_t)__builtin_neon_vset_lanev4sf (__a, __b, __c); + return (float32x4_t)__builtin_neon_vset_lanev4sf ((__builtin_neon_sf) __a, __b, __c); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -5283,7 +5283,7 @@ vdup_n_s32 (int32_t __a) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vdup_n_f32 (float32_t __a) { - return (float32x2_t)__builtin_neon_vdup_nv2sf (__a); + return (float32x2_t)__builtin_neon_vdup_nv2sf ((__builtin_neon_sf) __a); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -5349,7 +5349,7 @@ vdupq_n_s32 (int32_t __a) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vdupq_n_f32 (float32_t __a) { - return (float32x4_t)__builtin_neon_vdup_nv4sf (__a); + return (float32x4_t)__builtin_neon_vdup_nv4sf ((__builtin_neon_sf) __a); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -5415,7 +5415,7 @@ vmov_n_s32 (int32_t __a) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vmov_n_f32 (float32_t __a) { - return (float32x2_t)__builtin_neon_vdup_nv2sf (__a); + return (float32x2_t)__builtin_neon_vdup_nv2sf ((__builtin_neon_sf) __a); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -5481,7 +5481,7 @@ vmovq_n_s32 (int32_t __a) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vmovq_n_f32 (float32_t __a) { - return (float32x4_t)__builtin_neon_vdup_nv4sf (__a); + return (float32x4_t)__builtin_neon_vdup_nv4sf ((__builtin_neon_sf) __a); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -6591,7 +6591,7 @@ vmul_n_s32 (int32x2_t __a, int32_t __b) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vmul_n_f32 (float32x2_t __a, float32_t __b) { - return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, __b, 3); + return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, (__builtin_neon_sf) __b, 3); } __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) @@ -6621,7 +6621,7 @@ vmulq_n_s32 (int32x4_t __a, int32_t __b) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vmulq_n_f32 (float32x4_t __a, float32_t __b) { - return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, __b, 3); + return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, (__builtin_neon_sf) __b, 3); } __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) @@ -6735,7 +6735,7 @@ vmla_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vmla_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c) { - return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, __c, 3); + return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, (__builtin_neon_sf) __c, 3); } __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) @@ -6765,7 +6765,7 @@ vmlaq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vmlaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c) { - return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, __c, 3); + return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, (__builtin_neon_sf) __c, 3); } __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) @@ -6831,7 +6831,7 @@ vmls_n_s32 (int32x2_t __a, int32x2_t __b, int32_t __c) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vmls_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c) { - return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, __c, 3); + return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, (__builtin_neon_sf) __c, 3); } __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) @@ -6861,7 +6861,7 @@ vmlsq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vmlsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c) { - return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, __c, 3); + return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, (__builtin_neon_sf) __c, 3); } __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) @@ -7851,7 +7851,7 @@ vld1_s64 (const int64_t * __a) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vld1_f32 (const float32_t * __a) { - return (float32x2_t)__builtin_neon_vld1v2sf (__a); + return (float32x2_t)__builtin_neon_vld1v2sf ((const __builtin_neon_sf *) __a); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -7917,7 +7917,7 @@ vld1q_s64 (const int64_t * __a) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vld1q_f32 (const float32_t * __a) { - return (float32x4_t)__builtin_neon_vld1v4sf (__a); + return (float32x4_t)__builtin_neon_vld1v4sf ((const __builtin_neon_sf *) __a); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -7977,7 +7977,7 @@ vld1_lane_s32 (const int32_t * __a, int32x2_t __b, const int __c) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vld1_lane_f32 (const float32_t * __a, float32x2_t __b, const int __c) { - return (float32x2_t)__builtin_neon_vld1_lanev2sf (__a, __b, __c); + return (float32x2_t)__builtin_neon_vld1_lanev2sf ((const __builtin_neon_sf *) __a, __b, __c); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -8043,7 +8043,7 @@ vld1q_lane_s32 (const int32_t * __a, int32x4_t __b, const int __c) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vld1q_lane_f32 (const float32_t * __a, float32x4_t __b, const int __c) { - return (float32x4_t)__builtin_neon_vld1_lanev4sf (__a, __b, __c); + return (float32x4_t)__builtin_neon_vld1_lanev4sf ((const __builtin_neon_sf *) __a, __b, __c); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -8109,7 +8109,7 @@ vld1_dup_s32 (const int32_t * __a) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) vld1_dup_f32 (const float32_t * __a) { - return (float32x2_t)__builtin_neon_vld1_dupv2sf (__a); + return (float32x2_t)__builtin_neon_vld1_dupv2sf ((const __builtin_neon_sf *) __a); } __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) @@ -8175,7 +8175,7 @@ vld1q_dup_s32 (const int32_t * __a) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) vld1q_dup_f32 (const float32_t * __a) { - return (float32x4_t)__builtin_neon_vld1_dupv4sf (__a); + return (float32x4_t)__builtin_neon_vld1_dupv4sf ((const __builtin_neon_sf *) __a); } __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) @@ -8247,7 +8247,7 @@ vst1_s64 (int64_t * __a, int64x1_t __b) __extension__ static __inline void __attribute__ ((__always_inline__)) vst1_f32 (float32_t * __a, float32x2_t __b) { - __builtin_neon_vst1v2sf (__a, __b); + __builtin_neon_vst1v2sf ((__builtin_neon_sf *) __a, __b); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -8313,7 +8313,7 @@ vst1q_s64 (int64_t * __a, int64x2_t __b) __extension__ static __inline void __attribute__ ((__always_inline__)) vst1q_f32 (float32_t * __a, float32x4_t __b) { - __builtin_neon_vst1v4sf (__a, __b); + __builtin_neon_vst1v4sf ((__builtin_neon_sf *) __a, __b); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -8373,7 +8373,7 @@ vst1_lane_s32 (int32_t * __a, int32x2_t __b, const int __c) __extension__ static __inline void __attribute__ ((__always_inline__)) vst1_lane_f32 (float32_t * __a, float32x2_t __b, const int __c) { - __builtin_neon_vst1_lanev2sf (__a, __b, __c); + __builtin_neon_vst1_lanev2sf ((__builtin_neon_sf *) __a, __b, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -8439,7 +8439,7 @@ vst1q_lane_s32 (int32_t * __a, int32x4_t __b, const int __c) __extension__ static __inline void __attribute__ ((__always_inline__)) vst1q_lane_f32 (float32_t * __a, float32x4_t __b, const int __c) { - __builtin_neon_vst1_lanev4sf (__a, __b, __c); + __builtin_neon_vst1_lanev4sf ((__builtin_neon_sf *) __a, __b, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -8512,7 +8512,7 @@ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) vld2_f32 (const float32_t * __a) { union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld2v2sf (__a); + __rv.__o = __builtin_neon_vld2v2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -8600,7 +8600,7 @@ __extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__)) vld2q_f32 (const float32_t * __a) { union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld2v4sf (__a); + __rv.__o = __builtin_neon_vld2v4sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -8676,7 +8676,7 @@ vld2_lane_f32 (const float32_t * __a, float32x2x2_t __b, const int __c) { union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b }; union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld2_lanev2sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld2_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -8748,7 +8748,7 @@ vld2q_lane_f32 (const float32_t * __a, float32x4x2_t __b, const int __c) { union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b }; union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld2_lanev4sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld2_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -8807,7 +8807,7 @@ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) vld2_dup_f32 (const float32_t * __a) { union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv; - __rv.__o = __builtin_neon_vld2_dupv2sf (__a); + __rv.__o = __builtin_neon_vld2_dupv2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -8892,7 +8892,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst2_f32 (float32_t * __a, float32x2x2_t __b) { union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b }; - __builtin_neon_vst2v2sf (__a, __bu.__o); + __builtin_neon_vst2v2sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -8969,7 +8969,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst2q_f32 (float32_t * __a, float32x4x2_t __b) { union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b }; - __builtin_neon_vst2v4sf (__a, __bu.__o); + __builtin_neon_vst2v4sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9032,7 +9032,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst2_lane_f32 (float32_t * __a, float32x2x2_t __b, const int __c) { union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b }; - __builtin_neon_vst2_lanev2sf (__a, __bu.__o, __c); + __builtin_neon_vst2_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9088,7 +9088,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst2q_lane_f32 (float32_t * __a, float32x4x2_t __b, const int __c) { union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b }; - __builtin_neon_vst2_lanev4sf (__a, __bu.__o, __c); + __builtin_neon_vst2_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9140,7 +9140,7 @@ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__)) vld3_f32 (const float32_t * __a) { union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld3v2sf (__a); + __rv.__o = __builtin_neon_vld3v2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -9228,7 +9228,7 @@ __extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__)) vld3q_f32 (const float32_t * __a) { union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld3v4sf (__a); + __rv.__o = __builtin_neon_vld3v4sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -9304,7 +9304,7 @@ vld3_lane_f32 (const float32_t * __a, float32x2x3_t __b, const int __c) { union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld3_lanev2sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld3_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -9376,7 +9376,7 @@ vld3q_lane_f32 (const float32_t * __a, float32x4x3_t __b, const int __c) { union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b }; union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld3_lanev4sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld3_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -9435,7 +9435,7 @@ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__)) vld3_dup_f32 (const float32_t * __a) { union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv; - __rv.__o = __builtin_neon_vld3_dupv2sf (__a); + __rv.__o = __builtin_neon_vld3_dupv2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -9520,7 +9520,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst3_f32 (float32_t * __a, float32x2x3_t __b) { union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; - __builtin_neon_vst3v2sf (__a, __bu.__o); + __builtin_neon_vst3v2sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9597,7 +9597,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst3q_f32 (float32_t * __a, float32x4x3_t __b) { union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b }; - __builtin_neon_vst3v4sf (__a, __bu.__o); + __builtin_neon_vst3v4sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9660,7 +9660,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst3_lane_f32 (float32_t * __a, float32x2x3_t __b, const int __c) { union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b }; - __builtin_neon_vst3_lanev2sf (__a, __bu.__o, __c); + __builtin_neon_vst3_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9716,7 +9716,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c) { union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b }; - __builtin_neon_vst3_lanev4sf (__a, __bu.__o, __c); + __builtin_neon_vst3_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -9768,7 +9768,7 @@ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__)) vld4_f32 (const float32_t * __a) { union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld4v2sf (__a); + __rv.__o = __builtin_neon_vld4v2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -9856,7 +9856,7 @@ __extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__)) vld4q_f32 (const float32_t * __a) { union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld4v4sf (__a); + __rv.__o = __builtin_neon_vld4v4sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -9932,7 +9932,7 @@ vld4_lane_f32 (const float32_t * __a, float32x2x4_t __b, const int __c) { union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b }; union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld4_lanev2sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld4_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -10004,7 +10004,7 @@ vld4q_lane_f32 (const float32_t * __a, float32x4x4_t __b, const int __c) { union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b }; union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld4_lanev4sf (__a, __bu.__o, __c); + __rv.__o = __builtin_neon_vld4_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c); return __rv.__i; } @@ -10063,7 +10063,7 @@ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__)) vld4_dup_f32 (const float32_t * __a) { union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv; - __rv.__o = __builtin_neon_vld4_dupv2sf (__a); + __rv.__o = __builtin_neon_vld4_dupv2sf ((const __builtin_neon_sf *) __a); return __rv.__i; } @@ -10148,7 +10148,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst4_f32 (float32_t * __a, float32x2x4_t __b) { union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b }; - __builtin_neon_vst4v2sf (__a, __bu.__o); + __builtin_neon_vst4v2sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -10225,7 +10225,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst4q_f32 (float32_t * __a, float32x4x4_t __b) { union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b }; - __builtin_neon_vst4v4sf (__a, __bu.__o); + __builtin_neon_vst4v4sf ((__builtin_neon_sf *) __a, __bu.__o); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -10288,7 +10288,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst4_lane_f32 (float32_t * __a, float32x2x4_t __b, const int __c) { union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b }; - __builtin_neon_vst4_lanev2sf (__a, __bu.__o, __c); + __builtin_neon_vst4_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -10344,7 +10344,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) vst4q_lane_f32 (float32_t * __a, float32x4x4_t __b, const int __c) { union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b }; - __builtin_neon_vst4_lanev4sf (__a, __bu.__o, __c); + __builtin_neon_vst4_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c); } __extension__ static __inline void __attribute__ ((__always_inline__)) diff --git a/gcc-4.4.3/gcc/config/arm/constraints.md b/gcc-4.4.3/gcc/config/arm/constraints.md index 8cab39a66..9bb29fd57 100644 --- a/gcc-4.4.3/gcc/config/arm/constraints.md +++ b/gcc-4.4.3/gcc/config/arm/constraints.md @@ -34,7 +34,7 @@ ;; in Thumb-2 state: Ps, Pt, Pw, Px ;; The following memory constraints have been used: -;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Us +;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us ;; in ARM state: Uq @@ -255,17 +255,24 @@ (define_memory_constraint "Un" "@internal + In ARM/Thumb-2 state a valid address for Neon doubleword vector + load/store instructions." + (and (match_code "mem") + (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 0)"))) + +(define_memory_constraint "Um" + "@internal In ARM/Thumb-2 state a valid address for Neon element and structure load/store instructions." (and (match_code "mem") - (match_test "TARGET_32BIT && neon_vector_mem_operand (op, FALSE)"))) + (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)"))) (define_memory_constraint "Us" "@internal In ARM/Thumb-2 state a valid address for non-offset loads/stores of quad-word values in four ARM registers." (and (match_code "mem") - (match_test "TARGET_32BIT && neon_vector_mem_operand (op, TRUE)"))) + (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 1)"))) (define_memory_constraint "Uq" "@internal diff --git a/gcc-4.4.3/gcc/config/arm/elf.h b/gcc-4.4.3/gcc/config/arm/elf.h index 7c3eddbe0..018319b07 100644 --- a/gcc-4.4.3/gcc/config/arm/elf.h +++ b/gcc-4.4.3/gcc/config/arm/elf.h @@ -52,8 +52,7 @@ #undef SUBSUBTARGET_EXTRA_SPECS #define SUBSUBTARGET_EXTRA_SPECS -#ifndef ASM_SPEC -#define ASM_SPEC "\ +#define LINUX_ASM_SPEC "\ %{mbig-endian:-EB} \ %{mlittle-endian:-EL} \ %{mcpu=*:-mcpu=%*} \ @@ -64,6 +63,9 @@ %{msoft-float:-mfloat-abi=soft} %{mhard-float:-mfloat-abi=hard} \ %{mfloat-abi=*} %{mfpu=*} \ %(subtarget_extra_asm_spec)" + +#ifndef ASM_SPEC +#define ASM_SPEC LINUX_ASM_SPEC #endif /* The ARM uses @ are a comment character so we need to redefine diff --git a/gcc-4.4.3/gcc/config/arm/lib1funcs.asm b/gcc-4.4.3/gcc/config/arm/lib1funcs.asm index e59af4d66..75d206067 100644 --- a/gcc-4.4.3/gcc/config/arm/lib1funcs.asm +++ b/gcc-4.4.3/gcc/config/arm/lib1funcs.asm @@ -1590,6 +1590,111 @@ LSYM(Lchange_\register): #endif /* L_interwork_call_via_rX */ #endif /* !__thumb2__ */ + +/* Functions to support compact pic switch tables in thumb1 state. + All these routines take an index into the table in r0. The + table is at LR & ~1 (but this must be rounded up in the case + of 32-bit entires). They are only permitted to clobber r12 + and r14 and r0 must be preserved on exit. */ +#ifdef L_thumb1_case_sqi + + .text + .align 0 + .force_thumb + .syntax unified + THUMB_FUNC_START __gnu_thumb1_case_sqi + push {r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r1, r1, #1 + ldrsb r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r1} + bx lr + SIZE (__gnu_thumb1_case_sqi) +#endif + +#ifdef L_thumb1_case_uqi + + .text + .align 0 + .force_thumb + .syntax unified + THUMB_FUNC_START __gnu_thumb1_case_uqi + push {r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r1, r1, #1 + ldrb r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r1} + bx lr + SIZE (__gnu_thumb1_case_uqi) +#endif + +#ifdef L_thumb1_case_shi + + .text + .align 0 + .force_thumb + .syntax unified + THUMB_FUNC_START __gnu_thumb1_case_shi + push {r0, r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r0, r0, #1 + lsls r1, r1, #1 + ldrsh r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r0, r1} + bx lr + SIZE (__gnu_thumb1_case_shi) +#endif + +#ifdef L_thumb1_case_uhi + + .text + .align 0 + .force_thumb + .syntax unified + THUMB_FUNC_START __gnu_thumb1_case_uhi + push {r0, r1} + mov r1, lr + lsrs r1, r1, #1 + lsls r0, r0, #1 + lsls r1, r1, #1 + ldrh r1, [r1, r0] + lsls r1, r1, #1 + add lr, lr, r1 + pop {r0, r1} + bx lr + SIZE (__gnu_thumb1_case_uhi) +#endif + +#ifdef L_thumb1_case_si + + .text + .align 0 + .force_thumb + .syntax unified + THUMB_FUNC_START __gnu_thumb1_case_si + push {r0, r1} + mov r1, lr + adds.n r1, r1, #2 /* Align to word. */ + lsrs r1, r1, #2 + lsls r0, r0, #2 + lsls r1, r1, #2 + ldr r0, [r1, r0] + adds r0, r0, r1 + mov lr, r0 + pop {r0, r1} + mov pc, lr /* We know we were called from thumb code. */ + SIZE (__gnu_thumb1_case_si) +#endif + #endif /* Arch supports thumb. */ #ifndef __symbian__ diff --git a/gcc-4.4.3/gcc/config/arm/linux-eabi.h b/gcc-4.4.3/gcc/config/arm/linux-eabi.h index 6ab0f52df..d44fcddda 100644 --- a/gcc-4.4.3/gcc/config/arm/linux-eabi.h +++ b/gcc-4.4.3/gcc/config/arm/linux-eabi.h @@ -74,11 +74,16 @@ #undef CC1_SPEC #define CC1_SPEC \ LINUX_OR_ANDROID_CC (LINUX_TARGET_CC1_SPEC, \ - LINUX_TARGET_CC1_SPEC " " ANDROID_CC1_SPEC) + LINUX_TARGET_CC1_SPEC " " ANDROID_CC1_SPEC("-fpic")) #define CC1PLUS_SPEC \ LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC) +#undef ASM_SPEC +#define ASM_SPEC \ + LINUX_OR_ANDROID_CC (LINUX_ASM_SPEC, \ + LINUX_ASM_SPEC " " ANDROID_ASM_SPEC) + #undef LIB_SPEC #define LIB_SPEC \ LINUX_OR_ANDROID_LD (LINUX_TARGET_LIB_SPEC, \ diff --git a/gcc-4.4.3/gcc/config/arm/neon-gen.ml b/gcc-4.4.3/gcc/config/arm/neon-gen.ml index 9c8e2a89b..112c8be6e 100644 --- a/gcc-4.4.3/gcc/config/arm/neon-gen.ml +++ b/gcc-4.4.3/gcc/config/arm/neon-gen.ml @@ -122,6 +122,7 @@ let rec signed_ctype = function | T_uint16 | T_int16 -> T_intHI | T_uint32 | T_int32 -> T_intSI | T_uint64 | T_int64 -> T_intDI + | T_float32 -> T_floatSF | T_poly8 -> T_intQI | T_poly16 -> T_intHI | T_arrayof (n, elt) -> T_arrayof (n, signed_ctype elt) @@ -320,7 +321,7 @@ let deftypes () = typeinfo; Format.print_newline (); (* Extra types not in <stdint.h>. *) - Format.printf "typedef __builtin_neon_sf float32_t;\n"; + Format.printf "typedef float float32_t;\n"; Format.printf "typedef __builtin_neon_poly8 poly8_t;\n"; Format.printf "typedef __builtin_neon_poly16 poly16_t;\n" diff --git a/gcc-4.4.3/gcc/config/arm/neon.md b/gcc-4.4.3/gcc/config/arm/neon.md index a3d3e73d2..01d84d814 100644 --- a/gcc-4.4.3/gcc/config/arm/neon.md +++ b/gcc-4.4.3/gcc/config/arm/neon.md @@ -481,7 +481,7 @@ /* FIXME: If the memory layout is changed in big-endian mode, output_move_vfp below must be changed to output_move_neon (which will use the - element/structure loads/stores), and the constraint changed to 'Un' instead + element/structure loads/stores), and the constraint changed to 'Um' instead of 'Uv'. */ switch (which_alternative) diff --git a/gcc-4.4.3/gcc/config/arm/neon.ml b/gcc-4.4.3/gcc/config/arm/neon.ml index 80cc4f149..c2602207c 100644 --- a/gcc-4.4.3/gcc/config/arm/neon.ml +++ b/gcc-4.4.3/gcc/config/arm/neon.ml @@ -50,7 +50,7 @@ type vectype = T_int8x8 | T_int8x16 | T_ptrto of vectype | T_const of vectype | T_void | T_intQI | T_intHI | T_intSI - | T_intDI + | T_intDI | T_floatSF (* The meanings of the following are: TImode : "Tetra", two registers (four words). @@ -1698,6 +1698,7 @@ let string_of_vectype vt = | T_intHI -> "__builtin_neon_hi" | T_intSI -> "__builtin_neon_si" | T_intDI -> "__builtin_neon_di" + | T_floatSF -> "__builtin_neon_sf" | T_arrayof (num, base) -> let basename = name (fun x -> x) base in affix (Printf.sprintf "%sx%d" basename num) diff --git a/gcc-4.4.3/gcc/config/arm/t-arm b/gcc-4.4.3/gcc/config/arm/t-arm index 96e4e49a7..82bd4459a 100644 --- a/gcc-4.4.3/gcc/config/arm/t-arm +++ b/gcc-4.4.3/gcc/config/arm/t-arm @@ -15,6 +15,9 @@ MD_INCLUDES= $(srcdir)/config/arm/arm-tune.md \ $(srcdir)/config/arm/neon.md \ $(srcdir)/config/arm/thumb2.md +LIB1ASMSRC = arm/lib1funcs.asm +LIB1ASMFUNCS = _thumb1_case_sqi _thumb1_case_uqi _thumb1_case_shi \ + _thumb1_case_uhi _thumb1_case_si s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \ s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES) diff --git a/gcc-4.4.3/gcc/config/arm/t-arm-coff b/gcc-4.4.3/gcc/config/arm/t-arm-coff index 04880833e..156be670f 100644 --- a/gcc-4.4.3/gcc/config/arm/t-arm-coff +++ b/gcc-4.4.3/gcc/config/arm/t-arm-coff @@ -1,5 +1,4 @@ -LIB1ASMSRC = arm/lib1funcs.asm -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 # We want fine grained libraries, so use the new code to build the # floating point emulation libraries. diff --git a/gcc-4.4.3/gcc/config/arm/t-arm-elf b/gcc-4.4.3/gcc/config/arm/t-arm-elf index 5b812b750..3a0ebc3c5 100644 --- a/gcc-4.4.3/gcc/config/arm/t-arm-elf +++ b/gcc-4.4.3/gcc/config/arm/t-arm-elf @@ -1,9 +1,8 @@ -LIB1ASMSRC = arm/lib1funcs.asm # For most CPUs we have an assembly soft-float implementations. # However this is not true for ARMv6M. Here we want to use the soft-fp C # implementation. The soft-fp code is only build for ARMv6M. This pulls # in the asm implementation for other CPUs. -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ _call_via_rX _interwork_call_via_rX \ _lshrdi3 _ashrdi3 _ashldi3 \ _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \ diff --git a/gcc-4.4.3/gcc/config/arm/t-pe b/gcc-4.4.3/gcc/config/arm/t-pe index abd9b39a0..0ae1cdda3 100644 --- a/gcc-4.4.3/gcc/config/arm/t-pe +++ b/gcc-4.4.3/gcc/config/arm/t-pe @@ -1,5 +1,4 @@ -LIB1ASMSRC = arm/lib1funcs.asm -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX \ +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX \ _interwork_call_via_rX _clzsi2 _clzdi2 _muldi3 # We want fine grained libraries, so use the new code to build the diff --git a/gcc-4.4.3/gcc/config/arm/t-strongarm-elf b/gcc-4.4.3/gcc/config/arm/t-strongarm-elf index efd07dd77..8dc0014ba 100644 --- a/gcc-4.4.3/gcc/config/arm/t-strongarm-elf +++ b/gcc-4.4.3/gcc/config/arm/t-strongarm-elf @@ -1,5 +1,4 @@ -LIB1ASMSRC = arm/lib1funcs.asm -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 \ +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 \ _clzdi2 _muldi3 # We want fine grained libraries, so use the new code to build the diff --git a/gcc-4.4.3/gcc/config/arm/t-symbian b/gcc-4.4.3/gcc/config/arm/t-symbian index fdd2b7533..6a204642b 100644 --- a/gcc-4.4.3/gcc/config/arm/t-symbian +++ b/gcc-4.4.3/gcc/config/arm/t-symbian @@ -1,4 +1,4 @@ -LIB1ASMFUNCS = _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 \ +LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 \ _muldi3 # These functions have __aeabi equivalents and will never be called by GCC. diff --git a/gcc-4.4.3/gcc/config/arm/t-vxworks b/gcc-4.4.3/gcc/config/arm/t-vxworks index b3e86572c..0310759a8 100644 --- a/gcc-4.4.3/gcc/config/arm/t-vxworks +++ b/gcc-4.4.3/gcc/config/arm/t-vxworks @@ -1,5 +1,4 @@ -LIB1ASMSRC = arm/lib1funcs.asm -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _muldi3 # We want fine grained libraries, so use the new code to build the diff --git a/gcc-4.4.3/gcc/config/arm/t-wince-pe b/gcc-4.4.3/gcc/config/arm/t-wince-pe index 9196e5e5d..31233337a 100644 --- a/gcc-4.4.3/gcc/config/arm/t-wince-pe +++ b/gcc-4.4.3/gcc/config/arm/t-wince-pe @@ -1,5 +1,4 @@ -LIB1ASMSRC = arm/lib1funcs.asm -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX \ +LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX \ _interwork_call_via_rX _clzsi2 _clzdi2 _muldi3 # We want fine grained libraries, so use the new code to build the diff --git a/gcc-4.4.3/gcc/config/i386/i386.c b/gcc-4.4.3/gcc/config/i386/i386.c index b237ed869..2ca822040 100644 --- a/gcc-4.4.3/gcc/config/i386/i386.c +++ b/gcc-4.4.3/gcc/config/i386/i386.c @@ -1810,6 +1810,9 @@ extern int ix86_force_align_arg_pointer; static const char ix86_force_align_arg_pointer_string[] = "force_align_arg_pointer"; +/* Stack protector option. */ +enum stack_protector_guard ix86_stack_protector_guard; + static rtx (*ix86_gen_leave) (void); static rtx (*ix86_gen_pop1) (rtx); static rtx (*ix86_gen_add3) (rtx, rtx, rtx); @@ -3435,6 +3438,22 @@ override_options (bool main_args_p) flag_stack_check = 0; target_flags |= MASK_STACK_PROBE; } + + /* Handle stack protector */ + if (ix86_stack_protector_guard_string != 0) + { + if (!strcmp (ix86_stack_protector_guard_string, "tls")) + ix86_stack_protector_guard = SSP_TLS; + else if (!strcmp (ix86_stack_protector_guard_string, "global")) + ix86_stack_protector_guard = SSP_GLOBAL; + else + error ("bad value (%s) for %sstack-protector-guard=%s %s", + ix86_stack_protector_guard, prefix, suffix, sw); + } + else + { + ix86_stack_protector_guard = TARGET_HAS_BIONIC? SSP_GLOBAL : SSP_TLS; + } } /* Update register usage after having seen the compiler flags. */ @@ -29392,7 +29411,7 @@ static bool ix86_scalar_mode_supported_p (enum machine_mode mode) { if (DECIMAL_FLOAT_MODE_P (mode)) - return true; + return default_decimal_float_supported_p (); else if (mode == TFmode) return true; else diff --git a/gcc-4.4.3/gcc/config/i386/i386.h b/gcc-4.4.3/gcc/config/i386/i386.h index d7cb8ac3c..d611fe632 100644 --- a/gcc-4.4.3/gcc/config/i386/i386.h +++ b/gcc-4.4.3/gcc/config/i386/i386.h @@ -2517,6 +2517,13 @@ struct machine_function GTY(()) #undef TARG_COND_NOT_TAKEN_BRANCH_COST #define TARG_COND_NOT_TAKEN_BRANCH_COST ix86_cost->cond_not_taken_branch_cost +enum stack_protector_guard { + SSP_TLS, /* per-thread canary at %gs:20 */ + SSP_GLOBAL, /* global canary */ +}; + +extern enum stack_protector_guard ix86_stack_protector_guard; + /* Local variables: version-control: t diff --git a/gcc-4.4.3/gcc/config/i386/i386.md b/gcc-4.4.3/gcc/config/i386/i386.md index 7989c31db..a1d7bcba2 100644 --- a/gcc-4.4.3/gcc/config/i386/i386.md +++ b/gcc-4.4.3/gcc/config/i386/i386.md @@ -21926,7 +21926,7 @@ (define_expand "stack_protect_set" [(match_operand 0 "memory_operand" "") (match_operand 1 "memory_operand" "")] - "" + "ix86_stack_protector_guard == SSP_TLS" { #ifdef TARGET_THREAD_SSP_OFFSET if (TARGET_64BIT) @@ -21949,7 +21949,7 @@ (unspec:SI [(match_operand:SI 1 "memory_operand" "m")] UNSPEC_SP_SET)) (set (match_scratch:SI 2 "=&r") (const_int 0)) (clobber (reg:CC FLAGS_REG))] - "" + "ix86_stack_protector_guard == SSP_TLS" "mov{l}\t{%1, %2|%2, %1}\;mov{l}\t{%2, %0|%0, %2}\;xor{l}\t%2, %2" [(set_attr "type" "multi")]) @@ -21992,7 +21992,7 @@ [(match_operand 0 "memory_operand" "") (match_operand 1 "memory_operand" "") (match_operand 2 "" "")] - "" + "ix86_stack_protector_guard == SSP_TLS" { rtx flags = gen_rtx_REG (CCZmode, FLAGS_REG); ix86_compare_op0 = operands[0]; diff --git a/gcc-4.4.3/gcc/config/i386/i386.opt b/gcc-4.4.3/gcc/config/i386/i386.opt index c2562e48d..880fc98ca 100644 --- a/gcc-4.4.3/gcc/config/i386/i386.opt +++ b/gcc-4.4.3/gcc/config/i386/i386.opt @@ -362,3 +362,7 @@ Support PCLMUL built-in functions and code generation msse2avx Target Report Var(ix86_sse2avx) Encode SSE instructions with VEX prefix + +mstack-protector-guard= +Target RejectNegative Joined Var(ix86_stack_protector_guard_string) +Use given stack-protector guard diff --git a/gcc-4.4.3/gcc/config/i386/linux.h b/gcc-4.4.3/gcc/config/i386/linux.h index f3a98c26a..12451fef8 100644 --- a/gcc-4.4.3/gcc/config/i386/linux.h +++ b/gcc-4.4.3/gcc/config/i386/linux.h @@ -72,15 +72,36 @@ along with GCC; see the file COPYING3. If not see #define TARGET_OS_CPP_BUILTINS() \ do \ { \ - LINUX_TARGET_OS_CPP_BUILTINS(); \ + LINUX_TARGET_OS_CPP_BUILTINS(); \ + ANDROID_TARGET_OS_CPP_BUILTINS(); \ } \ while (0) #undef CPP_SPEC #define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}" +#define OVERRIDE_LINUX_TARGET_CC1_SPEC "%(cc1_cpu) %{profile:-p}" #undef CC1_SPEC -#define CC1_SPEC "%(cc1_cpu) %{profile:-p}" +#define CC1_SPEC \ + LINUX_OR_ANDROID_CC (OVERRIDE_LINUX_TARGET_CC1_SPEC, \ + OVERRIDE_LINUX_TARGET_CC1_SPEC \ + " -march=i686 -mtune=atom" \ + " -mstackrealign -msse3 -mfpmath=sse" \ + " -m32 -fno-short-enums" \ + " " \ + ANDROID_CC1_SPEC("-fPIC")) + +#define CC1PLUS_SPEC \ + LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC) + +#undef LIB_SPEC +#define LIB_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_TARGET_LIB_SPEC, \ + LINUX_TARGET_LIB_SPEC " " ANDROID_LIB_SPEC) + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC) /* Provide a LINK_SPEC appropriate for Linux. Here we provide support for the special GCC options -static and -shared, which allow us to @@ -108,7 +129,8 @@ along with GCC; see the file COPYING3. If not see #undef ASM_SPEC #define ASM_SPEC \ "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} --32 \ - %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}" + %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}} " \ + LINUX_OR_ANDROID_CC ("", ANDROID_ASM_SPEC) /* These may be provided by config/linux-grtev2.h. */ #ifndef LINUX_GRTE_EXTRA_SPECS @@ -121,23 +143,28 @@ along with GCC; see the file COPYING3. If not see { "link_emulation", LINK_EMULATION },\ { "dynamic_linker", LINUX_DYNAMIC_LINKER } -#undef LINK_SPEC -#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ +#define OVERRIDE_LINUX_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ %{!shared: \ %{!ibcs: \ %{!static: \ %{rdynamic:-export-dynamic} \ %{!dynamic-linker:-dynamic-linker %(dynamic_linker)}} \ %{static:-static}}}" +#undef LINK_SPEC +#define LINK_SPEC \ + LINUX_OR_ANDROID_LD (OVERRIDE_LINUX_TARGET_LINK_SPEC, \ + OVERRIDE_LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC) /* Similar to standard Linux, but adding -ffast-math support. */ -#undef ENDFILE_SPEC -#define ENDFILE_SPEC \ +#define OVERRIDE_LINUX_TARGET_ENDFILE_SPEC \ "%{ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ %{mpc32:crtprec32.o%s} \ %{mpc64:crtprec64.o%s} \ %{mpc80:crtprec80.o%s} \ %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s" +#undef ENDFILE_SPEC +#define ENDFILE_SPEC \ + LINUX_OR_ANDROID_LD (OVERRIDE_LINUX_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC) /* A C statement (sans semicolon) to output to the stdio stream FILE the assembler definition of uninitialized global DECL named diff --git a/gcc-4.4.3/gcc/config/linux-android.h b/gcc-4.4.3/gcc/config/linux-android.h index f2a3d9c6f..b5bc2bb64 100644 --- a/gcc-4.4.3/gcc/config/linux-android.h +++ b/gcc-4.4.3/gcc/config/linux-android.h @@ -39,23 +39,26 @@ "%{" NOANDROID "|tno-android-ld:" LINUX_SPEC ";:" ANDROID_SPEC "}" #define ANDROID_LINK_SPEC \ - "%{shared: -Bsymbolic}" + "%{shared: -Bsymbolic} -z noexecstack -z relro -z now" -#define ANDROID_CC1_SPEC \ +#define ANDROID_CC1_SPEC(ANDROID_PIC_DEFAULT) \ "%{!mglibc:%{!muclibc:%{!mbionic: -mbionic}}} " \ - "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC: -fPIC}}}}" + "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC: " ANDROID_PIC_DEFAULT "}}}}" #define ANDROID_CC1PLUS_SPEC \ "%{!fexceptions:%{!fno-exceptions: -fno-exceptions}} " \ "%{!frtti:%{!fno-rtti: -fno-rtti}}" +#define ANDROID_ASM_SPEC \ + "--noexecstack" + #define ANDROID_LIB_SPEC \ "%{!static: -ldl} \ %{pthread:-lc}" #define ANDROID_STARTFILE_SPEC \ "%{!shared:" \ - " %{static: crtbegin_static%O%s;: crtbegin_dynamic%O%s}}" + " %{static: crtbegin_static%O%s;: crtbegin_dynamic%O%s};: crtbegin_so%O%s}" #define ANDROID_ENDFILE_SPEC \ - "%{!shared: crtend_android%O%s}" + "%{!shared: crtend_android%O%s;: crtend_so%O%s}" diff --git a/gcc-4.4.3/gcc/config/linux.h b/gcc-4.4.3/gcc/config/linux.h index 740ddb7be..f2dc836ca 100644 --- a/gcc-4.4.3/gcc/config/linux.h +++ b/gcc-4.4.3/gcc/config/linux.h @@ -169,4 +169,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Whether we have sincos that follows the GNU extension. */ #define TARGET_HAS_SINCOS (OPTION_GLIBC) +/* Whether we have Bionic libc runtime */ +#undef TARGET_HAS_BIONIC +#define TARGET_HAS_BIONIC (OPTION_BIONIC) + #define TARGET_POSIX_IO diff --git a/gcc-4.4.3/gcc/config/mips/linux.h b/gcc-4.4.3/gcc/config/mips/linux.h index 0512ef7d1..280d6fbda 100644 --- a/gcc-4.4.3/gcc/config/mips/linux.h +++ b/gcc-4.4.3/gcc/config/mips/linux.h @@ -47,6 +47,7 @@ along with GCC; see the file COPYING3. If not see /* The GNU C++ standard library requires this. */ \ if (c_dialect_cxx ()) \ builtin_define ("_GNU_SOURCE"); \ + ANDROID_TARGET_OS_CPP_BUILTINS(); \ } while (0) #undef SUBTARGET_CPP_SPEC @@ -55,8 +56,8 @@ along with GCC; see the file COPYING3. If not see /* A standard GNU/Linux mapping. On most targets, it is included in CC1_SPEC itself by config/linux.h, but mips.h overrides CC1_SPEC and provides this hook instead. */ -#undef SUBTARGET_CC1_SPEC -#define SUBTARGET_CC1_SPEC "%{profile:-p}" +#undef LINUX_SUBTARGET_CC1_SPEC +#define LINUX_SUBTARGET_CC1_SPEC "%{profile:-p}" /* From iris5.h */ /* -G is incompatible with -KPIC which is the default, so only allow objects @@ -67,8 +68,8 @@ along with GCC; see the file COPYING3. If not see #define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1" /* Borrowed from sparc/linux.h */ -#undef LINK_SPEC -#define LINK_SPEC \ +#undef LINUX_SUBTARGET_LINK_SPEC +#define LINUX_SUBTARGET_LINK_SPEC \ "%(endian_spec) \ %{shared:-shared} \ %{!shared: \ @@ -80,7 +81,8 @@ along with GCC; see the file COPYING3. If not see #undef SUBTARGET_ASM_SPEC #define SUBTARGET_ASM_SPEC \ - "%{!mno-abicalls:%{mplt:-call_nonpic;:-KPIC}}" + "%{!mno-abicalls:%{mplt:-call_nonpic;:-KPIC}} " \ + LINUX_OR_ANDROID_CC ("", ANDROID_ASM_SPEC) /* The MIPS assembler has different syntax for .set. We set it to .dummy to trap any errors. */ @@ -103,8 +105,8 @@ along with GCC; see the file COPYING3. If not see #undef ASM_OUTPUT_REG_PUSH #undef ASM_OUTPUT_REG_POP -#undef LIB_SPEC -#define LIB_SPEC "\ +#undef LINUX_SUBTARGET_LIB_SPEC +#define LINUX_SUBTARGET_LIB_SPEC "\ %{pthread:-lpthread} \ %{shared:-lc} \ %{!shared: \ @@ -135,7 +137,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #endif #define LINUX_DRIVER_SELF_SPECS \ - NO_SHARED_SPECS \ + LINUX_OR_ANDROID_CC(NO_SHARED_SPECS, "") \ MARCH_MTUNE_NATIVE_SPECS, \ /* -mplt has no effect without -mno-shared. Simplify later \ specs handling by removing a redundant option. */ \ @@ -147,3 +149,30 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #define DRIVER_SELF_SPECS \ BASE_DRIVER_SELF_SPECS, \ LINUX_DRIVER_SELF_SPECS + +#undef LINK_SPEC +#define LINK_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_SUBTARGET_LINK_SPEC, \ + LINUX_SUBTARGET_LINK_SPEC " " ANDROID_LINK_SPEC) + +#undef SUBTARGET_CC1_SPEC +#define SUBTARGET_CC1_SPEC \ + LINUX_OR_ANDROID_CC (LINUX_SUBTARGET_CC1_SPEC, \ + LINUX_SUBTARGET_CC1_SPEC " " ANDROID_CC1_SPEC("-fpic")) + +#undef CC1PLUS_SPEC +#define CC1PLUS_SPEC \ + LINUX_OR_ANDROID_CC ("", ANDROID_CC1PLUS_SPEC) + +#undef LIB_SPEC +#define LIB_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_SUBTARGET_LIB_SPEC, \ + LINUX_SUBTARGET_LIB_SPEC " " ANDROID_LIB_SPEC) + +#undef STARTFILE_SPEC +#define STARTFILE_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_TARGET_STARTFILE_SPEC, ANDROID_STARTFILE_SPEC) + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC \ + LINUX_OR_ANDROID_LD (LINUX_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC) diff --git a/gcc-4.4.3/gcc/config/mips/mips.c b/gcc-4.4.3/gcc/config/mips/mips.c index 2c19c1c30..23dea588e 100644 --- a/gcc-4.4.3/gcc/config/mips/mips.c +++ b/gcc-4.4.3/gcc/config/mips/mips.c @@ -13345,7 +13345,10 @@ mips_reorg (void) if (mips_r10k_cache_barrier != R10K_CACHE_BARRIER_NONE) r10k_insert_cache_barriers (); if (optimize > 0 && flag_delayed_branch) - dbr_schedule (get_insns ()); + { + cleanup_barriers (); + dbr_schedule (get_insns ()); + } mips_reorg_process_insns (); if (!TARGET_MIPS16 && TARGET_EXPLICIT_RELOCS diff --git a/gcc-4.4.3/gcc/config/mips/mips.h b/gcc-4.4.3/gcc/config/mips/mips.h index bf25448fa..88f5d832e 100644 --- a/gcc-4.4.3/gcc/config/mips/mips.h +++ b/gcc-4.4.3/gcc/config/mips/mips.h @@ -835,7 +835,7 @@ enum mips_code_readable_setting { FP madd and msub instructions, and the FP recip and recip sqrt instructions. */ #define ISA_HAS_FP4 ((ISA_MIPS4 \ - || (ISA_MIPS32R2 && TARGET_FLOAT64) \ + || ISA_MIPS32R2 \ || ISA_MIPS64 \ || ISA_MIPS64R2) \ && !TARGET_MIPS16) @@ -866,10 +866,7 @@ enum mips_code_readable_setting { /* ISA has floating-point nmadd and nmsub instructions 'd = -((a * b) [+-] c)'. */ #define ISA_HAS_NMADD4_NMSUB4(MODE) \ - ((ISA_MIPS4 \ - || (ISA_MIPS32R2 && (MODE) == V2SFmode) \ - || ISA_MIPS64 \ - || ISA_MIPS64R2) \ + (ISA_HAS_FP4 \ && (!TARGET_MIPS5400 || TARGET_MAD) \ && !TARGET_MIPS16) diff --git a/gcc-4.4.3/gcc/config/mips/mips.md b/gcc-4.4.3/gcc/config/mips/mips.md index 10572743e..4182aab80 100644 --- a/gcc-4.4.3/gcc/config/mips/mips.md +++ b/gcc-4.4.3/gcc/config/mips/mips.md @@ -774,12 +774,10 @@ [(SF "!ISA_MIPS1") (DF "!ISA_MIPS1") (V2SF "TARGET_SB1")]) ;; This attribute gives the conditions under which RECIP.fmt and RSQRT.fmt -;; instructions can be used. The MIPS32 and MIPS64 ISAs say that RECIP.D -;; and RSQRT.D are unpredictable when doubles are stored in pairs of FPRs, -;; so for safety's sake, we apply this restriction to all targets. +;; instructions can be used. (define_mode_attr recip_condition [(SF "ISA_HAS_FP4") - (DF "ISA_HAS_FP4 && TARGET_FLOAT64") + (DF "ISA_HAS_FP4") (V2SF "TARGET_SB1")]) ;; This code iterator allows all branch instructions to be generated from diff --git a/gcc-4.4.3/gcc/config/mips/t-linux-android b/gcc-4.4.3/gcc/config/mips/t-linux-android new file mode 100644 index 000000000..298cad9d5 --- /dev/null +++ b/gcc-4.4.3/gcc/config/mips/t-linux-android @@ -0,0 +1,3 @@ +MULTILIB_OPTIONS = mips32r2 +MULTILIB_DIRNAMES = mips-r2 +MULTILIB_EXCLUSIONS := diff --git a/gcc-4.4.3/gcc/config/rs6000/rs6000.c b/gcc-4.4.3/gcc/config/rs6000/rs6000.c index 9c52e8cf1..89ab796b2 100644 --- a/gcc-4.4.3/gcc/config/rs6000/rs6000.c +++ b/gcc-4.4.3/gcc/config/rs6000/rs6000.c @@ -22809,7 +22809,7 @@ static bool rs6000_scalar_mode_supported_p (enum machine_mode mode) { if (DECIMAL_FLOAT_MODE_P (mode)) - return true; + return default_decimal_float_supported_p (); else return default_scalar_mode_supported_p (mode); } diff --git a/gcc-4.4.3/gcc/config/s390/s390.c b/gcc-4.4.3/gcc/config/s390/s390.c index 557838bc4..432e99568 100644 --- a/gcc-4.4.3/gcc/config/s390/s390.c +++ b/gcc-4.4.3/gcc/config/s390/s390.c @@ -377,7 +377,7 @@ static bool s390_scalar_mode_supported_p (enum machine_mode mode) { if (DECIMAL_FLOAT_MODE_P (mode)) - return true; + return default_decimal_float_supported_p (); else return default_scalar_mode_supported_p (mode); } diff --git a/gcc-4.4.3/gcc/configure b/gcc-4.4.3/gcc/configure index 8e79dc560..dd06087d5 100755 --- a/gcc-4.4.3/gcc/configure +++ b/gcc-4.4.3/gcc/configure @@ -24653,6 +24653,11 @@ else $glibc_header_dir/bits/uClibc_config.h > /dev/null; then gcc_cv_libc_provides_ssp=yes fi + # all versions of Bionic support stack protector + elif test -f $glibc_header_dir/sys/cdefs.h \ + && $EGREP '^[ ]*#[ ]*define[ ]+__BIONIC__[ ]+1' \ + $glibc_header_dir/sys/cdefs.h > /dev/null; then + gcc_cv_libc_provides_ssp=yes fi ;; *-*-gnu*) diff --git a/gcc-4.4.3/gcc/configure.ac b/gcc-4.4.3/gcc/configure.ac index e83b6cad5..523f9f432 100644 --- a/gcc-4.4.3/gcc/configure.ac +++ b/gcc-4.4.3/gcc/configure.ac @@ -3854,6 +3854,11 @@ AC_CACHE_CHECK(__stack_chk_fail in target C library, $glibc_header_dir/bits/uClibc_config.h > /dev/null; then gcc_cv_libc_provides_ssp=yes fi + # all versions of Bionic support stack protector + elif test -f $glibc_header_dir/sys/cdefs.h \ + && $EGREP '^[ ]*#[ ]*define[ ]+__BIONIC__[ ]+1' \ + $glibc_header_dir/sys/cdefs.h > /dev/null; then + gcc_cv_libc_provides_ssp=yes fi ;; *-*-gnu*) diff --git a/gcc-4.4.3/gcc/cp/call.c b/gcc-4.4.3/gcc/cp/call.c index 4eb1974c0..9a1953e8c 100644 --- a/gcc-4.4.3/gcc/cp/call.c +++ b/gcc-4.4.3/gcc/cp/call.c @@ -4948,7 +4948,8 @@ convert_arg_to_ellipsis (tree arg) promoted type before the call. */ if (TREE_CODE (TREE_TYPE (arg)) == REAL_TYPE && (TYPE_PRECISION (TREE_TYPE (arg)) - < TYPE_PRECISION (double_type_node))) + < TYPE_PRECISION (double_type_node)) + && !DECIMAL_FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (arg)))) arg = convert_to_real (double_type_node, arg); else if (INTEGRAL_OR_ENUMERATION_TYPE_P (TREE_TYPE (arg))) arg = perform_integral_promotions (arg); diff --git a/gcc-4.4.3/gcc/cp/mangle.c b/gcc-4.4.3/gcc/cp/mangle.c index 0d07082d2..c7c223913 100644 --- a/gcc-4.4.3/gcc/cp/mangle.c +++ b/gcc-4.4.3/gcc/cp/mangle.c @@ -1851,6 +1851,12 @@ write_builtin_type (tree type) write_char ('d'); else if (type == long_double_type_node) write_char ('e'); + else if (type == dfloat32_type_node) + write_string ("Df"); + else if (type == dfloat64_type_node) + write_string ("Dd"); + else if (type == dfloat128_type_node) + write_string ("De"); else gcc_unreachable (); break; diff --git a/gcc-4.4.3/gcc/cp/rtti.c b/gcc-4.4.3/gcc/cp/rtti.c index 8861934df..7ae227c2a 100644 --- a/gcc-4.4.3/gcc/cp/rtti.c +++ b/gcc-4.4.3/gcc/cp/rtti.c @@ -103,7 +103,7 @@ VEC(tree,gc) *unemitted_tinfo_decls; static GTY (()) VEC(tinfo_s,gc) *tinfo_descs; static tree ifnonnull (tree, tree); -static tree tinfo_name (tree); +static tree tinfo_name (tree, bool); static tree build_dynamic_cast_1 (tree, tree, tsubst_flags_t); static tree throw_bad_cast (void); static tree throw_bad_typeid (void); @@ -350,16 +350,30 @@ build_typeid (tree exp) return exp; } -/* Generate the NTBS name of a type. */ +/* Generate the NTBS name of a type. If MARK_PRIVATE, put a '*' in front so that + comparisons will be done by pointer rather than string comparison. */ static tree -tinfo_name (tree type) +tinfo_name (tree type, bool mark_private) { const char *name; + int length; tree name_string; name = mangle_type_string (type); - name_string = fix_string_type (build_string (strlen (name) + 1, name)); - return name_string; + length = strlen (name); + + if (mark_private) + { + /* Inject '*' at beginning of name to force pointer comparison. */ + char* buf = (char*) XALLOCAVEC (char, length + 1); + buf[0] = '*'; + memcpy (buf + 1, name, length); + name_string = build_string (length + 1, buf); + } + else + name_string = build_string (length + 1, name); + + return fix_string_type (name_string); } /* Return a VAR_DECL for the internal ABI defined type_info object for @@ -841,13 +855,12 @@ tinfo_base_init (tinfo_s *ti, tree target) tree vtable_ptr; { - tree name_name; + tree name_name, name_string; /* Generate the NTBS array variable. */ tree name_type = build_cplus_array_type (build_qualified_type (char_type_node, TYPE_QUAL_CONST), NULL_TREE); - tree name_string = tinfo_name (target); /* Determine the name of the variable -- and remember with which type it is associated. */ @@ -864,6 +877,7 @@ tinfo_base_init (tinfo_s *ti, tree target) DECL_TINFO_P (name_decl) = 1; set_linkage_according_to_type (target, name_decl); import_export_decl (name_decl); + name_string = tinfo_name (target, !TREE_PUBLIC (name_decl)); DECL_INITIAL (name_decl) = name_string; mark_used (name_decl); pushdecl_top_level_and_finish (name_decl, name_string); diff --git a/gcc-4.4.3/gcc/defaults.h b/gcc-4.4.3/gcc/defaults.h index 349c1f7a4..0004f18f4 100644 --- a/gcc-4.4.3/gcc/defaults.h +++ b/gcc-4.4.3/gcc/defaults.h @@ -823,6 +823,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_HAS_SINCOS 0 #endif +/* Determin whether the target runtime library is Bionic */ +#ifndef TARGET_HAS_BIONIC +#define TARGET_HAS_BIONIC 0 +#endif + /* Indicate that CLZ and CTZ are undefined at zero. */ #ifndef CLZ_DEFINED_VALUE_AT_ZERO #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0 diff --git a/gcc-4.4.3/gcc/testsuite/g++.dg/dg.exp b/gcc-4.4.3/gcc/testsuite/g++.dg/dg.exp index 5e493a252..de3a3382f 100644 --- a/gcc-4.4.3/gcc/testsuite/g++.dg/dg.exp +++ b/gcc-4.4.3/gcc/testsuite/g++.dg/dg.exp @@ -35,6 +35,7 @@ set tests [prune $tests $srcdir/$subdir/bprob/*] set tests [prune $tests $srcdir/$subdir/charset/*] set tests [prune $tests $srcdir/$subdir/compat/*] set tests [prune $tests $srcdir/$subdir/debug/*] +set tests [prune $tests $srcdir/$subdir/dfp/*] set tests [prune $tests $srcdir/$subdir/gcov/*] set tests [prune $tests $srcdir/$subdir/pch/*] set tests [prune $tests $srcdir/$subdir/plugin/*] diff --git a/gcc-4.4.3/gcc/testsuite/gcc.target/arm/neon-offset-1.c b/gcc-4.4.3/gcc/testsuite/gcc.target/arm/neon-offset-1.c new file mode 100644 index 000000000..91dde6a20 --- /dev/null +++ b/gcc-4.4.3/gcc/testsuite/gcc.target/arm/neon-offset-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O1" } */ +/* { dg-add-options arm_neon } */ + +#include <arm_neon.h> + +void neon_internal_error(int32x4_t *dst, char *src) +{ + *dst = *(int32x4_t *)(src+1008); +} diff --git a/gcc-4.4.3/gcc/testsuite/lib/target-supports.exp b/gcc-4.4.3/gcc/testsuite/lib/target-supports.exp index 792d0918a..b38ba0ef6 100644 --- a/gcc-4.4.3/gcc/testsuite/lib/target-supports.exp +++ b/gcc-4.4.3/gcc/testsuite/lib/target-supports.exp @@ -1215,7 +1215,7 @@ proc check_effective_target_fixed_point { } { proc check_effective_target_dfp_nocache { } { verbose "check_effective_target_dfp_nocache: compiling source" 2 set ret [check_no_compiler_messages_nocache dfp object { - _Decimal32 x; _Decimal64 y; _Decimal128 z; + float x __attribute__((mode(DD))); }] verbose "check_effective_target_dfp_nocache: returning $ret" 2 return $ret @@ -1223,7 +1223,8 @@ proc check_effective_target_dfp_nocache { } { proc check_effective_target_dfprt_nocache { } { return [check_runtime_nocache dfprt { - _Decimal32 x = 1.2df; _Decimal64 y = 2.3dd; _Decimal128 z; + typedef float d64 __attribute__((mode(DD))); + d64 x = 1.2df, y = 2.3dd, z; int main () { z = x + y; return 0; } }] } @@ -2899,7 +2900,8 @@ proc check_effective_target_pow10 { } { proc check_effective_target_hard_dfp {} { return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly { - _Decimal64 x, y, z; + typedef float d64 __attribute__((mode(DD))); + d64 x, y, z; void foo (void) { z = x + y; } }] } diff --git a/gcc-4.4.3/gcc/unwind-dw2-fde-glibc.c b/gcc-4.4.3/gcc/unwind-dw2-fde-glibc.c index 11f53dd31..bad608280 100644 --- a/gcc-4.4.3/gcc/unwind-dw2-fde-glibc.c +++ b/gcc-4.4.3/gcc/unwind-dw2-fde-glibc.c @@ -46,8 +46,10 @@ #include "gthr.h" #if !defined(inhibit_libc) && defined(HAVE_LD_EH_FRAME_HDR) \ - && (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ > 2) \ - || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 2 && defined(DT_CONFIG))) + && ((defined(__BIONIC__) && (defined(mips) || defined(__mips__))) \ + || (__GLIBC__ > 2 \ + || (__GLIBC__ == 2 && __GLIBC_MINOR__ > 2) \ + || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 2 && defined(DT_CONFIG)))) #include <link.h> diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/forward_list.h b/gcc-4.4.3/libstdc++-v3/include/bits/forward_list.h index d49eb4a06..8ec2a5d93 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/forward_list.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/forward_list.h @@ -983,7 +983,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) * function. */ void - swap(forward_list&& __list) + swap(forward_list& __list) { _Node_base::swap(this->_M_impl._M_head, __list._M_impl._M_head); } /** diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/move.h b/gcc-4.4.3/libstdc++-v3/include/bits/move.h index ef86c4d12..b82b263a6 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/move.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/move.h @@ -48,13 +48,35 @@ _GLIBCXX_BEGIN_NAMESPACE(std) template<typename _Tp> inline _Tp&& - forward(typename std::identity<_Tp>::type&& __t) + forward(typename std::remove_reference<_Tp>::type& __t) +#ifdef __clang__ + { return static_cast<_Tp&&>(__t); } +#else { return __t; } +#endif + + template<typename _Tp> + inline _Tp&& + forward(typename std::remove_reference<_Tp>::type&& __t) + { +#ifdef __clang__ + static_assert(!std::is_lvalue_reference<_Tp>::value, + "Can't instantiate this forward() with an" + " lvalue reference type."); + return static_cast<_Tp&&>(__t); +#else + return __t; +#endif + } template<typename _Tp> inline typename std::remove_reference<_Tp>::type&& move(_Tp&& __t) +#ifdef __clang__ + { return static_cast<typename std::remove_reference<_Tp>::type&&>(__t); } +#else { return __t; } +#endif _GLIBCXX_END_NAMESPACE diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/shared_ptr.h b/gcc-4.4.3/libstdc++-v3/include/bits/shared_ptr.h index a378ae01d..e8cd8ea99 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/shared_ptr.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/shared_ptr.h @@ -833,7 +833,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) { return _M_refcount._M_get_use_count(); } void - swap(__shared_ptr<_Tp, _Lp>&& __other) // never throws + swap(__shared_ptr<_Tp, _Lp>& __other) // never throws { std::swap(_M_ptr, __other._M_ptr); _M_refcount._M_swap(__other._M_refcount); @@ -943,16 +943,6 @@ _GLIBCXX_BEGIN_NAMESPACE(std) swap(__shared_ptr<_Tp, _Lp>& __a, __shared_ptr<_Tp, _Lp>& __b) { __a.swap(__b); } - template<typename _Tp, _Lock_policy _Lp> - inline void - swap(__shared_ptr<_Tp, _Lp>&& __a, __shared_ptr<_Tp, _Lp>& __b) - { __a.swap(__b); } - - template<typename _Tp, _Lock_policy _Lp> - inline void - swap(__shared_ptr<_Tp, _Lp>& __a, __shared_ptr<_Tp, _Lp>&& __b) - { __a.swap(__b); } - // 2.2.3.9 shared_ptr casts /** @warning The seemingly equivalent * <code>shared_ptr<_Tp, _Lp>(static_cast<_Tp*>(__r.get()))</code> @@ -1372,16 +1362,6 @@ _GLIBCXX_BEGIN_NAMESPACE(std) swap(shared_ptr<_Tp>& __a, shared_ptr<_Tp>& __b) { __a.swap(__b); } - template<typename _Tp> - inline void - swap(shared_ptr<_Tp>&& __a, shared_ptr<_Tp>& __b) - { __a.swap(__b); } - - template<typename _Tp> - inline void - swap(shared_ptr<_Tp>& __a, shared_ptr<_Tp>&& __b) - { __a.swap(__b); } - // 20.8.13.2.10 shared_ptr casts. template<typename _Tp, typename _Tp1> inline shared_ptr<_Tp> diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_bvector.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_bvector.h index 0e60b7f1b..87dbb0b3f 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_bvector.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_bvector.h @@ -743,11 +743,7 @@ template<typename _Alloc> } void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(vector&& __x) -#else swap(vector& __x) -#endif { std::swap(this->_M_impl._M_start, __x._M_impl._M_start); std::swap(this->_M_impl._M_finish, __x._M_impl._M_finish); diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_deque.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_deque.h index 1c20e275f..932ad7d2d 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_deque.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_deque.h @@ -1395,11 +1395,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * std::swap(d1,d2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(deque&& __x) -#else swap(deque& __x) -#endif { std::swap(this->_M_impl._M_start, __x._M_impl._M_start); std::swap(this->_M_impl._M_finish, __x._M_impl._M_finish); diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_iterator.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_iterator.h index 129552f37..645fd0f47 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_iterator.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_iterator.h @@ -913,7 +913,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) reference operator*() const - { return *_M_current; } + { return std::move(*_M_current); } pointer operator->() const diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_list.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_list.h index 66a50b81e..8206c8446 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_list.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_list.h @@ -1106,11 +1106,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(list&& __x) -#else swap(list& __x) -#endif { _List_node_base::swap(this->_M_impl._M_node, __x._M_impl._M_node); @@ -1160,6 +1156,12 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) } } +#ifdef __GXX_EXPERIMENTAL_CXX0X__ + void + splice(iterator __position, list& __x) + { splice(__position, std::move(__x)); } +#endif + /** * @brief Insert element from another %list. * @param position Iterator referencing the element to insert before. @@ -1187,6 +1189,12 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) this->_M_transfer(__position, __i, __j); } +#ifdef __GXX_EXPERIMENTAL_CXX0X__ + void + splice(iterator __position, list& __x, iterator __i) + { splice(__position, std::move(__x), __i); } +#endif + /** * @brief Insert range from another %list. * @param position Iterator referencing the element to insert before. @@ -1217,6 +1225,13 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) } } +#ifdef __GXX_EXPERIMENTAL_CXX0X__ + void + splice(iterator __position, list& __x, iterator __first, + iterator __last) + { splice(__position, std::move(__x), __first, __last); } +#endif + /** * @brief Remove all elements equal to value. * @param value The value to remove. @@ -1287,6 +1302,10 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) void #ifdef __GXX_EXPERIMENTAL_CXX0X__ merge(list&& __x); + + void + merge(list& __x) + { merge(std::move(__x)); } #else merge(list& __x); #endif @@ -1307,6 +1326,11 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) void #ifdef __GXX_EXPERIMENTAL_CXX0X__ merge(list&&, _StrictWeakOrdering); + + template<typename _StrictWeakOrdering> + void + merge(list& __l, _StrictWeakOrdering __comp) + { merge(std::move(__l), __comp); } #else merge(list&, _StrictWeakOrdering); #endif diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_map.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_map.h index 90e5239dd..c9f3e7146 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_map.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_map.h @@ -608,11 +608,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * that std::swap(m1,m2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(map&& __x) -#else swap(map& __x) -#endif { _M_t.swap(__x._M_t); } /** diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_multimap.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_multimap.h index 484537cf2..f2be4772c 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_multimap.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_multimap.h @@ -544,11 +544,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * std::swap(m1,m2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(multimap&& __x) -#else swap(multimap& __x) -#endif { _M_t.swap(__x._M_t); } /** diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_multiset.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_multiset.h index b5c710f31..9f89573ff 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_multiset.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_multiset.h @@ -376,11 +376,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * std::swap(s1,s2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(multiset&& __x) -#else swap(multiset& __x) -#endif { _M_t.swap(__x._M_t); } // insert/erase diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_pair.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_pair.h index fd395adbd..f56fec19a 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_pair.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_pair.h @@ -84,10 +84,21 @@ _GLIBCXX_BEGIN_NAMESPACE(std) : first(__a), second(__b) { } #ifdef __GXX_EXPERIMENTAL_CXX0X__ - template<class _U1, class _U2> + template<class _U1, class = typename + std::enable_if<std::is_convertible<_U1, _T1>::value>::type> + pair(_U1&& __x, const _T2& __y) + : first(std::forward<_U1>(__x)), second(__y) { } + + template<class _U2, class = typename + std::enable_if<std::is_convertible<_U2, _T2>::value>::type> + pair(const _T1& __x, _U2&& __y) + : first(__x), second(std::forward<_U2>(__y)) { } + + template<class _U1, class _U2, class = typename + std::enable_if<std::is_convertible<_U1, _T1>::value + && std::is_convertible<_U2, _T2>::value>::type> pair(_U1&& __x, _U2&& __y) - : first(std::forward<_U1>(__x)), - second(std::forward<_U2>(__y)) { } + : first(std::forward<_U1>(__x)), second(std::forward<_U2>(__y)) { } pair(pair&& __p) : first(std::move(__p.first)), @@ -107,11 +118,19 @@ _GLIBCXX_BEGIN_NAMESPACE(std) second(std::move(__p.second)) { } // http://gcc.gnu.org/ml/libstdc++/2007-08/msg00052.html + +#if 0 + // This constructor is incompatible with libstdc++-4.6, and it + // interferes with passing NULL pointers to the 2-argument + // constructors, so we disable it. map::emplace isn't + // implemented in libstdc++-4.4 anyway, and that's what this + // constructor was here for. template<class _U1, class _Arg0, class... _Args> pair(_U1&& __x, _Arg0&& __arg0, _Args&&... __args) : first(std::forward<_U1>(__x)), second(std::forward<_Arg0>(__arg0), std::forward<_Args>(__args)...) { } +#endif pair& operator=(pair&& __p) @@ -131,7 +150,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) } void - swap(pair&& __p) + swap(pair& __p) { using std::swap; swap(first, __p.first); diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_queue.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_queue.h index 7479469d1..0ebe2578d 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_queue.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_queue.h @@ -249,7 +249,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) #ifdef __GXX_EXPERIMENTAL_CXX0X__ void - swap(queue&& __q) + swap(queue& __q) { c.swap(__q.c); } #endif }; @@ -550,7 +550,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) #ifdef __GXX_EXPERIMENTAL_CXX0X__ void - swap(priority_queue&& __pq) + swap(priority_queue& __pq) { using std::swap; c.swap(__pq.c); diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_set.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_set.h index f06fe0336..d74640753 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_set.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_set.h @@ -383,11 +383,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * std::swap(s1,s2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(set&& __x) -#else swap(set& __x) -#endif { _M_t.swap(__x._M_t); } // insert/erase diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_stack.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_stack.h index da301d474..87aa718fa 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_stack.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_stack.h @@ -213,7 +213,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) #ifdef __GXX_EXPERIMENTAL_CXX0X__ void - swap(stack&& __s) + swap(stack& __s) { c.swap(__s.c); } #endif }; diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_tree.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_tree.h index e2cc1518d..7f38c55d5 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_tree.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_tree.h @@ -715,11 +715,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) { return _M_get_Node_allocator().max_size(); } void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(_Rb_tree&& __t); -#else swap(_Rb_tree& __t); -#endif // Insert/erase. pair<iterator, bool> @@ -1144,11 +1140,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) typename _Compare, typename _Alloc> void _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>:: -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(_Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>&& __t) -#else swap(_Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>& __t) -#endif { if (_M_root() == 0) { diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/stl_vector.h b/gcc-4.4.3/libstdc++-v3/include/bits/stl_vector.h index 6871bb072..363c630b2 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/stl_vector.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/stl_vector.h @@ -939,11 +939,7 @@ _GLIBCXX_BEGIN_NESTED_NAMESPACE(std, _GLIBCXX_STD_D) * std::swap(v1,v2) will feed to this function. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(vector&& __x) -#else swap(vector& __x) -#endif { std::swap(this->_M_impl._M_start, __x._M_impl._M_start); std::swap(this->_M_impl._M_finish, __x._M_impl._M_finish); diff --git a/gcc-4.4.3/libstdc++-v3/include/bits/unique_ptr.h b/gcc-4.4.3/libstdc++-v3/include/bits/unique_ptr.h index b686d11fd..c1185f242 100644 --- a/gcc-4.4.3/libstdc++-v3/include/bits/unique_ptr.h +++ b/gcc-4.4.3/libstdc++-v3/include/bits/unique_ptr.h @@ -204,7 +204,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) } void - swap(unique_ptr&& __u) + swap(unique_ptr& __u) { using std::swap; swap(_M_t, __u._M_t); @@ -350,7 +350,7 @@ _GLIBCXX_BEGIN_NAMESPACE(std) void reset(_Up) = delete; void - swap(unique_ptr&& __u) + swap(unique_ptr& __u) { using std::swap; swap(_M_t, __u._M_t); @@ -389,18 +389,6 @@ _GLIBCXX_BEGIN_NAMESPACE(std) unique_ptr<_Tp, _Tp_Deleter>& __y) { __x.swap(__y); } - template<typename _Tp, typename _Tp_Deleter> - inline void - swap(unique_ptr<_Tp, _Tp_Deleter>&& __x, - unique_ptr<_Tp, _Tp_Deleter>& __y) - { __x.swap(__y); } - - template<typename _Tp, typename _Tp_Deleter> - inline void - swap(unique_ptr<_Tp, _Tp_Deleter>& __x, - unique_ptr<_Tp, _Tp_Deleter>&& __y) - { __x.swap(__y); } - template<typename _Tp, typename _Tp_Deleter, typename _Up, typename _Up_Deleter> inline bool diff --git a/gcc-4.4.3/libstdc++-v3/include/ext/algorithm b/gcc-4.4.3/libstdc++-v3/include/ext/algorithm index 3337d6c07..4cd1dae80 100644 --- a/gcc-4.4.3/libstdc++-v3/include/ext/algorithm +++ b/gcc-4.4.3/libstdc++-v3/include/ext/algorithm @@ -423,6 +423,9 @@ _GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx) __out_last - __out_first); } +#ifdef __GXX_EXPERIMENTAL_CXX0X__ + using std::is_heap; +#else /** * This is an SGI extension. * @ingroup SGIextensions @@ -462,6 +465,7 @@ _GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx) return std::__is_heap(__first, __comp, __last - __first); } +#endif // is_sorted, a predicated testing whether a range is sorted in // nondescending order. This is an extension, not part of the C++ diff --git a/gcc-4.4.3/libstdc++-v3/include/ext/vstring.h b/gcc-4.4.3/libstdc++-v3/include/ext/vstring.h index 6377ca57d..a259d23fa 100644 --- a/gcc-4.4.3/libstdc++-v3/include/ext/vstring.h +++ b/gcc-4.4.3/libstdc++-v3/include/ext/vstring.h @@ -167,7 +167,7 @@ _GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx) * string. */ __versa_string(__versa_string&& __str) - : __vstring_base(std::forward<__vstring_base>(__str)) { } + : __vstring_base(std::move(__str)) { } /** * @brief Construct string from an initializer list. @@ -1454,11 +1454,7 @@ _GLIBCXX_BEGIN_NAMESPACE(__gnu_cxx) * constant time. */ void -#ifdef __GXX_EXPERIMENTAL_CXX0X__ - swap(__versa_string&& __s) -#else swap(__versa_string& __s) -#endif { this->_M_swap(__s); } // String operations: diff --git a/gcc-4.4.3/libstdc++-v3/include/std/tuple b/gcc-4.4.3/libstdc++-v3/include/std/tuple index c5dbe6bcc..29c39744c 100644 --- a/gcc-4.4.3/libstdc++-v3/include/std/tuple +++ b/gcc-4.4.3/libstdc++-v3/include/std/tuple @@ -77,7 +77,7 @@ namespace std _Head& _M_head() { return *this; } const _Head& _M_head() const { return *this; } - void _M_swap_impl(_Head&&) { /* no-op */ } + void _M_swap_impl(_Head&) { /* no-op */ } }; template<std::size_t _Idx, typename _Head> @@ -97,7 +97,7 @@ namespace std const _Head& _M_head() const { return _M_head_impl; } void - _M_swap_impl(_Head&& __h) + _M_swap_impl(_Head& __h) { using std::swap; swap(__h, _M_head_impl); @@ -125,7 +125,7 @@ namespace std struct _Tuple_impl<_Idx> { protected: - void _M_swap_impl(_Tuple_impl&&) { /* no-op */ } + void _M_swap_impl(_Tuple_impl&) { /* no-op */ } }; /** @@ -214,7 +214,7 @@ namespace std protected: void - _M_swap_impl(_Tuple_impl&& __in) + _M_swap_impl(_Tuple_impl& __in) { _Base::_M_swap_impl(__in._M_head()); _Inherited::_M_swap_impl(__in._M_tail()); @@ -292,7 +292,7 @@ namespace std } void - swap(tuple&& __in) + swap(tuple& __in) { _Inherited::_M_swap_impl(__in); } }; @@ -301,7 +301,7 @@ namespace std class tuple<> { public: - void swap(tuple&&) { /* no-op */ } + void swap(tuple&) { /* no-op */ } }; /// tuple (2-element), with construction and assignment from a pair. @@ -394,7 +394,7 @@ namespace std } void - swap(tuple&& __in) + swap(tuple& __in) { using std::swap; swap(this->_M_head(), __in._M_head()); diff --git a/gcc-4.4.3/libstdc++-v3/include/tr1_impl/hashtable b/gcc-4.4.3/libstdc++-v3/include/tr1_impl/hashtable index 7c9098309..bce550ff1 100644 --- a/gcc-4.4.3/libstdc++-v3/include/tr1_impl/hashtable +++ b/gcc-4.4.3/libstdc++-v3/include/tr1_impl/hashtable @@ -225,11 +225,7 @@ _GLIBCXX_BEGIN_NAMESPACE_TR1 ~_Hashtable(); -#ifdef _GLIBCXX_INCLUDE_AS_CXX0X - void swap(_Hashtable&&); -#else void swap(_Hashtable&); -#endif // Basic container operations iterator @@ -732,11 +728,7 @@ _GLIBCXX_BEGIN_NAMESPACE_TR1 void _Hashtable<_Key, _Value, _Allocator, _ExtractKey, _Equal, _H1, _H2, _Hash, _RehashPolicy, __chc, __cit, __uk>:: -#ifdef _GLIBCXX_INCLUDE_AS_CXX0X - swap(_Hashtable&& __x) -#else swap(_Hashtable& __x) -#endif { // The only base class with member variables is hash_code_base. We // define _Hash_code_base::_M_swap because different specializations diff --git a/gcc-4.4.3/libstdc++-v3/libsupc++/eh_globals.cc b/gcc-4.4.3/libstdc++-v3/libsupc++/eh_globals.cc index 63f46a99e..845b6d1ae 100644 --- a/gcc-4.4.3/libstdc++-v3/libsupc++/eh_globals.cc +++ b/gcc-4.4.3/libstdc++-v3/libsupc++/eh_globals.cc @@ -101,6 +101,14 @@ struct __eh_globals_init ~__eh_globals_init() { + /* Work-around for an Android-specific bug, where this destructor + * is called with a NULL object pointer. This is due to a bug in the + * __cxa_finalize() implementation that was only fixed in 2.2. + */ +#ifdef __ANDROID__ + if (this == NULL) + return; +#endif if (_M_init) __gthread_key_delete(_M_key); _M_init = false; diff --git a/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo.cc b/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo.cc index 1ce6f8f46..d939a3fda 100644 --- a/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo.cc +++ b/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo.cc @@ -41,7 +41,8 @@ operator== (const std::type_info& arg) const #if __GXX_MERGED_TYPEINFO_NAMES return name () == arg.name (); #else - return (&arg == this) || (__builtin_strcmp (name (), arg.name ()) == 0); + return (&arg == this) + || (name ()[0] != '*' && (__builtin_strcmp (name (), arg.name ()) == 0)); #endif } diff --git a/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo2.cc b/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo2.cc index 4b01037f3..0182c6cc0 100644 --- a/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo2.cc +++ b/gcc-4.4.3/libstdc++-v3/libsupc++/tinfo2.cc @@ -37,7 +37,8 @@ type_info::before (const type_info &arg) const #if __GXX_MERGED_TYPEINFO_NAMES return name () < arg.name (); #else - return __builtin_strcmp (name (), arg.name ()) < 0; + return (name ()[0] == '*') ? name () < arg.name () + : __builtin_strcmp (name (), arg.name ()) < 0; #endif } diff --git a/gcc-4.4.3/libstdc++-v3/libsupc++/typeinfo b/gcc-4.4.3/libstdc++-v3/libsupc++/typeinfo index eea38e70e..f7f9d4e2c 100644 --- a/gcc-4.4.3/libstdc++-v3/libsupc++/typeinfo +++ b/gcc-4.4.3/libstdc++-v3/libsupc++/typeinfo @@ -43,32 +43,29 @@ namespace __cxxabiv1 } // namespace __cxxabiv1 // Determine whether typeinfo names for the same type are merged (in which -// case comparison can just compare pointers) or not (in which case -// strings must be compared and g++.dg/abi/local1.C will fail), and -// whether comparison is to be implemented inline or not. By default we -// use inline pointer comparison if weak symbols are available, and -// out-of-line strcmp if not. Out-of-line pointer comparison is used -// where the object files are to be portable to multiple systems, some of -// which may not be able to use pointer comparison, but the particular -// system for which libstdc++ is being built can use pointer comparison; -// in particular for most ARM EABI systems, where the ABI specifies -// out-of-line comparison. Inline strcmp is not currently supported. The -// compiler's target configuration can override the defaults by defining -// __GXX_TYPEINFO_EQUALITY_INLINE to 1 or 0 to indicate whether or not -// comparison is inline, and __GXX_MERGED_TYPEINFO_NAMES to 1 or 0 to -// indicate whether or not pointer comparison can be used. +// case comparison can just compare pointers) or not (in which case strings +// must be compared), and whether comparison is to be implemented inline or +// not. We used to do inline pointer comparison by default if weak symbols +// are available, but even with weak symbols sometimes names are not merged +// when objects are loaded with RTLD_LOCAL, so now we always use strcmp by +// default. For ABI compatibility, we do the strcmp inline if weak symbols +// are available, and out-of-line if not. Out-of-line pointer comparison +// is used where the object files are to be portable to multiple systems, +// some of which may not be able to use pointer comparison, but the +// particular system for which libstdc++ is being built can use pointer +// comparison; in particular for most ARM EABI systems, where the ABI +// specifies out-of-line comparison. The compiler's target configuration +// can override the defaults by defining __GXX_TYPEINFO_EQUALITY_INLINE to +// 1 or 0 to indicate whether or not comparison is inline, and +// __GXX_MERGED_TYPEINFO_NAMES to 1 or 0 to indicate whether or not pointer +// comparison can be used. #ifndef __GXX_MERGED_TYPEINFO_NAMES - #if !__GXX_WEAK__ - // If weak symbols are not supported, typeinfo names are not merged. - #define __GXX_MERGED_TYPEINFO_NAMES 0 - #else - // On platforms that support weak symbols, typeinfo names are merged. - #define __GXX_MERGED_TYPEINFO_NAMES 1 - #endif +// By default, typeinfo names are not merged. +#define __GXX_MERGED_TYPEINFO_NAMES 0 #endif -// By default follow the same rules as for __GXX_MERGED_TYPEINFO_NAMES. +// By default follow the old inline rules to avoid ABI changes. #ifndef __GXX_TYPEINFO_EQUALITY_INLINE #if !__GXX_WEAK__ #define __GXX_TYPEINFO_EQUALITY_INLINE 0 @@ -97,28 +94,41 @@ namespace std /** Returns an @e implementation-defined byte string; this is not * portable between compilers! */ const char* name() const - { return __name; } + { return __name[0] == '*' ? __name + 1 : __name; } #if !__GXX_TYPEINFO_EQUALITY_INLINE - bool before(const type_info& __arg) const; - // In old abi, or when weak symbols are not supported, there can // be multiple instances of a type_info object for one // type. Uniqueness must use the _name value, not object address. + bool before(const type_info& __arg) const; bool operator==(const type_info& __arg) const; #else #if !__GXX_MERGED_TYPEINFO_NAMES - #error "Inline implementation of type_info comparision requires merging of type_info objects" - #endif /** Returns true if @c *this precedes @c __arg in the implementation's * collation order. */ - // In new abi we can rely on type_info's NTBS being unique, + // Even with the new abi, on systems that support dlopen + // we can run into cases where type_info names aren't merged, + // so we still need to do string comparison. + bool before(const type_info& __arg) const + { return (__name[0] == '*' && __arg.__name[0] == '*') + ? __name < __arg.__name + : __builtin_strcmp (__name, __arg.__name) < 0; } + + bool operator==(const type_info& __arg) const + { + return ((__name == __arg.__name) + || (__name[0] != '*' && + __builtin_strcmp (__name, __arg.__name) == 0)); + } + #else + // On some targets we can rely on type_info's NTBS being unique, // and therefore address comparisons are sufficient. bool before(const type_info& __arg) const { return __name < __arg.__name; } bool operator==(const type_info& __arg) const { return __name == __arg.__name; } + #endif #endif bool operator!=(const type_info& __arg) const { return !operator==(__arg); } |