diff options
Diffstat (limited to 'gcc-4.4.3/gcc/config/arm/thumb2.md')
| -rw-r--r-- | gcc-4.4.3/gcc/config/arm/thumb2.md | 57 |
1 files changed, 30 insertions, 27 deletions
diff --git a/gcc-4.4.3/gcc/config/arm/thumb2.md b/gcc-4.4.3/gcc/config/arm/thumb2.md index 2243172e6..6e03e8b21 100644 --- a/gcc-4.4.3/gcc/config/arm/thumb2.md +++ b/gcc-4.4.3/gcc/config/arm/thumb2.md @@ -943,7 +943,7 @@ (set_attr "neg_pool_range" "*,250")] ) -(define_insn "*thumb2_zero_extendqisi2_v6" +(define_insn "thumb2_zero_extendqisi2_v6" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] "TARGET_THUMB2 && arm_arch6" @@ -1006,29 +1006,6 @@ }" ) -;; Peepholes and insns for 16-bit flag clobbering instructions. -;; The conditional forms of these instructions do not clobber CC. -;; However by the time peepholes are run it is probably too late to do -;; anything useful with this information. -(define_peephole2 - [(set (match_operand:SI 0 "low_register_operand" "") - (match_operator:SI 3 "thumb_16bit_operator" - [(match_operand:SI 1 "low_register_operand" "") - (match_operand:SI 2 "low_register_operand" "")]))] - "TARGET_THUMB2 - && (rtx_equal_p(operands[0], operands[1]) - || GET_CODE(operands[3]) == PLUS - || GET_CODE(operands[3]) == MINUS) - && peep2_regno_dead_p(0, CC_REGNUM)" - [(parallel - [(set (match_dup 0) - (match_op_dup 3 - [(match_dup 1) - (match_dup 2)])) - (clobber (reg:CC CC_REGNUM))])] - "" -) - (define_insn "*thumb2_alusi3_short" [(set (match_operand:SI 0 "s_register_operand" "=l") (match_operator:SI 3 "thumb_16bit_operator" @@ -1124,9 +1101,9 @@ ) (define_insn "*thumb2_addsi_short" - [(set (match_operand:SI 0 "low_register_operand" "=l") - (plus:SI (match_operand:SI 1 "low_register_operand" "l") - (match_operand:SI 2 "low_reg_or_int_operand" "lIL"))) + [(set (match_operand:SI 0 "low_register_operand" "=l,l") + (plus:SI (match_operand:SI 1 "low_register_operand" "l,0") + (match_operand:SI 2 "low_reg_or_int_operand" "lPt,Ps"))) (clobber (reg:CC CC_REGNUM))] "TARGET_THUMB2 && reload_completed" "* @@ -1178,6 +1155,32 @@ (set_attr "length" "2")] ) +(define_peephole2 + [(set (match_operand:CC 0 "cc_register" "") + (compare:CC (match_operand:SI 1 "low_register_operand" "") + (match_operand:SI 2 "const_int_operand" "")))] + "TARGET_THUMB2 + && peep2_reg_dead_p (1, operands[1]) + && satisfies_constraint_Pw (operands[2])" + [(parallel + [(set (match_dup 0) (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 1) (plus:SI (match_dup 1) (match_dup 3)))])] + "operands[3] = GEN_INT (- INTVAL (operands[2]));" +) + +(define_peephole2 + [(match_scratch:SI 3 "l") + (set (match_operand:CC 0 "cc_register" "") + (compare:CC (match_operand:SI 1 "low_register_operand" "") + (match_operand:SI 2 "const_int_operand" "")))] + "TARGET_THUMB2 + && satisfies_constraint_Px (operands[2])" + [(parallel + [(set (match_dup 0) (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 3) (plus:SI (match_dup 1) (match_dup 4)))])] + "operands[4] = GEN_INT (- INTVAL (operands[2]));" +) + (define_insn "*thumb2_cbz" [(set (pc) (if_then_else (eq (match_operand:SI 0 "s_register_operand" "l,?r") |