diff options
-rwxr-xr-x | build-gcc.sh | 576 | ||||
-rwxr-xr-x | build.py | 142 | ||||
-rw-r--r-- | gcc-4.8/gcc/config/linux-android.h | 4 | ||||
-rw-r--r-- | gcc-4.8/libstdc++-v3/src/Makefile.in | 5 | ||||
-rw-r--r-- | gcc-4.9/ChangeLog | 24 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64-cores.def | 2 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h | 6 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64-linux.h | 7 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64-tune.md | 2 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64.c | 12 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64.md | 6 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/aarch64/aarch64.opt | 4 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/arm/cortex-a57.md | 798 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/linux-android.h | 4 | ||||
-rw-r--r-- | gcc-4.9/gcc/config/mips/t-linux-android64 | 8 | ||||
-rw-r--r-- | gcc-4.9/gcc/tree-inline.c | 8 | ||||
-rw-r--r-- | gcc-4.9/libstdc++-v3/src/Makefile.in | 5 |
17 files changed, 1592 insertions, 21 deletions
diff --git a/build-gcc.sh b/build-gcc.sh new file mode 100755 index 000000000..3dc135e91 --- /dev/null +++ b/build-gcc.sh @@ -0,0 +1,576 @@ +#!/bin/sh +# +# Copyright (C) 2010 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# This shell script is used to rebuild the gcc and toolchain binaries +# for the Android NDK. +# + +# include common function and variable definitions +. $NDK_BUILDTOOLS_PATH/prebuilt-common.sh + +PROGRAM_PARAMETERS="<src-dir> <ndk-dir> <toolchain>" + +PROGRAM_DESCRIPTION=\ +"Rebuild the gcc toolchain prebuilt binaries for the Android NDK. + +Where <src-dir> is the location of toolchain sources, <ndk-dir> is +the top-level NDK installation path and <toolchain> is the name of +the toolchain to use (e.g. arm-linux-androideabi-4.8)." + +RELEASE=`date +%Y%m%d` +BUILD_OUT=$TMPDIR/build/toolchain +OPTION_BUILD_OUT= +register_var_option "--build-out=<path>" OPTION_BUILD_OUT "Set temporary build directory" + +# Note: platform API level 9 or higher is needed for proper C++ support +register_var_option "--platform=<name>" PLATFORM "Specify platform name" + +OPTION_SYSROOT= +register_var_option "--sysroot=<path>" OPTION_SYSROOT "Specify sysroot directory directly" + +GDB_VERSION=$DEFAULT_GDB_VERSION +EXPLICIT_GDB_VERSION= +register_option "--gdb-version=<version>" do_gdb_version "Specify gdb version" "$GDB_VERSION" +do_gdb_version () { + GDB_VERSION=$1 + EXPLICIT_GDB_VERSION=true +} + +BINUTILS_VERSION=$DEFAULT_BINUTILS_VERSION +EXPLICIT_BINUTILS_VERSION= +register_option "--binutils-version=<version>" do_binutils_version "Specify binutils version" "$BINUTILS_VERSION" +do_binutils_version () { + BINUTILS_VERSION=$1 + EXPLICIT_BINUTILS_VERSION=true +} + +GMP_VERSION=$DEFAULT_GMP_VERSION +register_var_option "--gmp-version=<version>" GMP_VERSION "Specify gmp version" + +MPFR_VERSION=$DEFAULT_MPFR_VERSION +register_var_option "--mpfr-version=<version>" MPFR_VERSION "Specify mpfr version" + +MPC_VERSION=$DEFAULT_MPC_VERSION +register_var_option "--mpc-version=<version>" MPC_VERSION "Specify mpc version" + +CLOOG_VERSION=$DEFAULT_CLOOG_VERSION +register_var_option "--cloog-version=<version>" CLOOG_VERSION "Specify cloog version" + +ISL_VERSION=$DEFAULT_ISL_VERSION +register_var_option "--isl-version=<version>" ISL_VERSION "Specify ISL version" + +PPL_VERSION=$DEFAULT_PPL_VERSION +register_var_option "--ppl-version=<version>" PPL_VERSION "Specify ppl version" + +PACKAGE_DIR= +register_var_option "--package-dir=<path>" PACKAGE_DIR "Create archive tarball in specific directory" + +ENABLE_LANGUAGES="c,c++" +register_var_option "--enable-languages=<name>" ENABLE_LANGUAGES "Experimental: specify which languages to build" + +register_jobs_option +register_canadian_option +register_try64_option + +extract_parameters "$@" + +prepare_canadian_toolchain $TMPDIR/build + +fix_option BUILD_OUT "$OPTION_BUILD_OUT" "build directory" +setup_default_log_file $BUILD_OUT/config.log + +set_parameters () +{ + SRC_DIR="$1" + NDK_DIR="$2" + TOOLCHAIN="$3" + + # Check source directory + # + if [ -z "$SRC_DIR" ] ; then + echo "ERROR: Missing source directory parameter. See --help for details." + exit 1 + fi + + if [ ! -d "$SRC_DIR/gcc" ] ; then + echo "ERROR: Source directory does not contain gcc sources: $SRC_DIR" + exit 1 + fi + SRC_DIR=`cd $SRC_DIR; pwd` + log "Using source directory: $SRC_DIR" + + # Check NDK installation directory + # + if [ -z "$NDK_DIR" ] ; then + echo "ERROR: Missing NDK directory parameter. See --help for details." + exit 1 + fi + + if [ ! -d "$NDK_DIR" ] ; then + mkdir -p $NDK_DIR + if [ $? != 0 ] ; then + echo "ERROR: Could not create target NDK installation path: $NDK_DIR" + exit 1 + fi + fi + NDK_DIR=`cd $NDK_DIR; pwd` + log "Using NDK directory: $NDK_DIR" + + # Check toolchain name + # + if [ -z "$TOOLCHAIN" ] ; then + echo "ERROR: Missing toolchain name parameter. See --help for details." + exit 1 + fi +} + +set_parameters $PARAMETERS + +prepare_target_build + +parse_toolchain_name $TOOLCHAIN + +if [ -z "$PLATFORM" ]; then + PLATFORM="android-"$(get_default_api_level_for_arch $ARCH) +fi + +fix_sysroot "$OPTION_SYSROOT" + +check_toolchain_src_dir "$SRC_DIR" + +if [ ! -d $SRC_DIR/gdb/gdb-$GDB_VERSION ] ; then + echo "ERROR: Missing gdb sources: $SRC_DIR/gdb/gdb-$GDB_VERSION" + echo " Use --gdb-version=<version> to specify alternative." + exit 1 +fi + +if [ -z "$EXPLICIT_BINUTILS_VERSION" ]; then + BINUTILS_VERSION=$(get_default_binutils_version_for_gcc $TOOLCHAIN) + dump "Auto-config: --binutils-version=$BINUTILS_VERSION" +fi + +if [ ! -d $SRC_DIR/binutils/binutils-$BINUTILS_VERSION ] ; then + echo "ERROR: Missing binutils sources: $SRC_DIR/binutils/binutils-$BINUTILS_VERSION" + echo " Use --binutils-version=<version> to specify alternative." + exit 1 +fi + +if [ -z "$EXPLICIT_GDB_VERSION" ]; then + GDB_VERSION=$(get_default_gdb_version_for_gcc $TOOLCHAIN) + dump "Auto-config: --gdb-version=$GDB_VERSION" +fi + +if [ ! -d $SRC_DIR/gdb/gdb-$GDB_VERSION ] ; then + echo "ERROR: Missing gdb sources: $SRC_DIR/gdb/gdb-$GDB_VERSION" + echo " Use --gdb-version=<version> to specify alternative." + exit 1 +fi + +fix_option MPFR_VERSION "$OPTION_MPFR_VERSION" "mpfr version" +if [ ! -f $SRC_DIR/mpfr/mpfr-$MPFR_VERSION.tar.bz2 ] ; then + echo "ERROR: Missing mpfr sources: $SRC_DIR/mpfr/mpfr-$MPFR_VERSION.tar.bz2" + echo " Use --mpfr-version=<version> to specify alternative." + exit 1 +fi + +if [ "$PACKAGE_DIR" ]; then + mkdir -p "$PACKAGE_DIR" + fail_panic "Could not create package directory: $PACKAGE_DIR" +fi + +set_toolchain_ndk $NDK_DIR $TOOLCHAIN + +if [ "$MINGW" != "yes" -a "$DARWIN" != "yes" ] ; then + dump "Using C compiler: $CC" + dump "Using C++ compiler: $CXX" +fi + +rm -rf $BUILD_OUT +mkdir -p $BUILD_OUT + +# Location where the toolchain license files are +TOOLCHAIN_LICENSES=$ANDROID_NDK_ROOT/build/tools/toolchain-licenses + +# Without option "--sysroot" (and its variations), GCC will attempt to +# search path specified by "--with-sysroot" at build time for headers/libs. +# Path at --with-sysroot contains minimal headers and libs to boostrap +# toolchain build, and it's not needed afterward (NOTE: NDK provides +# sysroot at specified API level,and Android build explicit lists header/lib +# dependencies. +# +# It's better to point --with-sysroot to local directory otherwise the +# path may be found at compile-time and bad things can happen: eg. +# 1) The path exists and contain incorrect headers/libs +# 2) The path exists at remote server and blocks GCC for seconds +# 3) The path exists but not accessible, which crashes GCC! + +# For canadian build --with-sysroot has to be sub-directory of --prefix. +if [ -z "$HOST_TAG" ]; then + echo "Error: HOST_TAG not set!" + exit 1 +fi + +TOOLCHAIN_SUBDIR=toolchains/$HOST_TAG/$TOOLCHAIN/prebuilt +TOOLCHAIN_INSTALL_PATH=$PACKAGE_DIR/$TOOLCHAIN_SUBDIR +dump "Using TOOLCHAIN_INSTALL_PATH=$TOOLCHAIN_INSTALL_PATH" +dump "Using TOOLCHAIN_SUBDIR=$TOOLCHAIN_SUBDIR" +TOOLCHAIN_BUILD_SYSROOT=$TOOLCHAIN_INSTALL_PATH/sysroot +dump "Sysroot : Copying: $SYSROOT --> $TOOLCHAIN_BUILD_SYSROOT" +mkdir -p $TOOLCHAIN_BUILD_SYSROOT && (cd $SYSROOT && tar chf - *) | (cd $TOOLCHAIN_BUILD_SYSROOT && tar xf -) +if [ $? != 0 ] ; then + echo "Error while copying sysroot files. See $TMPLOG" + exit 1 +fi + +# configure the toolchain +# +dump "Configure: $TOOLCHAIN toolchain build" +# Old versions of the toolchain source packages placed the +# configure script at the top-level. Newer ones place it under +# the build directory though. Probe the file system to check +# this. +BUILD_SRCDIR=$SRC_DIR/build +if [ ! -d $BUILD_SRCDIR ] ; then + BUILD_SRCDIR=$SRC_DIR +fi +OLD_ABI="${ABI}" +export CC CXX +export CFLAGS_FOR_TARGET="$ABI_CFLAGS_FOR_TARGET" +export CXXFLAGS_FOR_TARGET="$ABI_CXXFLAGS_FOR_TARGET" +# Needed to build a 32-bit gmp on 64-bit systems +export ABI=$HOST_GMP_ABI + +# Note that the following flags only apply for "build" in canadian +# -Wno-error is needed because our gdb-6.6 sources use -Werror by default +# and fail to build with recent GCC versions. +CFLAGS_FOR_BUILD="-O2 -s -Wno-error" +LDFLAGS_FOR_BUILD= + +if [ "$MINGW" = "yes" ] ; then + CFLAGS_FOR_BUILD=$CFLAGS_FOR_BUILD" -D__USE_MINGW_ANSI_STDIO=1" +fi + +CFLAGS="$CFLAGS_FOR_BUILD $HOST_CFLAGS" +LDFLAGS="$LDFLAGS_FOR_BUILD $HOST_LDFLAGS" + +export CFLAGS LDFLAGS CFLAGS_FOR_BUILD LDFLAGS_FOR_BUILD + +# This extra flag is used to slightly speed up the build +EXTRA_CONFIG_FLAGS="--disable-bootstrap" + +if [ "$DARWIN" = "yes" ]; then + # Disable plugin because in canadian cross build, plugin gengtype + # will be incorrectly linked with build's library and fails. + # ToDo + EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --disable-plugin" +else + EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-plugins" +fi + +# Enable OpenMP +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-libgomp" + +# Enable indirect functions in the compilers that support it (4.6 and above) +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-gnu-indirect-function" + +# Disable libcilkrts which needs C++ for now, because libstdlibc++ in NDK is +# built separately... +case "$TOOLCHAIN" in + x86*-4.9) EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --disable-libcilkrts" +esac + +# Disable libsanitizer (which depends on libstdc++ built separately) for now +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --disable-libsanitizer" + +# Enable Gold + +ENABLE_GOLD_FLAGS= +case "$TOOLCHAIN" in + # Note that only ARM/X86 >= GCC 4.6 and AARCH64 >= GCC 4.9 are supported + mips*) + # Don't use gold for mips/mips64. + ;; + aarch64*) + # Enable ld.gold but ld.bfd remain the default + ENABLE_GOLD_FLAGS="--enable-gold --enable-ld=default" + ;; + *) + # Enable ld.gold as default + ENABLE_GOLD_FLAGS="--enable-gold=default" + ;; +esac + +# Current mingw has an internal compiler error when building gold. +# Bug: http://b/22045105 +if [ "$MINGW" = "yes" ]; then + ENABLE_GOLD_FLAGS= +fi + +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" "$ENABLE_GOLD_FLAGS + +# We're not using gold for mips yet, and there is no support for threaded +# linking on Windows (no pthreads). +if [ "$TOOLCHAIN" != mips* -a "$MINGW" != "yes" ]; then + EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-threads" +fi + +# Enable Graphite +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-graphite=yes --with-cloog-version=$CLOOG_VERSION --with-isl-version=$ISL_VERSION" + +# Enable linker option -eh-frame-hdr also for static executable +EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-eh-frame-hdr-for-static" + +# Enable aarch64 workaround for Cortex-A53 Erratum number 835769 +case "$TOOLCHAIN" in + aarch64*-4.9) EXTRA_CONFIG_FLAGS=$EXTRA_CONFIG_FLAGS" --enable-fix-cortex-a53-835769" +esac + +MAY_FAIL_DUE_TO_RACE_CONDITION= +if [ "$MINGW" = "yes" -o "$DARWIN" = "yes" ]; then + MAY_FAIL_DUE_TO_RACE_CONDITION=yes +fi + +# hack to use different set of sources +CONFIGURE_GCC_VERSION=$GCC_VERSION +case "$TOOLCHAIN" in + *4.9l) + CONFIGURE_GCC_VERSION=4.9l + ;; + *4.8l) + CONFIGURE_GCC_VERSION=4.8l + ;; +esac + +# Build GNU sed so the configure script works for MIPS/MIPS64 on Darwin. +# http://b/22099482 +cd $BUILD_OUT && run $SRC_DIR/sed/configure +if [ $? != 0 ] ; then + dump "Error while trying to configure sed. See $TMPLOG" + exit 1 +fi +run make -j$NUM_JOBS +if [ $? != 0 ] ; then + dump "Error while trying to build sed. See $TMPLOG" + exit 1 +fi + +# Put our freshly-built GNU sed ahead of the system one on the path. +export PATH=$BUILD_OUT/sed/:$PATH + +cd $BUILD_OUT && run \ +$BUILD_SRCDIR/configure --target=$ABI_CONFIGURE_TARGET \ + --enable-initfini-array \ + --host=$ABI_CONFIGURE_HOST \ + --build=$ABI_CONFIGURE_BUILD \ + --disable-nls \ + --prefix=$TOOLCHAIN_INSTALL_PATH \ + --with-sysroot=$TOOLCHAIN_BUILD_SYSROOT \ + --with-binutils-version=$BINUTILS_VERSION \ + --with-mpfr-version=$MPFR_VERSION \ + --with-mpc-version=$MPC_VERSION \ + --with-gmp-version=$GMP_VERSION \ + --with-gcc-version=$CONFIGURE_GCC_VERSION \ + --with-gdb-version=$GDB_VERSION \ + --with-gxx-include-dir=$TOOLCHAIN_INSTALL_PATH/include/c++/$GCC_VERSION \ + --with-bugurl=$DEFAULT_ISSUE_TRACKER_URL \ + --enable-languages=$ENABLE_LANGUAGES \ + $EXTRA_CONFIG_FLAGS \ + $ABI_CONFIGURE_EXTRA_FLAGS +if [ $? != 0 ] ; then + dump "Error while trying to configure toolchain build. See $TMPLOG" + exit 1 +fi + +ABI="$OLD_ABI" +# build the toolchain +dump "Building : $TOOLCHAIN toolchain [this can take a long time]." +cd $BUILD_OUT +export CC CXX +export ABI=$HOST_GMP_ABI +export NUM_JOBS + +while [ -n "1" ]; do + run make -j$NUM_JOBS + if [ $? = 0 ] ; then + break + else + if [ "$MAY_FAIL_DUE_TO_RACE_CONDITION" = "yes" ] ; then + # Unfortunately, there is a bug in the GCC build scripts that prevent + # parallel mingw/darwin canadian cross builds to work properly on some + # multi-core machines (but not all, sounds like a race condition). Detect + # this and restart in less parallelism, until -j1 also fail + NUM_JOBS=$((NUM_JOBS/2)) + export NUM_JOBS + if [ $NUM_JOBS -lt 1 ] ; then + echo "Error while building mingw/darwin toolchain. See $TMPLOG" + exit 1 + fi + dump "Parallel canadian build failed - continuing in less parallelism -j$NUM_JOBS" + else + echo "Error while building toolchain. See $TMPLOG" + exit 1 + fi + fi +done + +ABI="$OLD_ABI" + +# install the toolchain to its final location. +dump "Install : $TOOLCHAIN toolchain binaries." +cd $BUILD_OUT && run make install +if [ $? != 0 ] ; then + # try "-j1", eg. for aarch64-linux-android-4.8 with libatomic may fail to install due to race condition (missing prefix/lib/../lib64/./libiberty.an) + NUM_JOBS=1 + export NUM_JOBS + run make install -j$NUM_JOBS + if [ $? != 0 ] ; then + echo "Error while installing toolchain. See $TMPLOG" + exit 1 + fi +fi + +if [ "$MINGW" = "yes" -o "$DARWIN" = "yes" ] ; then + # For some reasons, libraries in $ABI_CONFIGURE_TARGET (*) are not installed. + # Hack here to copy them over. + # (*) FYI: libgcc.a and libgcov.a not installed there in the first place + INSTALL_TARGET_LIB_PATH="$BUILD_OUT/host-$ABI_CONFIGURE_BUILD/install/$ABI_CONFIGURE_TARGET/lib" + TOOLCHAIN_TARGET_LIB_PATH="$TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib" + (cd "$INSTALL_TARGET_LIB_PATH" && + find . \( -name "*.a" -o -name "*.la" -o -name "*.spec" \) -exec install -D "{}" "$TOOLCHAIN_TARGET_LIB_PATH/{}" \;) +fi + +# don't forget to copy the GPL and LGPL license files +run cp -f $TOOLCHAIN_LICENSES/COPYING* $TOOLCHAIN_INSTALL_PATH + +# remove some unneeded files +run rm -f $TOOLCHAIN_INSTALL_PATH/bin/*-gccbug +run rm -f $TOOLCHAIN_INSTALL_PATH/bin/*gdbtui$HOST_EXE +run rm -f $TOOLCHAIN_INSTALL_PATH/bin/*-run$HOST_EXE +run rm -rf $TOOLCHAIN_INSTALL_PATH/info +run rm -rf $TOOLCHAIN_INSTALL_PATH/man +run rm -rf $TOOLCHAIN_INSTALL_PATH/share/info +run rm -rf $TOOLCHAIN_INSTALL_PATH/share/man +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib/gcc/$ABI_CONFIGURE_TARGET/*/install-tools +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib/gcc/$ABI_CONFIGURE_TARGET/*/plugin +run rm -rf $TOOLCHAIN_INSTALL_PATH/libexec/gcc/$ABI_CONFIGURE_TARGET/*/install-tools +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib32/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib64/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/lib/x86_64/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib/*/libiberty.a +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib/*/*/libiberty.a +find $TOOLCHAIN_INSTALL_PATH -name "*.la" -exec rm -f {} \; +# Remove host install in cross compilation +if [ "$ABI_CONFIGURE_HOST" != "$ABI_CONFIGURE_TARGET" ]; then + run rm -rf "$TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_HOST" +fi +# remove sysroot +run rm -rf "$TOOLCHAIN_INSTALL_PATH/sysroot" + +# Remove libstdc++ for now (will add it differently later) +# We had to build it to get libsupc++ which we keep. +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib/libstdc++.* +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/lib/*/libstdc++.* +run rm -rf $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/include/c++ + +# strip binaries to reduce final package size +test -z "$STRIP" && STRIP=strip +# because libpython is statically linked to GDB, it introduces symbols +# that are only used by Python modules that must not be stripped. This +# is not true of Windows which dynamically links to Python. +if [ "$MINGW" = "yes" ] ; then + run $STRIP $TOOLCHAIN_INSTALL_PATH/bin/* +else + find $TOOLCHAIN_INSTALL_PATH/bin -type f -not -name "*gdb" \ + | while read EXECUTABLE; do run $STRIP "$EXECUTABLE"; done +fi +run $STRIP $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/bin/* +run $STRIP $TOOLCHAIN_INSTALL_PATH/libexec/gcc/*/*/cc1$HOST_EXE +run $STRIP $TOOLCHAIN_INSTALL_PATH/libexec/gcc/*/*/cc1plus$HOST_EXE +run $STRIP $TOOLCHAIN_INSTALL_PATH/libexec/gcc/*/*/collect2$HOST_EXE +run $STRIP $TOOLCHAIN_INSTALL_PATH/libexec/gcc/*/*/lto*$HOST_EXE + +# Some of the files should really be links to save space. +# This is mostly to reduce the size of the Windows zip archives, +# since: +# - The toolchain install script actually use hard-links +# - Tar automatically detects hard links and will only store a +# single copy of each file anyway. + +# $1: Source file (will be changed to a link) +# $2: Destination (relative to source). +do_relink () { + log "Relink: $1 --> $2" + local BASENAME DIRNAME + DIRNAME=$(dirname "$1") + BASENAME=$(basename "$1") + ( cd "$DIRNAME" && rm -f "$BASENAME" && ln -s "$2" "$BASENAME" ) + fail_panic "Can't relink $1 to $2" +} + +# <config>/bin/<name> should point to ../../<config>-<name> +LINK_FILES=$(cd $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/bin && ls * 2>/dev/null) +for LINK_FILE in $LINK_FILES; do + do_relink $TOOLCHAIN_INSTALL_PATH/$ABI_CONFIGURE_TARGET/bin/$LINK_FILE ../../bin/$ABI_CONFIGURE_TARGET-$LINK_FILE +done + +# $1: Source file prefix (e.g. 'c++') +# $2: Destination file prefix (e.g. 'g++') +# $3: Alternative file prefix if $2 doesn't exist (eg. ld.bfd) +do_relink_bin () { + local DST_FILE=$2 + if [ ! -f "$TOOLCHAIN_INSTALL_PATH/bin/$ABI_CONFIGURE_TARGET-$DST_FILE$HOST_EXE" ]; then + DST_FILE=$3 + fi + if [ ! -f "$TOOLCHAIN_INSTALL_PATH/bin/$ABI_CONFIGURE_TARGET-$DST_FILE$HOST_EXE" ]; then + echo "ERROR: Can't relink $1 to $DST_FILE because $DST_FILE doesn't exist" + exit 1 + fi + do_relink \ + $TOOLCHAIN_INSTALL_PATH/bin/$ABI_CONFIGURE_TARGET-$1$HOST_EXE \ + $ABI_CONFIGURE_TARGET-$DST_FILE$HOST_EXE +} + +do_relink_bin c++ g++ +do_relink_bin gcc-$GCC_VERSION gcc +# symlink ld to either ld.gold or ld.bfd +case "$TOOLCHAIN" in + aarch64*) + # Don't make ld.gold as default for now because it's new + do_relink_bin ld ld.bfd ld.gold + ;; + *) + do_relink_bin ld ld.gold ld.bfd + ;; +esac + +# copy SOURCES file if present +if [ -f "$SRC_DIR/SOURCES" ]; then + cp "$SRC_DIR/SOURCES" "$TOOLCHAIN_INSTALL_PATH/SOURCES" +fi + +if [ "$PACKAGE_DIR" ]; then + ARCHIVE="$TOOLCHAIN-$HOST_TAG.tar.bz2" + dump "Packaging $ARCHIVE from $PACKAGE_DIR/$TOOLCHAIN_SUBDIR" + pack_archive "$PACKAGE_DIR/$ARCHIVE" "$PACKAGE_DIR" "$TOOLCHAIN_SUBDIR" + fail_panic "Could not package $TOOLCHAIN GCC!" +fi + +dump "Done." +if [ -z "$OPTION_BUILD_OUT" ] ; then + rm -rf $BUILD_OUT +fi diff --git a/build.py b/build.py new file mode 100755 index 000000000..34cc19f5b --- /dev/null +++ b/build.py @@ -0,0 +1,142 @@ +#!/usr/bin/env python +# +# Copyright (C) 2015 The Android Open Source Project +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +from __future__ import print_function + +import argparse +import multiprocessing +import os +import subprocess +import sys + + +def android_path(path=''): + top = os.getenv('ANDROID_BUILD_TOP', '') + return os.path.realpath(os.path.join(top, path)) + + +def get_default_package_dir(): + return android_path('out/ndk') + + +def get_default_host(): + if sys.platform in ('linux', 'linux2'): + return 'linux' + elif sys.platform == 'darwin': + return 'darwin' + else: + raise RuntimeError('Unsupported host: {}'.format(sys.platform)) + + +ALL_TOOLCHAINS = ( + 'arm-linux-androideabi', 'aarch64-linux-android', + 'mipsel-linux-android', 'mips64el-linux-android', + 'x86', 'x86_64', +) + + +class ArgParser(argparse.ArgumentParser): + def __init__(self): + super(ArgParser, self).__init__( + description='Builds GCC for Android.') + + self.add_argument( + '--host', choices=('darwin', 'linux', 'windows', 'windows64'), + help='Build binaries for given OS (e.g. linux).') + self.add_argument( + '--package-dir', help='Directory to place the packaged GCC.', + default=get_default_package_dir()) + self.add_argument( + '--toolchain', choices=ALL_TOOLCHAINS, + help='Toolchain to build. Builds all if not present.') + + +def toolchain_to_arch(toolchain): + return { + 'arm-linux-androideabi': 'arm', + 'aarch64-linux-android': 'arm64', + 'mipsel-linux-android': 'mips', + 'mips64el-linux-android': 'mips64', + 'x86': 'x86', + 'x86_64': 'x86_64', + }[toolchain] + + +def default_api_level(arch): + if '64' in arch: + return 21 + else: + return 9 + + +def sysroot_path(toolchain): + arch = toolchain_to_arch(toolchain) + version = default_api_level(arch) + + prebuilt_ndk = 'prebuilts/ndk/current' + sysroot_subpath = 'platforms/android-{}/arch-{}'.format(version, arch) + return android_path(os.path.join(prebuilt_ndk, sysroot_subpath)) + + +def main(): + args = ArgParser().parse_args() + + if 'ANDROID_BUILD_TOP' not in os.environ: + top = os.path.join(os.path.dirname(__file__), '../..') + os.environ['ANDROID_BUILD_TOP'] = os.path.realpath(top) + + os.chdir(android_path('toolchain/gcc')) + + toolchain_path = android_path('toolchain') + ndk_path = android_path('ndk') + + GCC_VERSION = '4.9' + jobs_arg = '-j{}'.format(multiprocessing.cpu_count() * 2) + + package_dir_arg = '--package-dir={}'.format(args.package_dir) + + toolchains = ALL_TOOLCHAINS + if args.toolchain is not None: + toolchains = [args.toolchain] + + host = args.host + if host is None: + host = get_default_host() + + ndk_build_tools_path = android_path('ndk/build/tools') + build_env = dict(os.environ) + build_env['NDK_BUILDTOOLS_PATH'] = ndk_build_tools_path + build_env['ANDROID_NDK_ROOT'] = ndk_path + + print('Building {} toolchains: {}'.format(host, ' '.join(toolchains))) + for toolchain in toolchains: + toolchain_name = '-'.join([toolchain, GCC_VERSION]) + sysroot_arg = '--sysroot={}'.format(sysroot_path(toolchain)) + build_cmd = [ + 'bash', 'build-gcc.sh', toolchain_path, ndk_path, toolchain_name, + package_dir_arg, '--verbose', jobs_arg, sysroot_arg, + ] + + if host in ('windows', 'windows64'): + build_cmd.append('--mingw') + + if host != 'windows': + build_cmd.append('--try-64') + + subprocess.check_call(build_cmd, env=build_env) + +if __name__ == '__main__': + main() diff --git a/gcc-4.8/gcc/config/linux-android.h b/gcc-4.8/gcc/config/linux-android.h index 87957e338..e88ab78f0 100644 --- a/gcc-4.8/gcc/config/linux-android.h +++ b/gcc-4.8/gcc/config/linux-android.h @@ -45,8 +45,8 @@ "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC: " ANDROID_PIC_DEFAULT "}}}}" #define ANDROID_CC1PLUS_SPEC \ - "%{!fexceptions:%{!fno-exceptions: -fno-exceptions}} " \ - "%{!frtti:%{!fno-rtti: -fno-rtti}}" + "%{!fexceptions:%{!fno-exceptions: -fexceptions}} " \ + "%{!frtti:%{!fno-rtti: -frtti}}" #define ANDROID_ASM_SPEC \ "--noexecstack" diff --git a/gcc-4.8/libstdc++-v3/src/Makefile.in b/gcc-4.8/libstdc++-v3/src/Makefile.in index 9721ebb9b..dd3d42628 100644 --- a/gcc-4.8/libstdc++-v3/src/Makefile.in +++ b/gcc-4.8/libstdc++-v3/src/Makefile.in @@ -336,7 +336,7 @@ AM_CPPFLAGS = $(GLIBCXX_INCLUDES) SUBDIRS = c++98 c++11 # Cross compiler support. -toolexeclib_LTLIBRARIES = libstdc++.la +toolexeclib_LTLIBRARIES = libgnustl_shared.la @GLIBCXX_LDBL_COMPAT_FALSE@ldbl_compat_sources = @GLIBCXX_LDBL_COMPAT_TRUE@ldbl_compat_sources = compatibility-ldbl.cc parallel_compat_sources = \ @@ -544,6 +544,9 @@ clean-toolexeclibLTLIBRARIES: libstdc++.la: $(libstdc___la_OBJECTS) $(libstdc___la_DEPENDENCIES) $(libstdc___la_LINK) -rpath $(toolexeclibdir) $(libstdc___la_OBJECTS) $(libstdc___la_LIBADD) $(LIBS) +libgnustl_shared.la: $(libstdc___la_OBJECTS) $(libstdc___la_DEPENDENCIES) + $(libstdc___la_LINK) -rpath $(toolexeclibdir) $(libstdc___la_OBJECTS) $(libstdc___la_LIBADD) $(LIBS) + mostlyclean-compile: -rm -f *.$(OBJEXT) diff --git a/gcc-4.9/ChangeLog b/gcc-4.9/ChangeLog index a8ea3479c..207f2caf5 100644 --- a/gcc-4.9/ChangeLog +++ b/gcc-4.9/ChangeLog @@ -1,3 +1,21 @@ +2015-03-11 Junmo Park <junmoz.park@samsung.com> + + * config/arm/cortex-a57.md (cortex_a57_crypto_simple): Add + crypto_sha256_fast. + (cortex_a57_crypto_complex): Add crypto_sha256_slow. + +2015-01-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a57.md: Remove duplicate of file accidentally + introduced in revision 219724. + +2015-01-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a57.md: New. + * config/aarch64/aarch64.md: Include it. + * config/aarch64/aarch64-cores.def (cortex-a57): Tune for it. + * config/aarch64/aarch64-tune.md: Regenerate. + 2014-12-04 Tobias Burnus <burnus@net-b.de> * configure.ac: Permit also ISL 0.14 with CLooG. @@ -5,6 +23,12 @@ * Makefile.in: Regenerate. * configure: Regenerate. +2014-11-19 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/61915 + * config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move + cost. + 2014-11-19 Renlin Li <Renlin.Li@arm.com> PR middle-end/63762 diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-cores.def b/gcc-4.9/gcc/config/aarch64/aarch64-cores.def index 9319249e6..56d312e8e 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64-cores.def +++ b/gcc-4.9/gcc/config/aarch64/aarch64-cores.def @@ -35,7 +35,7 @@ /* V8 Architecture Processors. */ AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa53) -AARCH64_CORE("cortex-a57", cortexa15, cortexa15, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57) +AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57) /* V8 big.LITTLE implementations. */ diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h b/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h index bb5c88d53..67271b29d 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h +++ b/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h @@ -41,10 +41,14 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif +#define CA53_ERR_843419_SPEC \ + " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" + #ifndef LINK_SPEC #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \ -maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \ - CA53_ERR_835769_SPEC + CA53_ERR_835769_SPEC \ + CA53_ERR_843419_SPEC #endif #endif /* GCC_AARCH64_ELF_RAW_H */ diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-linux.h b/gcc-4.9/gcc/config/aarch64/aarch64-linux.h index 651abe3ce..f42ea1afc 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64-linux.h +++ b/gcc-4.9/gcc/config/aarch64/aarch64-linux.h @@ -48,7 +48,12 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif -#define LINUX_TARGET_LINK_SPEC LINUX_TARGET_LINK_SPEC0 CA53_ERR_835769_SPEC +#define CA53_ERR_843419_SPEC \ + " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" + +#define LINUX_TARGET_LINK_SPEC LINUX_TARGET_LINK_SPEC0 \ + CA53_ERR_835769_SPEC \ + CA53_ERR_843419_SPEC #ifdef TARGET_FIX_ERR_A53_835769_DEFAULT #define CA53_ERR_835769_SPEC \ diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-tune.md b/gcc-4.9/gcc/config/aarch64/aarch64-tune.md index b7e40e0b5..ac7b7741b 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64-tune.md +++ b/gcc-4.9/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa53,cortexa15,cortexa57cortexa53" + "cortexa53,cortexa57,cortexa57cortexa53" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc-4.9/gcc/config/aarch64/aarch64.c b/gcc-4.9/gcc/config/aarch64/aarch64.c index 6b2717471..f9e8c4067 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64.c +++ b/gcc-4.9/gcc/config/aarch64/aarch64.c @@ -184,8 +184,10 @@ __extension__ static const struct cpu_regmove_cost generic_regmove_cost = { NAMED_PARAM (GP2GP, 1), - NAMED_PARAM (GP2FP, 2), - NAMED_PARAM (FP2GP, 2), + /* Avoid the use of slow int<->fp moves for spilling by setting + their cost higher than memmov_cost. */ + NAMED_PARAM (GP2FP, 5), + NAMED_PARAM (FP2GP, 5), /* We currently do not provide direct support for TFmode Q->Q move. Therefore we need to raise the cost above 2 in order to have reload handle the situation. */ @@ -4481,6 +4483,7 @@ aarch64_strip_shift_or_extend (rtx x) /* Zero and sign extraction of a widened value. */ if ((GET_CODE (op) == ZERO_EXTRACT || GET_CODE (op) == SIGN_EXTRACT) && XEXP (op, 2) == const0_rtx + && GET_CODE (XEXP (op, 0)) == MULT && aarch64_is_extend_from_extract (GET_MODE (op), XEXP (XEXP (op, 0), 1), XEXP (op, 1))) return XEXP (XEXP (op, 0), 0); @@ -5275,6 +5278,11 @@ aarch64_override_options (void) #endif } + if (aarch64_fix_a53_err843419 == 2) + { + aarch64_fix_a53_err843419 = 1; + } + aarch64_override_options_after_change (); if (TARGET_ANDROID) diff --git a/gcc-4.9/gcc/config/aarch64/aarch64.md b/gcc-4.9/gcc/config/aarch64/aarch64.md index 05f5e1b35..dc88f8b10 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64.md +++ b/gcc-4.9/gcc/config/aarch64/aarch64.md @@ -163,13 +163,13 @@ (define_attr "generic_sched" "yes,no" (const (if_then_else - (eq_attr "tune" "cortexa53,cortexa15") + (eq_attr "tune" "cortexa53,cortexa57") (const_string "no") (const_string "yes")))) ;; Scheduling (include "../arm/cortex-a53.md") -(include "../arm/cortex-a15.md") +(include "../arm/cortex-a57.md") ;; ------------------------------------------------------------------- ;; Jumps and other miscellaneous insns @@ -3494,7 +3494,7 @@ (define_insn "aarch64_movtilow_tilow" [(set (match_operand:TI 0 "register_operand" "=w") - (zero_extend:TI + (zero_extend:TI (truncate:DI (match_operand:TI 1 "register_operand" "w"))))] "reload_completed || reload_in_progress" "fmov\\t%d0, %d1" diff --git a/gcc-4.9/gcc/config/aarch64/aarch64.opt b/gcc-4.9/gcc/config/aarch64/aarch64.opt index fc0307e28..ca27f50e1 100644 --- a/gcc-4.9/gcc/config/aarch64/aarch64.opt +++ b/gcc-4.9/gcc/config/aarch64/aarch64.opt @@ -71,6 +71,10 @@ mfix-cortex-a53-835769 Target Report Var(aarch64_fix_a53_err835769) Init(2) Workaround for ARM Cortex-A53 Erratum number 835769 +mfix-cortex-a53-843419 +Target Report Var(aarch64_fix_a53_err843419) Init(2) +Workaround for ARM Cortex-A53 Erratum number 843419 + mlittle-endian Target Report RejectNegative InverseMask(BIG_END) Assume target CPU is configured as little endian diff --git a/gcc-4.9/gcc/config/arm/cortex-a57.md b/gcc-4.9/gcc/config/arm/cortex-a57.md new file mode 100644 index 000000000..65c186b99 --- /dev/null +++ b/gcc-4.9/gcc/config/arm/cortex-a57.md @@ -0,0 +1,798 @@ +;; ARM Cortex-A57 pipeline description +;; Copyright (C) 2014-2015 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, but +;; WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +;; General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +(define_automaton "cortex_a57") + +(define_attr "cortex_a57_neon_type" + "neon_abd, neon_abd_q, neon_arith_acc, neon_arith_acc_q, + neon_arith_basic, neon_arith_complex, + neon_reduc_add_acc, neon_multiply, neon_multiply_q, + neon_multiply_long, neon_mla, neon_mla_q, neon_mla_long, + neon_sat_mla_long, neon_shift_acc, neon_shift_imm_basic, + neon_shift_imm_complex, + neon_shift_reg_basic, neon_shift_reg_basic_q, neon_shift_reg_complex, + neon_shift_reg_complex_q, neon_fp_negabs, neon_fp_arith, + neon_fp_arith_q, neon_fp_reductions_q, neon_fp_cvt_int, + neon_fp_cvt_int_q, neon_fp_cvt16, neon_fp_minmax, neon_fp_mul, + neon_fp_mul_q, neon_fp_mla, neon_fp_mla_q, neon_fp_recpe_rsqrte, + neon_fp_recpe_rsqrte_q, neon_fp_recps_rsqrts, neon_fp_recps_rsqrts_q, + neon_bitops, neon_bitops_q, neon_from_gp, + neon_from_gp_q, neon_move, neon_tbl3_tbl4, neon_zip_q, neon_to_gp, + neon_load_a, neon_load_b, neon_load_c, neon_load_d, neon_load_e, + neon_load_f, neon_store_a, neon_store_b, neon_store_complex, + unknown" + (cond [ + (eq_attr "type" "neon_abd, neon_abd_long") + (const_string "neon_abd") + (eq_attr "type" "neon_abd_q") + (const_string "neon_abd_q") + (eq_attr "type" "neon_arith_acc, neon_reduc_add_acc,\ + neon_reduc_add_acc_q") + (const_string "neon_arith_acc") + (eq_attr "type" "neon_arith_acc_q") + (const_string "neon_arith_acc_q") + (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ + neon_add_widen, neon_neg, neon_neg_q,\ + neon_reduc_add, neon_reduc_add_q,\ + neon_reduc_add_long, neon_sub, neon_sub_q,\ + neon_sub_long, neon_sub_widen, neon_logic,\ + neon_logic_q, neon_tst, neon_tst_q") + (const_string "neon_arith_basic") + (eq_attr "type" "neon_abs, neon_abs_q, neon_add_halve_narrow_q,\ + neon_add_halve, neon_add_halve_q,\ + neon_sub_halve, neon_sub_halve_q, neon_qabs,\ + neon_qabs_q, neon_qadd, neon_qadd_q, neon_qneg,\ + neon_qneg_q, neon_qsub, neon_qsub_q,\ + neon_sub_halve_narrow_q,\ + neon_compare, neon_compare_q,\ + neon_compare_zero, neon_compare_zero_q,\ + neon_minmax, neon_minmax_q, neon_reduc_minmax,\ + neon_reduc_minmax_q") + (const_string "neon_arith_complex") + + (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\ + neon_mul_h_scalar, neon_mul_s_scalar,\ + neon_sat_mul_b, neon_sat_mul_h,\ + neon_sat_mul_s, neon_sat_mul_h_scalar,\ + neon_sat_mul_s_scalar,\ + neon_mul_b_long, neon_mul_h_long,\ + neon_mul_s_long, neon_mul_d_long,\ + neon_mul_h_scalar_long, neon_mul_s_scalar_long,\ + neon_sat_mul_b_long, neon_sat_mul_h_long,\ + neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\ + neon_sat_mul_s_scalar_long") + (const_string "neon_multiply") + (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\ + neon_mul_h_scalar_q, neon_mul_s_scalar_q,\ + neon_sat_mul_b_q, neon_sat_mul_h_q,\ + neon_sat_mul_s_q, neon_sat_mul_h_scalar_q,\ + neon_sat_mul_s_scalar_q") + (const_string "neon_multiply_q") + (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\ + neon_mla_h_scalar, neon_mla_s_scalar,\ + neon_mla_b_long, neon_mla_h_long,\ + neon_mla_s_long,\ + neon_mla_h_scalar_long, neon_mla_s_scalar_long") + (const_string "neon_mla") + (eq_attr "type" "neon_mla_b_q, neon_mla_h_q, neon_mla_s_q,\ + neon_mla_h_scalar_q, neon_mla_s_scalar_q") + (const_string "neon_mla_q") + (eq_attr "type" "neon_sat_mla_b_long, neon_sat_mla_h_long,\ + neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\ + neon_sat_mla_s_scalar_long") + (const_string "neon_sat_mla_long") + + (eq_attr "type" "neon_shift_acc, neon_shift_acc_q") + (const_string "neon_shift_acc") + (eq_attr "type" "neon_shift_imm, neon_shift_imm_q,\ + neon_shift_imm_narrow_q, neon_shift_imm_long") + (const_string "neon_shift_imm_basic") + (eq_attr "type" "neon_sat_shift_imm, neon_sat_shift_imm_q,\ + neon_sat_shift_imm_narrow_q") + (const_string "neon_shift_imm_complex") + (eq_attr "type" "neon_shift_reg") + (const_string "neon_shift_reg_basic") + (eq_attr "type" "neon_shift_reg_q") + (const_string "neon_shift_reg_basic_q") + (eq_attr "type" "neon_sat_shift_reg") + (const_string "neon_shift_reg_complex") + (eq_attr "type" "neon_sat_shift_reg_q") + (const_string "neon_shift_reg_complex_q") + + (eq_attr "type" "neon_fp_neg_s, neon_fp_neg_s_q,\ + neon_fp_abs_s, neon_fp_abs_s_q,\ + neon_fp_neg_d, neon_fp_neg_d_q,\ + neon_fp_abs_d, neon_fp_abs_d_q") + (const_string "neon_fp_negabs") + (eq_attr "type" "neon_fp_addsub_s, neon_fp_abd_s,\ + neon_fp_reduc_add_s, neon_fp_compare_s,\ + neon_fp_minmax_s, neon_fp_round_s,\ + neon_fp_addsub_d, neon_fp_abd_d,\ + neon_fp_reduc_add_d, neon_fp_compare_d,\ + neon_fp_minmax_d, neon_fp_round_d,\ + neon_fp_reduc_minmax_s, neon_fp_reduc_minmax_d") + (const_string "neon_fp_arith") + (eq_attr "type" "neon_fp_addsub_s_q, neon_fp_abd_s_q,\ + neon_fp_reduc_add_s_q, neon_fp_compare_s_q,\ + neon_fp_minmax_s_q, neon_fp_round_s_q,\ + neon_fp_addsub_d_q, neon_fp_abd_d_q,\ + neon_fp_reduc_add_d_q, neon_fp_compare_d_q,\ + neon_fp_minmax_d_q, neon_fp_round_d_q") + (const_string "neon_fp_arith_q") + (eq_attr "type" "neon_fp_reduc_minmax_s_q,\ + neon_fp_reduc_minmax_d_q,\ + neon_fp_reduc_add_s_q, neon_fp_reduc_add_d_q") + (const_string "neon_fp_reductions_q") + (eq_attr "type" "neon_fp_to_int_s, neon_int_to_fp_s,\ + neon_fp_to_int_d, neon_int_to_fp_d") + (const_string "neon_fp_cvt_int") + (eq_attr "type" "neon_fp_to_int_s_q, neon_int_to_fp_s_q,\ + neon_fp_to_int_d_q, neon_int_to_fp_d_q") + (const_string "neon_fp_cvt_int_q") + (eq_attr "type" "neon_fp_cvt_narrow_s_q, neon_fp_cvt_widen_h") + (const_string "neon_fp_cvt16") + (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_s_scalar,\ + neon_fp_mul_d") + (const_string "neon_fp_mul") + (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_s_scalar_q,\ + neon_fp_mul_d_q, neon_fp_mul_d_scalar_q") + (const_string "neon_fp_mul_q") + (eq_attr "type" "neon_fp_mla_s, neon_fp_mla_s_scalar,\ + neon_fp_mla_d") + (const_string "neon_fp_mla") + (eq_attr "type" "neon_fp_mla_s_q, neon_fp_mla_s_scalar_q, + neon_fp_mla_d_q, neon_fp_mla_d_scalar_q") + (const_string "neon_fp_mla_q") + (eq_attr "type" "neon_fp_recpe_s, neon_fp_rsqrte_s,\ + neon_fp_recpx_s,\ + neon_fp_recpe_d, neon_fp_rsqrte_d,\ + neon_fp_recpx_d") + (const_string "neon_fp_recpe_rsqrte") + (eq_attr "type" "neon_fp_recpe_s_q, neon_fp_rsqrte_s_q,\ + neon_fp_recpx_s_q,\ + neon_fp_recpe_d_q, neon_fp_rsqrte_d_q,\ + neon_fp_recpx_d_q") + (const_string "neon_fp_recpe_rsqrte_q") + (eq_attr "type" "neon_fp_recps_s, neon_fp_rsqrts_s,\ + neon_fp_recps_d, neon_fp_rsqrts_d") + (const_string "neon_fp_recps_rsqrts") + (eq_attr "type" "neon_fp_recps_s_q, neon_fp_rsqrts_s_q,\ + neon_fp_recps_d_q, neon_fp_rsqrts_d_q") + (const_string "neon_fp_recps_rsqrts_q") + (eq_attr "type" "neon_bsl, neon_cls, neon_cnt,\ + neon_rev, neon_permute, neon_rbit,\ + neon_tbl1, neon_tbl2, neon_zip,\ + neon_dup, neon_dup_q, neon_ext, neon_ext_q,\ + neon_move, neon_move_q, neon_move_narrow_q") + (const_string "neon_bitops") + (eq_attr "type" "neon_bsl_q, neon_cls_q, neon_cnt_q,\ + neon_rev_q, neon_permute_q, neon_rbit_q") + (const_string "neon_bitops_q") + (eq_attr "type" "neon_from_gp,f_mcr,f_mcrr") + (const_string "neon_from_gp") + (eq_attr "type" "neon_from_gp_q") + (const_string "neon_from_gp_q") + (eq_attr "type" "neon_tbl3, neon_tbl4") + (const_string "neon_tbl3_tbl4") + (eq_attr "type" "neon_zip_q") + (const_string "neon_zip_q") + (eq_attr "type" "neon_to_gp, neon_to_gp_q,f_mrc,f_mrrc") + (const_string "neon_to_gp") + + (eq_attr "type" "f_loads, f_loadd,\ + neon_load1_1reg, neon_load1_1reg_q,\ + neon_load1_2reg, neon_load1_2reg_q") + (const_string "neon_load_a") + (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\ + neon_load1_4reg, neon_load1_4reg_q") + (const_string "neon_load_b") + (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\ + neon_load1_all_lanes, neon_load1_all_lanes_q,\ + neon_load2_2reg, neon_load2_2reg_q,\ + neon_load2_all_lanes, neon_load2_all_lanes_q") + (const_string "neon_load_c") + (eq_attr "type" "neon_load2_4reg, neon_load2_4reg_q,\ + neon_load3_3reg, neon_load3_3reg_q,\ + neon_load3_one_lane, neon_load3_one_lane_q,\ + neon_load4_4reg, neon_load4_4reg_q") + (const_string "neon_load_d") + (eq_attr "type" "neon_load2_one_lane, neon_load2_one_lane_q,\ + neon_load3_all_lanes, neon_load3_all_lanes_q,\ + neon_load4_all_lanes, neon_load4_all_lanes_q") + (const_string "neon_load_e") + (eq_attr "type" "neon_load4_one_lane, neon_load4_one_lane_q") + (const_string "neon_load_f") + + (eq_attr "type" "f_stores, f_stored,\ + neon_store1_1reg") + (const_string "neon_store_a") + (eq_attr "type" "neon_store1_2reg, neon_store1_1reg_q") + (const_string "neon_store_b") + (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\ + neon_store3_3reg, neon_store3_3reg_q,\ + neon_store2_4reg, neon_store2_4reg_q,\ + neon_store4_4reg, neon_store4_4reg_q,\ + neon_store2_2reg, neon_store2_2reg_q,\ + neon_store3_one_lane, neon_store3_one_lane_q,\ + neon_store4_one_lane, neon_store4_one_lane_q,\ + neon_store1_4reg, neon_store1_4reg_q,\ + neon_store1_one_lane, neon_store1_one_lane_q,\ + neon_store2_one_lane, neon_store2_one_lane_q") + (const_string "neon_store_complex")] + (const_string "unknown"))) + +;; The Cortex-A57 core is modelled as a triple issue pipeline that has +;; the following functional units. +;; 1. Two pipelines for integer operations: SX1, SX2 + +(define_cpu_unit "ca57_sx1_issue" "cortex_a57") +(define_reservation "ca57_sx1" "ca57_sx1_issue") + +(define_cpu_unit "ca57_sx2_issue" "cortex_a57") +(define_reservation "ca57_sx2" "ca57_sx2_issue") + +;; 2. One pipeline for complex integer operations: MX + +(define_cpu_unit "ca57_mx_issue" + "cortex_a57") +(define_reservation "ca57_mx" "ca57_mx_issue") +(define_reservation "ca57_mx_block" "ca57_mx_issue") + +;; 3. Two asymmetric pipelines for Neon and FP operations: CX1, CX2 +(define_automaton "cortex_a57_cx") + +(define_cpu_unit "ca57_cx1_issue" + "cortex_a57_cx") +(define_cpu_unit "ca57_cx2_issue" + "cortex_a57_cx") + +(define_reservation "ca57_cx1" "ca57_cx1_issue") + +(define_reservation "ca57_cx2" "ca57_cx2_issue") +(define_reservation "ca57_cx2_block" "ca57_cx2_issue*2") + +;; 4. One pipeline for branch operations: BX + +(define_cpu_unit "ca57_bx_issue" "cortex_a57") +(define_reservation "ca57_bx" "ca57_bx_issue") + +;; 5. Two pipelines for load and store operations: LS1, LS2. The most +;; valuable thing we can do is force a structural hazard to split +;; up loads/stores. + +(define_cpu_unit "ca57_ls_issue" "cortex_a57") +(define_cpu_unit "ca57_ldr, ca57_str" "cortex_a57") +(define_reservation "ca57_load_model" "ca57_ls_issue,ca57_ldr*2") +(define_reservation "ca57_store_model" "ca57_ls_issue,ca57_str") + +;; Block all issue queues. + +(define_reservation "ca57_block" "ca57_cx1_issue + ca57_cx2_issue + + ca57_mx_issue + ca57_sx1_issue + + ca57_sx2_issue + ca57_ls_issue") + +;; Simple Execution Unit: +;; +;; Simple ALU without shift +(define_insn_reservation "cortex_a57_alu" 2 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\ + alu_reg,alus_reg,logic_reg,logics_reg,\ + adc_imm,adcs_imm,adc_reg,adcs_reg,\ + adr,bfm,clz,rbit,rev,\ + shift_imm,shift_reg,\ + mov_imm,mov_reg,\ + mvn_imm,mvn_reg,\ + mrs,multiple,no_insn")) + "ca57_sx1|ca57_sx2") + +;; ALU ops with immediate shift +(define_insn_reservation "cortex_a57_alu_shift" 3 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "extend,\ + alu_shift_imm,alus_shift_imm,\ + crc,logic_shift_imm,logics_shift_imm,\ + mov_shift,mvn_shift")) + "ca57_mx") + +;; Multi-Cycle Execution Unit: +;; +;; ALU ops with register controlled shift +(define_insn_reservation "cortex_a57_alu_shift_reg" 3 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "alu_shift_reg,alus_shift_reg,\ + logic_shift_reg,logics_shift_reg,\ + mov_shift_reg,mvn_shift_reg")) + "ca57_mx") + +;; All multiplies +;; TODO: AArch32 and AArch64 have different behaviour +(define_insn_reservation "cortex_a57_mult32" 3 + (and (eq_attr "tune" "cortexa57") + (ior (eq_attr "mul32" "yes") + (eq_attr "mul64" "yes"))) + "ca57_mx") + +;; Integer divide +(define_insn_reservation "cortex_a57_div" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "udiv,sdiv")) + "ca57_mx_issue,ca57_mx_block*3") + +;; Block all issue pipes for a cycle +(define_insn_reservation "cortex_a57_block" 1 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "block")) + "ca57_block") + +;; Branch execution Unit +;; +;; Branches take one issue slot. +;; No latency as there is no result +(define_insn_reservation "cortex_a57_branch" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "branch")) + "ca57_bx") + +;; Load-store execution Unit +;; +;; Loads of up to two words. +(define_insn_reservation "cortex_a57_load1" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "load_byte,load1,load2")) + "ca57_load_model") + +;; Loads of three or four words. +(define_insn_reservation "cortex_a57_load3" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "load3,load4")) + "ca57_ls_issue*2,ca57_load_model") + +;; Stores of up to two words. +(define_insn_reservation "cortex_a57_store1" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "store1,store2")) + "ca57_store_model") + +;; Stores of three or four words. +(define_insn_reservation "cortex_a57_store3" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "store3,store4")) + "ca57_ls_issue*2,ca57_store_model") + +;; Advanced SIMD Unit - Integer Arithmetic Instructions. + +(define_insn_reservation "cortex_a57_neon_abd" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_abd")) + "ca57_cx1|ca57_cx2") + +(define_insn_reservation "cortex_a57_neon_abd_q" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_abd_q")) + "ca57_cx1+ca57_cx2") + +(define_insn_reservation "cortex_a57_neon_aba" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_arith_acc")) + "ca57_cx2") + +(define_insn_reservation "cortex_a57_neon_aba_q" 8 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_arith_acc_q")) + "ca57_cx2+(ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation "cortex_a57_neon_arith_basic" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_arith_basic")) + "ca57_cx1|ca57_cx2") + +(define_insn_reservation "cortex_a57_neon_arith_complex" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_arith_complex")) + "ca57_cx1|ca57_cx2") + +;; Integer Multiply Instructions. + +(define_insn_reservation "cortex_a57_neon_multiply" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_multiply")) + "ca57_cx1") + +(define_insn_reservation "cortex_a57_neon_multiply_q" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_multiply_q")) + "ca57_cx1+(ca57_cx1_issue,ca57_cx1)") + +(define_insn_reservation "cortex_a57_neon_mla" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_mla")) + "ca57_cx1") + +(define_insn_reservation "cortex_a57_neon_mla_q" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_mla_q")) + "ca57_cx1+(ca57_cx1_issue,ca57_cx1)") + +(define_insn_reservation "cortex_a57_neon_sat_mla_long" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_sat_mla_long")) + "ca57_cx1") + +;; Integer Shift Instructions. + +(define_insn_reservation + "cortex_a57_neon_shift_acc" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_acc")) + "ca57_cx2") + +(define_insn_reservation + "cortex_a57_neon_shift_imm_basic" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_imm_basic")) + "ca57_cx2") + +(define_insn_reservation + "cortex_a57_neon_shift_imm_complex" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_imm_complex")) + "ca57_cx2") + +(define_insn_reservation + "cortex_a57_neon_shift_reg_basic" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_reg_basic")) + "ca57_cx2") + +(define_insn_reservation + "cortex_a57_neon_shift_reg_basic_q" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_reg_basic_q")) + "ca57_cx2+(ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_shift_reg_complex" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_reg_complex")) + "ca57_cx2") + +(define_insn_reservation + "cortex_a57_neon_shift_reg_complex_q" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_shift_reg_complex_q")) + "ca57_cx2+(ca57_cx2_issue,ca57_cx2)") + +;; Floating Point Instructions. + +(define_insn_reservation + "cortex_a57_neon_fp_negabs" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_negabs")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_arith" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_arith")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_arith_q" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_arith_q")) + "(ca57_cx1+ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_reductions_q" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_reductions_q")) + "(ca57_cx1+ca57_cx2),(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_cvt_int" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_cvt_int")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_cvt_int_q" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_cvt_int_q")) + "(ca57_cx1+ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_cvt16" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_cvt16")) + "(ca57_cx1_issue+ca57_cx2_issue),(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_mul" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_mul")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_mul_q" 5 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_mul_q")) + "(ca57_cx1+ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_mla" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_mla")) + "(ca57_cx1,ca57_cx1)|(ca57_cx2,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_mla_q" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_mla_q")) + "(ca57_cx1+ca57_cx2),(ca57_cx1,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_recpe_rsqrte" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_recpe_rsqrte")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_recpe_rsqrte_q" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_recpe_rsqrte_q")) + "(ca57_cx1+ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_recps_rsqrts" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_recps_rsqrts")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_fp_recps_rsqrts_q" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_fp_recps_rsqrts_q")) + "(ca57_cx1+ca57_cx2)") + +;; Miscellaneous Instructions. + +(define_insn_reservation + "cortex_a57_neon_bitops" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_bitops")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_bitops_q" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_bitops_q")) + "(ca57_cx1+ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_from_gp" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_from_gp")) + "(ca57_ls_issue+ca57_cx1_issue,ca57_cx1) + |(ca57_ls_issue+ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_from_gp_q" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_from_gp_q")) + "(ca57_ls_issue+ca57_cx1_issue,ca57_cx1) + +(ca57_ls_issue+ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_tbl3_tbl4" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_tbl3_tbl4")) + "(ca57_cx1_issue,ca57_cx1) + +(ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_zip_q" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_zip_q")) + "(ca57_cx1_issue,ca57_cx1) + +(ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_to_gp" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_to_gp")) + "((ca57_ls_issue+ca57_sx1_issue),ca57_sx1) + |((ca57_ls_issue+ca57_sx2_issue),ca57_sx2)") + +;; Load Instructions. + +(define_insn_reservation + "cortex_a57_neon_load_a" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_a")) + "ca57_load_model") + +(define_insn_reservation + "cortex_a57_neon_load_b" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_b")) + "ca57_ls_issue,ca57_ls_issue+ca57_ldr,ca57_ldr*2") + +(define_insn_reservation + "cortex_a57_neon_load_c" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_c")) + "ca57_load_model+(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_load_d" 11 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_d")) + "ca57_cx1_issue+ca57_cx2_issue, + ca57_ls_issue+ca57_ls_issue,ca57_ldr*2") + +(define_insn_reservation + "cortex_a57_neon_load_e" 9 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_e")) + "ca57_load_model+(ca57_cx1|ca57_cx2)") + +(define_insn_reservation + "cortex_a57_neon_load_f" 11 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_load_f")) + "ca57_cx1_issue+ca57_cx2_issue, + ca57_ls_issue+ca57_ls_issue,ca57_ldr*2") + +;; Store Instructions. + +(define_insn_reservation + "cortex_a57_neon_store_a" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_store_a")) + "ca57_store_model") + +(define_insn_reservation + "cortex_a57_neon_store_b" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_store_b")) + "ca57_store_model") + +;; These block issue for a number of cycles proportional to the number +;; of 64-bit chunks they will store, we don't attempt to model that +;; precisely, treat them as blocking execution for two cycles when +;; issued. +(define_insn_reservation + "cortex_a57_neon_store_complex" 0 + (and (eq_attr "tune" "cortexa57") + (eq_attr "cortex_a57_neon_type" "neon_store_complex")) + "ca57_block*2") + +;; Floating-Point Operations. + +(define_insn_reservation "cortex_a57_fp_const" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fconsts,fconstd")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_add_sub" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fadds,faddd")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_mul" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fmuls,fmuld")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_mac" 10 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fmacs,ffmas,fmacd,ffmad")) + "(ca57_cx1,nothing,nothing,ca57_cx1) \ + |(ca57_cx2,nothing,nothing,ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_cvt" 6 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_cmp" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fcmps,fcmpd")) + "ca57_cx2") + +(define_insn_reservation "cortex_a57_fp_arith" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "ffariths,ffarithd")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_cpys" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fmov")) + "(ca57_cx1|ca57_cx2)") + +(define_insn_reservation "cortex_a57_fp_divs" 12 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fdivs, fsqrts,\ + neon_fp_div_s, neon_fp_sqrt_s")) + "ca57_cx2_block*5") + +(define_insn_reservation "cortex_a57_fp_divd" 16 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fdivd, fsqrtd, neon_fp_div_d, neon_fp_sqrt_d")) + "ca57_cx2_block*3") + +(define_insn_reservation "cortex_a57_neon_fp_div_q" 20 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "fdivd, fsqrtd,\ + neon_fp_div_s_q, neon_fp_div_d_q,\ + neon_fp_sqrt_s_q, neon_fp_sqrt_d_q")) + "ca57_cx2_block*3") + +(define_insn_reservation "cortex_a57_crypto_simple" 4 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "crypto_aese,crypto_aesmc,crypto_sha1_fast,\ + crypto_sha256_fast")) + "ca57_cx2") + +(define_insn_reservation "cortex_a57_crypto_complex" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "crypto_sha1_slow,crypto_sha256_slow")) + "ca57_cx2+(ca57_cx2_issue,ca57_cx2)") + +(define_insn_reservation "cortex_a57_crypto_xor" 7 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "crypto_sha1_xor")) + "(ca57_cx1+ca57_cx2)") + +;; We lie with calls. They take up all issue slots, but are otherwise +;; not harmful. +(define_insn_reservation "cortex_a57_call" 1 + (and (eq_attr "tune" "cortexa57") + (eq_attr "type" "call")) + "ca57_sx1_issue+ca57_sx2_issue+ca57_cx1_issue+ca57_cx2_issue\ + +ca57_mx_issue+ca57_bx_issue+ca57_ls_issue" +) + +;; Simple execution unit bypasses +(define_bypass 1 "cortex_a57_alu" + "cortex_a57_alu,cortex_a57_alu_shift,cortex_a57_alu_shift_reg") +(define_bypass 2 "cortex_a57_alu_shift" + "cortex_a57_alu,cortex_a57_alu_shift,cortex_a57_alu_shift_reg") +(define_bypass 2 "cortex_a57_alu_shift_reg" + "cortex_a57_alu,cortex_a57_alu_shift,cortex_a57_alu_shift_reg") +(define_bypass 1 "cortex_a57_alu" "cortex_a57_load1,cortex_a57_load3") +(define_bypass 2 "cortex_a57_alu_shift" "cortex_a57_load1,cortex_a57_load3") +(define_bypass 2 "cortex_a57_alu_shift_reg" + "cortex_a57_load1,cortex_a57_load3") + +;; An MLA or a MUL can feed a dependent MLA. +(define_bypass 5 "cortex_a57_neon_*mla*,cortex_a57_neon_*mul*" + "cortex_a57_neon_*mla*") + +(define_bypass 5 "cortex_a57_fp_mul,cortex_a57_fp_mac" + "cortex_a57_fp_mac") + +;; We don't need to care about control hazards, either the branch is +;; predicted in which case we pay no penalty, or the branch is +;; mispredicted in which case instruction scheduling will be unlikely to +;; help. +(define_bypass 1 "cortex_a57_*" + "cortex_a57_call,cortex_a57_branch") + diff --git a/gcc-4.9/gcc/config/linux-android.h b/gcc-4.9/gcc/config/linux-android.h index 070f969da..d8a66c7fe 100644 --- a/gcc-4.9/gcc/config/linux-android.h +++ b/gcc-4.9/gcc/config/linux-android.h @@ -45,8 +45,8 @@ "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC: " ANDROID_PIC_DEFAULT "}}}}" #define ANDROID_CC1PLUS_SPEC \ - "%{!fexceptions:%{!fno-exceptions: -fno-exceptions}} " \ - "%{!frtti:%{!fno-rtti: -fno-rtti}}" + "%{!fexceptions:%{!fno-exceptions: -fexceptions}} " \ + "%{!frtti:%{!fno-rtti: -frtti}}" #define ANDROID_ASM_SPEC \ "--noexecstack" diff --git a/gcc-4.9/gcc/config/mips/t-linux-android64 b/gcc-4.9/gcc/config/mips/t-linux-android64 index 55cab7d62..ce2b533d8 100644 --- a/gcc-4.9/gcc/config/mips/t-linux-android64 +++ b/gcc-4.9/gcc/config/mips/t-linux-android64 @@ -1,4 +1,4 @@ -MULTILIB_OPTIONS = mabi=32 mips32/mips32r2/mips32r6/mips64r2/mips64r6 -MULTILIB_DIRNAMES = 32 mips-r1 mips-r2 mips-r6 mips64-r2 mips64-r6 -MULTILIB_OSDIRNAMES = ../lib ../lib ../libr2 ../libr6 ../lib64r2 ../lib64 -MULTILIB_REQUIRED = mabi=32/mips32 mabi=32/mips32r2 mabi=32/mips32r6 mips64r2 mips64r6 +MULTILIB_OPTIONS = mabi=32 mips32/mips32r2/mips32r6/mips64r6 +MULTILIB_DIRNAMES = 32 mips-r1 mips-r2 mips-r6 mips64-r6 +MULTILIB_OSDIRNAMES = ../lib ../lib ../libr2 ../libr6 ../lib64 +MULTILIB_REQUIRED = mabi=32/mips32 mabi=32/mips32r2 mabi=32/mips32r6 mips64r6 diff --git a/gcc-4.9/gcc/tree-inline.c b/gcc-4.9/gcc/tree-inline.c index 49f897c39..aa5d0f1cb 100644 --- a/gcc-4.9/gcc/tree-inline.c +++ b/gcc-4.9/gcc/tree-inline.c @@ -800,8 +800,12 @@ remap_dependence_clique (copy_body_data *id, unsigned short clique) void **newc = pointer_map_contains (id->dependence_map, (void *)(uintptr_t)clique); if (!newc) - newc = pointer_map_insert (id->dependence_map, - (void *)(uintptr_t)++cfun->last_clique); + { + newc = pointer_map_insert (id->dependence_map, + (void *)(uintptr_t)clique); + *newc = (void *)(uintptr_t)++cfun->last_clique; + } + return (uintptr_t)*newc; } diff --git a/gcc-4.9/libstdc++-v3/src/Makefile.in b/gcc-4.9/libstdc++-v3/src/Makefile.in index 7ddd55ad7..8bac916a3 100644 --- a/gcc-4.9/libstdc++-v3/src/Makefile.in +++ b/gcc-4.9/libstdc++-v3/src/Makefile.in @@ -343,7 +343,7 @@ AM_CPPFLAGS = $(GLIBCXX_INCLUDES) SUBDIRS = c++98 c++11 # Cross compiler support. -toolexeclib_LTLIBRARIES = libstdc++.la +toolexeclib_LTLIBRARIES = libgnustl_shared.la @GLIBCXX_LDBL_COMPAT_FALSE@ldbl_compat_sources = @GLIBCXX_LDBL_COMPAT_TRUE@ldbl_compat_sources = compatibility-ldbl.cc parallel_compat_sources = \ @@ -554,6 +554,9 @@ clean-toolexeclibLTLIBRARIES: libstdc++.la: $(libstdc___la_OBJECTS) $(libstdc___la_DEPENDENCIES) $(libstdc___la_LINK) -rpath $(toolexeclibdir) $(libstdc___la_OBJECTS) $(libstdc___la_LIBADD) $(LIBS) +libgnustl_shared.la: $(libstdc___la_OBJECTS) $(libstdc___la_DEPENDENCIES) + $(libstdc___la_LINK) -rpath $(toolexeclibdir) $(libstdc___la_OBJECTS) $(libstdc___la_LIBADD) $(LIBS) + mostlyclean-compile: -rm -f *.$(OBJEXT) |