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authorLai Wei-Chih <Robert.Lai@mediatek.com>2015-04-06 13:59:54 +0800
committerDan Albert <danalbert@google.com>2015-08-27 14:36:43 -0700
commite921b03e41fb32013476adca7345650477db72c2 (patch)
tree896f22ffe73760e7b378c8018435905381686028 /gcc-4.9
parentf7b2b8bce4beb054d29b981c3b102c831083b346 (diff)
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Modify LINK_SPEC to pass --fix-cortex-a53-843419 as default.
For NDK toolchains, always enable the fix of cortex-a53 erratum 843419. Use -mno-fix-cortex-a53-843419 to disable this workaround. Change-Id: I69b8a71113abb172138bf0986697a94e42a5117e
Diffstat (limited to 'gcc-4.9')
-rw-r--r--gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h6
-rw-r--r--gcc-4.9/gcc/config/aarch64/aarch64-linux.h7
-rw-r--r--gcc-4.9/gcc/config/aarch64/aarch64.c5
-rw-r--r--gcc-4.9/gcc/config/aarch64/aarch64.opt4
4 files changed, 20 insertions, 2 deletions
diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h b/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h
index bb5c88d53..67271b29d 100644
--- a/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h
+++ b/gcc-4.9/gcc/config/aarch64/aarch64-elf-raw.h
@@ -41,10 +41,14 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+
#ifndef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X \
-maarch64elf%{mabi=ilp32*:32}%{mbig-endian:b}" \
- CA53_ERR_835769_SPEC
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#endif
#endif /* GCC_AARCH64_ELF_RAW_H */
diff --git a/gcc-4.9/gcc/config/aarch64/aarch64-linux.h b/gcc-4.9/gcc/config/aarch64/aarch64-linux.h
index 651abe3ce..f42ea1afc 100644
--- a/gcc-4.9/gcc/config/aarch64/aarch64-linux.h
+++ b/gcc-4.9/gcc/config/aarch64/aarch64-linux.h
@@ -48,7 +48,12 @@
" %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
#endif
-#define LINUX_TARGET_LINK_SPEC LINUX_TARGET_LINK_SPEC0 CA53_ERR_835769_SPEC
+#define CA53_ERR_843419_SPEC \
+ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+
+#define LINUX_TARGET_LINK_SPEC LINUX_TARGET_LINK_SPEC0 \
+ CA53_ERR_835769_SPEC \
+ CA53_ERR_843419_SPEC
#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
#define CA53_ERR_835769_SPEC \
diff --git a/gcc-4.9/gcc/config/aarch64/aarch64.c b/gcc-4.9/gcc/config/aarch64/aarch64.c
index 6d45984d0..f9e8c4067 100644
--- a/gcc-4.9/gcc/config/aarch64/aarch64.c
+++ b/gcc-4.9/gcc/config/aarch64/aarch64.c
@@ -5278,6 +5278,11 @@ aarch64_override_options (void)
#endif
}
+ if (aarch64_fix_a53_err843419 == 2)
+ {
+ aarch64_fix_a53_err843419 = 1;
+ }
+
aarch64_override_options_after_change ();
if (TARGET_ANDROID)
diff --git a/gcc-4.9/gcc/config/aarch64/aarch64.opt b/gcc-4.9/gcc/config/aarch64/aarch64.opt
index fc0307e28..ca27f50e1 100644
--- a/gcc-4.9/gcc/config/aarch64/aarch64.opt
+++ b/gcc-4.9/gcc/config/aarch64/aarch64.opt
@@ -71,6 +71,10 @@ mfix-cortex-a53-835769
Target Report Var(aarch64_fix_a53_err835769) Init(2)
Workaround for ARM Cortex-A53 Erratum number 835769
+mfix-cortex-a53-843419
+Target Report Var(aarch64_fix_a53_err843419) Init(2)
+Workaround for ARM Cortex-A53 Erratum number 843419
+
mlittle-endian
Target Report RejectNegative InverseMask(BIG_END)
Assume target CPU is configured as little endian