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authorBen Cheng <bccheng@google.com>2014-04-22 13:33:12 -0700
committerBen Cheng <bccheng@google.com>2014-04-22 13:33:12 -0700
commite3cc64dec20832769406aa38cde83c7dd4194bf4 (patch)
treeef8e39be37cfe0cb69d850043b7924389ff17164 /gcc-4.9/libitm/config/sparc/target.h
parentf33c7b3122b1d7950efa88067c9a156229ba647b (diff)
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[4.9] GCC 4.9.0 official release refresh
Change-Id: Ic99a7da8b44b789a48aeec93b33e93944d6e6767
Diffstat (limited to 'gcc-4.9/libitm/config/sparc/target.h')
-rw-r--r--gcc-4.9/libitm/config/sparc/target.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/gcc-4.9/libitm/config/sparc/target.h b/gcc-4.9/libitm/config/sparc/target.h
index b127fa450..309dac1b3 100644
--- a/gcc-4.9/libitm/config/sparc/target.h
+++ b/gcc-4.9/libitm/config/sparc/target.h
@@ -29,10 +29,6 @@ typedef struct gtm_jmpbuf
unsigned long pc;
} gtm_jmpbuf;
-/* UltraSPARC processors generally use a fixed page size of 8K. */
-#define PAGE_SIZE 8192
-#define FIXED_PAGE_SIZE 1
-
/* The size of one line in hardware caches (in bytes). We use the primary
cache line size documented for the UltraSPARC T1/T2. */
#define HW_CACHELINE_SIZE 16