diff options
| author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
| commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
| tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c | |
| parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
| download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip | |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c new file mode 100644 index 000000000..34e5a28e1 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/powerpc/ppc-bitfield1.c @@ -0,0 +1,67 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ + +/* { dg-final { scan-assembler-not "rlwinm \[0-9\]+,\[0-9\]+,\[0-9\]+,1,31" } } */ +/* { dg-final { scan-assembler-not "rlwinm \[0-9\]+,\[0-9\]+,\[0-9\]+,0xffffffff" } } */ + +/* Origin:Pete Steinmetz <steinmtz@us.ibm.com> */ + +/* PR 17104 many sign extends added. */ + +struct { + int f1 : 1; + int f2 : 1; + int f3 : 1; + int f4 : 1; + int f5 : 1; + int f6 : 1; + int f7 : 1; + int f8 : 1; + int f9 : 1; + int f10 : 1; + int f11 : 1; + int f12 : 1; + int f13 : 1; + int f14 : 1; + int f15 : 1; + int f16 : 1; + int f17 : 2; + int f18 : 2; + int f19 : 2; + int f20 : 2; + int f21 : 2; + int f22 : 2; + int f23 : 2; + int f24 : 2; + } s; + +void foo () +{ + + s.f1 = 0; + s.f2 = 0; + s.f3 = 0; + s.f4 = 0; + s.f5 = 0; + s.f6 = 0; + s.f7 = 0; + s.f8 = 0; + s.f9 = 0; + s.f10 = 0; + s.f11 = 0; + s.f12 = 0; + s.f13 = 0; + s.f14 = 0; + s.f15 = 0; + s.f16 = 0; + s.f17 = 0; + s.f18 = 0; + s.f19 = 0; + s.f20 = 0; + s.f21 = 0; + s.f22 = 0; + s.f23 = 0; + s.f24 = 0; + +} + |