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| author | Steve Ellcey <Steve.Ellcey@imgtec.com> | 2014-07-03 13:28:53 -0700 |
|---|---|---|
| committer | Steve Ellcey <Steve.Ellcey@imgtec.com> | 2014-07-03 16:10:41 -0700 |
| commit | e7af147f979e657fe2df00808e5b4319b0e088c6 (patch) | |
| tree | 4f302235c4ef4c0dce52449576c1b65333433cd5 /gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c | |
| parent | 1610db7b1892fe4da05cf4b0f64d9653978507d8 (diff) | |
| download | toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.tar.gz toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.tar.bz2 toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.zip | |
Update GCC 4.9 to include mips32r6, mips64r6 and MSA changes.
Change-Id: I136290865b137531d55321987818fc954a65f5d6
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c b/gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c new file mode 100644 index 000000000..f89747378 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/mips/movdf-3.c @@ -0,0 +1,12 @@ +/* Check that we move DFmode values using mtc1 between FP and GP. */ +/* { dg-options "-mabi=32 -mfp32 isa=2" } */ + +void bar (void); + +double +foo (int x, double a) +{ + return a; +} +/* { dg-final { scan-assembler-times "mtc1" 2 } } */ +/* { dg-final { scan-assembler-not "ldc1" } } */ |