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authorBen Cheng <bccheng@google.com>2014-03-26 05:37:19 (GMT)
committerBen Cheng <bccheng@google.com>2014-03-26 05:37:19 (GMT)
commit1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch)
treec607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/gcc.target/arc
parent283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff)
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Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/arc')
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/arc.exp41
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c10
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-1.c16
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-2.c28
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-3.c67
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/cond-set-use.c128
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-1.c5
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-2.c5
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-3.c14
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/jump-around-jump.c123
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/long-calls.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mA6.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mA7.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mARC600.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mARC601.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mARC700.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc600.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc601.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc700.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mcrc.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mdpfp.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mdsp-packa.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mdvbf.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mlock.c12
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-24.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-d16.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-crc.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dvbf.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-lock.c14
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-24.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-d16.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-rtsc.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-swape.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mno-xy.c10
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mrtsc.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mspfp.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mswape.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC600.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC601.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c4
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mul64.c13
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c28
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c30
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/mxy.c8
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c11
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/nv-cache.c9
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-1.c10
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-2.c10
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arc/v-cache.c9
54 files changed, 839 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/arc.exp b/gcc-4.9/gcc/testsuite/gcc.target/arc/arc.exp
new file mode 100644
index 0000000..ec7c738
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/arc.exp
@@ -0,0 +1,41 @@
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an arc target.
+if ![istarget arc*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
new file mode 100644
index 0000000..a0eb6d7
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC601 -mbarrel-shifter" } */
+int i;
+
+int f (void)
+{
+ i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
new file mode 100644
index 0000000..97998fb
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+int i;
+
+int f (void)
+{
+ i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-1.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-1.c
new file mode 100644
index 0000000..b1990c6
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-1.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+/* { dg-options "-O" } */
+
+extern void abort (void);
+
+/* In macros like optimized memset, we want to be able to decide what
+ alignment a passed pointer has. */
+#define f(p) __builtin_arc_aligned (p, 4)
+
+int main (void)
+{
+ int i;
+ if (f (&i) == 0)
+ abort ();
+ return 0;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-2.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-2.c
new file mode 100644
index 0000000..d48a915
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-2.c
@@ -0,0 +1,28 @@
+/* { dg-do run } */
+/* { dg-options "-O" } */
+
+extern void abort (void);
+
+typedef struct {
+ short x;
+} mytype_t;
+
+mytype_t *__attribute__ ((noinline,weak))
+some_func (void)
+{
+ static mytype_t s;
+ return &s;
+};
+
+int main (void)
+{
+ int y, y2;
+ mytype_t *shorter = some_func();
+ y = __builtin_arc_aligned (shorter, 2);
+ if (!y)
+ abort ();
+ y2 = __builtin_arc_aligned (shorter, 4);
+ if (y2)
+ abort ();
+ return 0;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-3.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-3.c
new file mode 100644
index 0000000..23d80ed
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/builtin_arc_aligned-3.c
@@ -0,0 +1,67 @@
+/* { dg-do run } */
+/* { dg-options "-O" } */
+
+extern void abort (void);
+
+typedef struct {
+ int b, c;
+}
+__attribute__((aligned(32))) inner_t; // data type is 32 byte aligned
+
+typedef struct {
+ inner_t *inner;
+ int a;
+} outer_t;
+
+void __attribute__ ((noinline,weak))
+somefunc (int a, int b, int c)
+{
+ if (!a || !b || c)
+ abort ();
+};
+
+__attribute__ ((noinline,weak))
+outer_t *
+some_alloc_1 ()
+{
+ static outer_t x;
+ return &x;
+}
+
+__attribute__ ((noinline,weak))
+inner_t *
+some_alloc_2 ()
+{
+ static inner_t x;
+ return &x;
+}
+
+int main (void)
+{
+ int y, y2, y3;
+ // @p_out is pointing to instance of outer_t, naturally aligned to 4+4 = 8
+ // and not gauranteed be 32 byte aligned.
+ outer_t *p_out = some_alloc_1( ); // returns 8 byte aligned ptr
+
+ // @ptr is pointing to instance of inner_t which is naturally aligned to 32.
+ // It is assigned to p_out->inner which is of type inner_t thus 32 byte
+ // aligned as well
+ // Note that gcc can deduce p_out->inner is 32b aligned, not at runtime,
+ // because it was assigned @ptr, but even at compile time, because it's data
+ // type is naturally 32 byte aligned.
+ inner_t *ptr = some_alloc_2(); // returns 32 byte aligned ptr
+ p_out->inner = ptr; // this ptr will also be 32 byte aligned
+
+ y = __builtin_arc_aligned(ptr, 32); // this shd return 1
+ y2 = __builtin_arc_aligned(p_out->inner, 32); // this also shd return 1
+ // Although p_out->inner ptr is 32 byte aligned,
+ // it's container &(p_out->inner) need not be.
+ // That is because the hoister has no relation to contents.
+ // p_out is not gauranteed to be 32 byte
+ // aligned, so it's member @inner in p_out need not be.
+ y3 = __builtin_arc_aligned(&(p_out->inner), 32);
+ // compiler not sure, so must return 0
+
+ somefunc(y, y2, y3);
+ return 0;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/cond-set-use.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/cond-set-use.c
new file mode 100644
index 0000000..aee2725
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/cond-set-use.c
@@ -0,0 +1,128 @@
+/* { dg-do run } */
+/* { dg-options "-Os" } */
+
+/* Based on gethostbyname_r,
+ * Copyright (C) 2000-2006 Erik Andersen <andersen@uclibc.org>
+ *
+ * Licensed under the LGPL v2.1, see the file COPYING.LIB
+ *
+ * Extraction / wrapping as test by
+ * Joern Rennecke <joern.rennecke@embecosm.com>
+ * Copyright (C) 2013 Free Software Foundation, Inc.
+ */
+
+typedef unsigned size_t;
+typedef int ssize_t;
+typedef unsigned uint32_t;
+struct resolv_answer {
+ char *dotted;
+ int atype;
+ int aclass;
+ int ttl;
+ int rdlength;
+ const unsigned char *rdata;
+ int rdoffset;
+ char* buf;
+ size_t buflen;
+ size_t add_count;
+};
+struct hostent
+{
+ char *h_name;
+ char **h_aliases;
+ int h_addrtype;
+ int h_length;
+ char **h_addr_list;
+};
+
+int *__attribute__ ((noinline,weak)) nop (void * p) { return p; };
+void __attribute__ ((noinline,weak)) seta (struct resolv_answer * p)
+{ p->atype = 1;}
+
+int ghostbyname_r(
+ struct hostent *result_buf,
+ char *buf,
+ size_t buflen,
+ struct hostent **result,
+ int *h_errnop)
+{
+ char **addr_list;
+ char **alias;
+ char *alias0;
+ int i0;
+ struct resolv_answer a;
+ int i;
+
+ *result = ((void *)0);
+
+ *h_errnop = -1;
+
+ if ((ssize_t)buflen <= 5)
+ return 34;
+
+ alias = (char **)buf;
+ addr_list = (char **)buf;
+
+ /* This got turned into branch with conditional move in delay slot. */
+ if ((ssize_t)buflen < 256)
+ return 34;
+
+
+ {
+ if (!nop(&i0)) {
+ result_buf->h_aliases = alias;
+ result_buf->h_addrtype = 2;
+ result_buf->h_length = 4;
+ result_buf->h_addr_list = addr_list;
+ *result = result_buf;
+ *h_errnop = 0;
+ return 0;
+ }
+ }
+
+
+ seta (&a);
+
+ if (a.atype == 1) {
+
+ int need_bytes = sizeof(addr_list[0]) * (a.add_count + 1 + 1);
+
+ int ips_len = a.add_count * a.rdlength;
+
+ buflen -= (need_bytes + ips_len);
+ if ((ssize_t)buflen < 0) {
+ i = 34;
+ goto free_and_ret;
+ }
+
+ result_buf->h_addrtype = 2;
+ *result = result_buf;
+ *h_errnop = 0;
+ i = 0;
+ goto free_and_ret;
+ }
+
+ /* For cse, the 1 was is loaded into a call-saved register;
+ the load was hoisted into a delay slot before the conditional load,
+ clobbering result_buf, which (conditionally) lived in the same
+ call-saved register, because mark_referenced_resources considered the
+ destination of the COND_EXEC only clobbered, but not used. */
+ *h_errnop = 1;
+ *nop(&i0) = 1;
+ i = 2;
+
+ free_and_ret:
+ nop (&i0);
+ return i;
+}
+
+int
+main ()
+{
+ struct hostent buf, *res;
+ int i;
+ char c;
+ ghostbyname_r (&buf, &c, 1024, &res, &i);
+ ghostbyname_r (&buf, 0, 1024, &res, &i);
+ return 0;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-1.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-1.c
new file mode 100644
index 0000000..7051457
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-1.c
@@ -0,0 +1,5 @@
+void __attribute__ ((interrupt("ilink1")))
+handler1 (void)
+{
+}
+/* { dg-final { scan-assembler-times "j.*\[ilink1\]" 1 } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-2.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-2.c
new file mode 100644
index 0000000..ee8593b
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-2.c
@@ -0,0 +1,5 @@
+void __attribute__ ((interrupt("ilink2")))
+handler1 (void)
+{
+}
+/* { dg-final { scan-assembler-times "j.*\[ilink2\]" 1 } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-3.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-3.c
new file mode 100644
index 0000000..fa598d6
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/interrupt-3.c
@@ -0,0 +1,14 @@
+void __attribute__ ((interrupt))
+handler0 (void)
+{ /* { dg-error "wrong number of arguments specified" } */
+}
+
+void __attribute__ ((interrupt("you load too")))
+handler1 (void)
+{ /* { dg-warning "is not \"ilink1\" or \"ilink2\"" } */
+}
+
+void __attribute__ ((interrupt(42)))
+hander2 (void)
+{ /* { dg-warning "is not a string constant" } */
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/jump-around-jump.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/jump-around-jump.c
new file mode 100644
index 0000000..1b45328
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/jump-around-jump.c
@@ -0,0 +1,123 @@
+/* { dg-do compile } */
+/* { dg-options "-Os -mlock -mswape -mrtsc -fno-reorder-blocks" } */
+
+/* This caused an ICE in arc_ifcvt when the 1->3 state change was not
+ implemented for TYPE_UNCOND_BRANCH in arc_ccfsm_post_advance. */
+
+typedef long __kernel_long_t;
+typedef __kernel_long_t __kernel_time_t;
+
+struct timespec {
+ __kernel_time_t tv_sec;
+ long tv_nsec;
+};
+
+
+struct module;
+struct device {
+ struct device *parent;
+};
+
+struct rtc_time {
+ int tm_sec;
+ int tm_min;
+ int tm_hour;
+ int tm_mday;
+ int tm_mon;
+ int tm_year;
+ int tm_wday;
+ int tm_yday;
+ int tm_isdst;
+};
+struct rtc_wkalrm {
+ unsigned char enabled;
+ unsigned char pending;
+ struct rtc_time time;
+};
+
+struct rtc_class_ops {
+ int (*open)(struct device *);
+ void (*release)(struct device *);
+ int (*ioctl)(struct device *, unsigned int, unsigned long);
+ int (*read_time)(struct device *, struct rtc_time *);
+ int (*set_time)(struct device *, struct rtc_time *);
+ int (*read_alarm)(struct device *, struct rtc_wkalrm *);
+ int (*set_alarm)(struct device *, struct rtc_wkalrm *);
+ //int (*proc)(struct device *, struct seq_file *);
+ int (*set_mmss)(struct device *, unsigned long secs);
+ int (*read_callback)(struct device *, int data);
+ int (*alarm_irq_enable)(struct device *, unsigned int enabled);
+};
+
+struct rtc_device
+{
+ struct device dev;
+ struct module *owner;
+
+ int id;
+ char name[20];
+
+ const struct rtc_class_ops *ops;
+ // struct mutex ops_lock;
+
+ // struct cdev char_dev;
+ unsigned long flags;
+
+ unsigned long irq_data;
+ //spinlock_t irq_lock;
+ //wait_queue_head_t irq_queue;
+ //struct fasync_struct *async_queue;
+
+ //struct rtc_task *irq_task;
+ //spinlock_t irq_task_lock;
+ int irq_freq;
+ int max_user_freq;
+
+ //struct timerqueue_head timerqueue;
+ //struct rtc_timer aie_timer;
+ //struct rtc_timer uie_rtctimer;
+ //struct hrtimer pie_timer;
+ int pie_enabled;
+ //struct work_struct irqwork;
+
+ int uie_unsupported;
+
+
+ //struct work_struct uie_task;
+ //struct timer_list uie_timer;
+
+ unsigned int oldsecs;
+ unsigned int uie_irq_active:1;
+ unsigned int stop_uie_polling:1;
+ unsigned int uie_task_active:1;
+ unsigned int uie_timer_active:1;
+
+};
+
+extern void rtc_time_to_tm(unsigned long time, struct rtc_time *tm);
+extern struct rtc_device *rtc_class_open(const char *name);
+extern void rtc_class_close(struct rtc_device *rtc);
+
+
+int rtc_set_ntp_time(struct timespec now)
+{
+ struct rtc_device *rtc;
+ struct rtc_time tm;
+ int err = -19;
+
+ if (now.tv_nsec < (1000000000L >> 1))
+ rtc_time_to_tm(now.tv_sec, &tm);
+ else
+ rtc_time_to_tm(now.tv_sec + 1, &tm);
+
+ rtc = rtc_class_open("rtc0");
+ if (rtc) {
+
+
+ if (rtc->ops && (rtc->ops->set_time || rtc->ops->set_mmss))
+ err = rtc_set_time(rtc, &tm);
+ rtc_class_close(rtc);
+ }
+
+ return err;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/long-calls.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/long-calls.c
new file mode 100644
index 0000000..63fafbc
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/long-calls.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlong-calls" } */
+
+int g (void);
+
+int f (void)
+{
+ g();
+}
+
+/* { dg-final { scan-assembler "j @g" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mA6.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mA6.c
new file mode 100644
index 0000000..2e15a86
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mA6.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mA6" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mA7.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mA7.c
new file mode 100644
index 0000000..c4430f4
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mA7.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mA7" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC600.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC600.c
new file mode 100644
index 0000000..20e086a
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC601.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC601.c
new file mode 100644
index 0000000..1d30da4
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC700.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC700.c
new file mode 100644
index 0000000..43e9baa
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mARC700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc600.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
new file mode 100644
index 0000000..4c915fd
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc601.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
new file mode 100644
index 0000000..7c93c9d
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc700.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
new file mode 100644
index 0000000..c805a5a
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mcrc.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcrc.c
new file mode 100644
index 0000000..d3780bb
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mcrc.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mcrc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mdpfp.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdpfp.c
new file mode 100644
index 0000000..4bbc905
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdpfp.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp" } */
+
+double i;
+
+int f (void)
+{
+ i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "daddh" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mdsp-packa.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdsp-packa.c
new file mode 100644
index 0000000..f013a6d
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdsp-packa.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mdsp-packa" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mdvbf.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdvbf.c
new file mode 100644
index 0000000..e2e545e
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mdvbf.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mdvbf" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mlock.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mlock.c
new file mode 100644
index 0000000..3a8b050
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mlock.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mlock" } */
+/* { dg-do assemble } */
+
+int f (void *p)
+{
+ int i;
+
+ __asm__("llock %0, [%1]\n\t"
+ "scond %0, [%1]" : "=&r"(i) : "r"(p));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-24.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-24.c
new file mode 100644
index 0000000..30cb698
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-24.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mmac-24" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-d16.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-d16.c
new file mode 100644
index 0000000..0570011
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mmac-d16.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mmac-d16" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-crc.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-crc.c
new file mode 100644
index 0000000..70ab9c1
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-crc.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-crc" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
new file mode 100644
index 0000000..eb21522
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-dsp-packa" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dvbf.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dvbf.c
new file mode 100644
index 0000000..ea96d98
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-dvbf.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-dvbf" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-lock.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-lock.c
new file mode 100644
index 0000000..62ac885
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-lock.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-lock" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (void *p)
+{
+ int i;
+
+ __asm__("llock %0, [%1]\n\t"
+ "scond %0, [%1]" : "=&r"(i) : "r"(p));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-24.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-24.c
new file mode 100644
index 0000000..b483957
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-24.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-24" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-d16.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
new file mode 100644
index 0000000..68a20f4
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-d16" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-rtsc.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-rtsc.c
new file mode 100644
index 0000000..d74a60e
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-rtsc.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-rtsc" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-swape.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-swape.c
new file mode 100644
index 0000000..c853ab4
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-swape.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-swape" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+int f (int i)
+{
+ __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-xy.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-xy.c
new file mode 100644
index 0000000..e378b3f
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mno-xy.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-xy" } */
+/* Would also like to assemble and check that we get the expected
+ "Error: bad instruction" assembler messages, but at the moment our
+ testharness can't do that. */
+
+void f (int i)
+{
+ __asm__("add x0_u0, x0_u0, %0" : : "r" (i));
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mrtsc.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mrtsc.c
new file mode 100644
index 0000000..31852a5
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mrtsc.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mrtsc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mspfp.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mspfp.c
new file mode 100644
index 0000000..0e41ff8
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mspfp.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mspfp" } */
+
+float i;
+
+int f (void)
+{
+ i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "fadd" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mswape.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mswape.c
new file mode 100644
index 0000000..692e6a2
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mswape.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mswape" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+ __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+ return i;
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC600.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
new file mode 100644
index 0000000..a483d14
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC601.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
new file mode 100644
index 0000000..ed57bd7
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
new file mode 100644
index 0000000..2f1e137
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700-xmac" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
new file mode 100644
index 0000000..851ea73
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
new file mode 100644
index 0000000..e2aa484
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC725D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
new file mode 100644
index 0000000..2092330
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC750D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mul64.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mul64.c
new file mode 100644
index 0000000..3678b27
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mul64.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC600 -mmul64" } */
+#include <stdint.h>
+
+int64_t i;
+int j, k;
+
+int f (void)
+{
+ i = j * k;
+}
+
+/* { dg-final { scan-assembler "mul64" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
new file mode 100644
index 0000000..398ecfe
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
@@ -0,0 +1,28 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mARC700 --save-temps" } */
+
+#include <stdlib.h>
+
+/* Hide value propagation from the optimizers. */
+static int
+id (int i)
+{
+ asm ("": "+Xr" (i));
+ return i;
+}
+
+static int
+mulhigh (unsigned a, unsigned b)
+{
+ return (unsigned long long) a * b >> 32;
+}
+
+int
+main (void)
+{
+ if (mulhigh (id (0x12345678), id (0x90abcdef)) != 0xa49a83e)
+ abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "mpyhu\[ \t\]" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
new file mode 100644
index 0000000..ccc74e7
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
@@ -0,0 +1,30 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mARC700 --save-temps -mno-mpy" } */
+
+#include <stdlib.h>
+
+/* Hide value propagation from the optimizers. */
+static int
+id (int i)
+{
+ asm ("": "+Xr" (i));
+ return i;
+}
+
+static int
+mulhigh (unsigned a, unsigned b)
+{
+ return (unsigned long long) a * b >> 32;
+}
+
+int
+main (void)
+{
+ if (mulhigh (id (0x12345678), id (0x90abcdef)) != 0xa49a83e)
+ abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not "mpyhu\[ \t\]" } } */
+/* { dg-final { scan-assembler-not "@__muldi3" } } */
+/* { dg-final { scan-assembler "@__umulsi3_highpart" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/mxy.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/mxy.c
new file mode 100644
index 0000000..1ecc34d
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/mxy.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mxy" } */
+/* { dg-do assemble } */
+
+void f (int i)
+{
+ __asm__("add x0_u0, x0_u0, %0" : : "r" (i));
+}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
new file mode 100644
index 0000000..e4e23e4
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp -mno-dpfp-lrsr" } */
+
+double i;
+
+int f (void)
+{
+ i *= 2.0;
+}
+
+/* { dg-final { scan-assembler-not "\tlr" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/nv-cache.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/nv-cache.c
new file mode 100644
index 0000000..9687195
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/nv-cache.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-volatile-cache" } */
+
+volatile int i;
+void f (void)
+{
+ i = 0;
+}
+/* { dg-final { scan-assembler "st\.di" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-1.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-1.c
new file mode 100644
index 0000000..3d8366c
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msdata" } */
+
+int i;
+
+int f (void)
+{
+ return i;
+}
+/* { dg-final { scan-assembler "@sda" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-2.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-2.c
new file mode 100644
index 0000000..ebaa25e
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/sdata-2.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-sdata" } */
+
+int i;
+
+int f (void)
+{
+ return i;
+}
+/* { dg-final { scan-assembler-not "@sda" } } */
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arc/v-cache.c b/gcc-4.9/gcc/testsuite/gcc.target/arc/v-cache.c
new file mode 100644
index 0000000..7722c43
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arc/v-cache.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mvolatile-cache" } */
+
+volatile int i;
+void f (void)
+{
+ i = 0;
+}
+/* { dg-final { scan-assembler-not "st\.di" } } */