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authorCaroline Tice <cmtice@google.com>2016-02-10 22:40:41 (GMT)
committerCaroline Tice <cmtice@google.com>2016-02-26 16:25:55 (GMT)
commit817a788f9eb01eff367191401d48f2aaa8d4f428 (patch)
tree637f745404b37fbf3fcff629227d7d542725e5fe /gcc-4.9/gcc/testsuite/gcc.target/aarch64
parenta4ca82cac69c3147143d7b4b4d7cdeb5e02f20ef (diff)
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Unify ChromeOS and Android versions of GCC.
This CL updates Android's GCC to match ChromeOS's GCC (with appropriate patches applied in both places to make sure no cherry-picked changes are lost). Change-Id: I390140c449b0e5df9ee78a06268319c8c510302f
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/aarch64')
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/aarch64/madd_after_asm_1.c14
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62040.c21
-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62262.c20
3 files changed, 0 insertions, 55 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/madd_after_asm_1.c b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/madd_after_asm_1.c
index 321d8f0..523941d 100644
--- a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/madd_after_asm_1.c
+++ b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/madd_after_asm_1.c
@@ -12,17 +12,3 @@ test (int a, double b, int c, int d, int e)
);
return c * d + e;
}
-/* { dg-do assemble } */
-/* { dg-options "-O2 -mfix-cortex-a53-835769" } */
-
-int
-test (int a, double b, int c, int d, int e)
-{
- double result;
- __asm__ __volatile ("// %0, %1"
- : "=w" (result)
- : "0" (b)
- : /* No clobbers */
- );
- return c * d + e;
-}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62040.c b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62040.c
index c6cae4d..cfb4979 100644
--- a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62040.c
+++ b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62040.c
@@ -19,24 +19,3 @@ foo ()
int32x4_t out = vtrn1q_s32 (xxx, xxx);
bar (out);
}
-/* { dg-do compile } */
-/* { dg-options "-g -Os" } */
-
-#include "arm_neon.h"
-
-extern void bar (int32x4_t);
-
-void
-foo ()
-{
- int32x4x4_t rows;
- uint64x2x2_t row01;
-
- row01.val[0] = vreinterpretq_u64_s32 (rows.val[0]);
- row01.val[1] = vreinterpretq_u64_s32 (rows.val[1]);
- uint64x1_t row3l = vget_low_u64 (row01.val[0]);
- row01.val[0] = vcombine_u64 (vget_low_u64 (row01.val[1]), row3l);
- int32x4_t xxx = vreinterpretq_s32_u64 (row01.val[0]);
- int32x4_t out = vtrn1q_s32 (xxx, xxx);
- bar (out);
-}
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62262.c b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62262.c
index 20763b4..5bf90bf 100644
--- a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62262.c
+++ b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/pr62262.c
@@ -18,23 +18,3 @@ int foo(int value)
int packed = (unsigned)(value << 9) >> 9;
return packed;
}
-/* { dg-do compile } */
-/* { dg-options "-O2 -fprofile-use" } */
-
-static inline int CLZ(int mask) {
- return mask ? __builtin_clz(mask) : 32;
-}
-
-int foo(int value)
-{
- if (value == 0)
- return 0;
-
- int bias = CLZ(value);
- value >>= bias;
- int zeros = CLZ(value << 1);
- value <<= zeros;
-
- int packed = (unsigned)(value << 9) >> 9;
- return packed;
-}