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author | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2014-03-25 22:37:19 -0700 |
commit | 1bc5aee63eb72b341f506ad058502cd0361f0d10 (patch) | |
tree | c607e8252f3405424ff15bc2d00aa38dadbb2518 /gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C | |
parent | 283a0bf58fcf333c58a2a92c3ebbc41fb9eb1fdb (diff) | |
download | toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.gz toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.tar.bz2 toolchain_gcc-1bc5aee63eb72b341f506ad058502cd0361f0d10.zip |
Initial checkin of GCC 4.9.0 from trunk (r208799).
Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
Diffstat (limited to 'gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C')
-rw-r--r-- | gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C b/gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C new file mode 100644 index 000000000..09540e841 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C @@ -0,0 +1,55 @@ +// Test that AArch64 AdvSIMD (NEON) vector types have their names mangled +// correctly. + +// { dg-do compile { target { aarch64*-*-* } } } + +#include <arm_neon.h> + +void f0 (int8x8_t a) {} +void f1 (int16x4_t a) {} +void f2 (int32x2_t a) {} +void f3 (uint8x8_t a) {} +void f4 (uint16x4_t a) {} +void f5 (uint32x2_t a) {} +void f6 (float32x2_t a) {} +void f7 (poly8x8_t a) {} +void f8 (poly16x4_t a) {} + +void f9 (int8x16_t a) {} +void f10 (int16x8_t a) {} +void f11 (int32x4_t a) {} +void f12 (int64x2_t a) {} +void f13 (uint8x16_t a) {} +void f14 (uint16x8_t a) {} +void f15 (uint32x4_t a) {} +void f16 (uint64x2_t a) {} +void f17 (float32x4_t a) {} +void f18 (float64x2_t a) {} +void f19 (poly8x16_t a) {} +void f20 (poly16x8_t a) {} + +void f21 (int8x16_t, int8x16_t) {} + + +// { dg-final { scan-assembler "_Z2f010__Int8x8_t:" } } +// { dg-final { scan-assembler "_Z2f111__Int16x4_t:" } } +// { dg-final { scan-assembler "_Z2f211__Int32x2_t:" } } +// { dg-final { scan-assembler "_Z2f311__Uint8x8_t:" } } +// { dg-final { scan-assembler "_Z2f412__Uint16x4_t:" } } +// { dg-final { scan-assembler "_Z2f512__Uint32x2_t:" } } +// { dg-final { scan-assembler "_Z2f613__Float32x2_t:" } } +// { dg-final { scan-assembler "_Z2f711__Poly8x8_t:" } } +// { dg-final { scan-assembler "_Z2f812__Poly16x4_t:" } } +// { dg-final { scan-assembler "_Z2f911__Int8x16_t:" } } +// { dg-final { scan-assembler "_Z3f1011__Int16x8_t:" } } +// { dg-final { scan-assembler "_Z3f1111__Int32x4_t:" } } +// { dg-final { scan-assembler "_Z3f1211__Int64x2_t:" } } +// { dg-final { scan-assembler "_Z3f1312__Uint8x16_t:" } } +// { dg-final { scan-assembler "_Z3f1412__Uint16x8_t:" } } +// { dg-final { scan-assembler "_Z3f1512__Uint32x4_t:" } } +// { dg-final { scan-assembler "_Z3f1612__Uint64x2_t:" } } +// { dg-final { scan-assembler "_Z3f1713__Float32x4_t:" } } +// { dg-final { scan-assembler "_Z3f1813__Float64x2_t:" } } +// { dg-final { scan-assembler "_Z3f1912__Poly8x16_t:" } } +// { dg-final { scan-assembler "_Z3f2012__Poly16x8_t:" } } +// { dg-final { scan-assembler "_Z3f2111__Int8x16_tS_:" } } |