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| author | Steve Ellcey <Steve.Ellcey@imgtec.com> | 2014-07-03 13:28:53 -0700 |
|---|---|---|
| committer | Steve Ellcey <Steve.Ellcey@imgtec.com> | 2014-07-03 16:10:41 -0700 |
| commit | e7af147f979e657fe2df00808e5b4319b0e088c6 (patch) | |
| tree | 4f302235c4ef4c0dce52449576c1b65333433cd5 /gcc-4.9/gcc/dwarf2cfi.c | |
| parent | 1610db7b1892fe4da05cf4b0f64d9653978507d8 (diff) | |
| download | toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.tar.gz toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.tar.bz2 toolchain_gcc-e7af147f979e657fe2df00808e5b4319b0e088c6.zip | |
Update GCC 4.9 to include mips32r6, mips64r6 and MSA changes.
Change-Id: I136290865b137531d55321987818fc954a65f5d6
Diffstat (limited to 'gcc-4.9/gcc/dwarf2cfi.c')
| -rw-r--r-- | gcc-4.9/gcc/dwarf2cfi.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/dwarf2cfi.c b/gcc-4.9/gcc/dwarf2cfi.c index abcdeb344..3259efd75 100644 --- a/gcc-4.9/gcc/dwarf2cfi.c +++ b/gcc-4.9/gcc/dwarf2cfi.c @@ -252,6 +252,10 @@ init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c) gen_int_mode (size, mode)); } +#ifndef DWARF_REG_MODE +#define DWARF_REG_MODE(REGNO, MODE) (MODE) +#endif + /* Generate code to initialize the register size table. */ void @@ -276,6 +280,7 @@ expand_builtin_init_dwarf_reg_sizes (tree address) if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode)) save_mode = choose_hard_reg_mode (i, 1, true); + save_mode = DWARF_REG_MODE (i, save_mode); if (dnum == DWARF_FRAME_RETURN_COLUMN) { if (save_mode == VOIDmode) |