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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2014-07-11 15:24:10 +0400 |
|---|---|---|
| committer | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2014-08-06 16:24:16 +0400 |
| commit | 55f9fbb03d0413cb8fe74e5ec5d6c2dd4280933e (patch) | |
| tree | a276531909449c8ed589df86ad3cfdd3048b7400 /gcc-4.9/gcc/config/i386/predicates.md | |
| parent | 38a8aecfb882072900434499696b5c32a2274515 (diff) | |
| download | toolchain_gcc-55f9fbb03d0413cb8fe74e5ec5d6c2dd4280933e.tar.gz toolchain_gcc-55f9fbb03d0413cb8fe74e5ec5d6c2dd4280933e.tar.bz2 toolchain_gcc-55f9fbb03d0413cb8fe74e5ec5d6c2dd4280933e.zip | |
[4.8, 4.9] Backport of additional SLM tuning.
Six patches from trunk, reg-tested via 'make check':
2014-05-07 Evgeny Stupachenko <evstupac@gmail.com>
* tree-vect-data-refs.c (vect_grouped_load_supported): New
check for loads group of length 3.
(vect_permute_load_chain): New permutations for loads group of
length 3.
* tree-vect-stmts.c (vect_model_load_cost): Change cost
of vec_perm_shuffle for the new permutations.
2014-04-17 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/i386.c (x86_add_stmt_cost): Fix vector cost model for
Silvermont.
2014-04-17 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/x86-tune.def (TARGET_SLOW_PSHUFB): New tune definition.
* config/i386/i386.h (TARGET_SLOW_PSHUFB): New tune flag.
* config/i386/i386.c (expand_vec_perm_even_odd_1): Avoid byte shuffles
for TARGET_SLOW_PSHUFB
2014-04-17 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/i386.c (slm_cost): Adjust vec_to_scalar_cost.
* config/i386/i386.c (intel_cost): Ditto.
2014-06-18 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/i386.c (ix86_reassociation_width): Add alternative for
vector case.
* config/i386/i386.h (TARGET_VECTOR_PARALLEL_EXECUTION): New.
* config/i386/x86-tune.def (X86_TUNE_VECTOR_PARALLEL_EXECUTION): New.
* tree-vect-data-refs.c (vect_shift_permute_load_chain): New.
Introduces alternative way of loads group permutaions.
(vect_transform_grouped_load): Try alternative way of permutations.
2014-06-05 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/sse.md (*ssse3_palignr<mode>_perm): New.
* config/i386/predicates.md (palignr_operand): New.
Indicates if permutation is suitable for palignr instruction.
Change-Id: I5e505735ce3dc0ec3c2a1151713a119b24d712fe
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
Diffstat (limited to 'gcc-4.9/gcc/config/i386/predicates.md')
| -rw-r--r-- | gcc-4.9/gcc/config/i386/predicates.md | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/config/i386/predicates.md b/gcc-4.9/gcc/config/i386/predicates.md index 2ef138424..8266f3eaf 100644 --- a/gcc-4.9/gcc/config/i386/predicates.md +++ b/gcc-4.9/gcc/config/i386/predicates.md @@ -1417,6 +1417,22 @@ return true; }) +;; Return true if OP is a parallel for a palignr permute. +(define_predicate "palignr_operand" + (and (match_code "parallel") + (match_code "const_int" "a")) +{ + int elt = INTVAL (XVECEXP (op, 0, 0)); + int i, nelt = XVECLEN (op, 0); + + /* Check that an order in the permutation is suitable for palignr. + For example, {5 6 7 0 1 2 3 4} is "palignr 5, xmm, xmm". */ + for (i = 1; i < nelt; ++i) + if (INTVAL (XVECEXP (op, 0, i)) != ((elt + i) % nelt)) + return false; + return true; +}) + ;; Return true if OP is a proper third operand to vpblendw256. (define_predicate "avx2_pblendw_operand" (match_code "const_int") |