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authorAndrew Hsieh <andrewhsieh@google.com>2013-05-15 10:30:44 +0800
committerAndrew Hsieh <andrewhsieh@google.com>2013-05-15 10:45:07 +0800
commitd909af3e2469aad87d5c3e79b93c778fd26c03a9 (patch)
treed0f9a66cde1c99576e7efb0fe24ee19ae66be8ca /gcc-4.8
parent6e6510c702f12bc6320681075cc0ba8dc2c814a7 (diff)
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Fix ARM/GCC-4.7,4.8 generates insufficient alignment for NEON vst/vld
GCC allocates memory buffer and passes it as the first hidden argument for function return large composite type (ie. > 4 bytes for all NDK toolchain). Problem is that GCC doesn't observe the aligement required by the type, and ARM EABI only requires stack to be aligned to 8-byte. Please see http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57271 for external bug tracking this issue and testcase. This CL offers temp relief before formal one Change-Id: I8004bc4208487e539ba8b0c9686c44ac86c37d83
Diffstat (limited to 'gcc-4.8')
-rw-r--r--gcc-4.8/gcc/config/arm/arm.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/gcc-4.8/gcc/config/arm/arm.c b/gcc-4.8/gcc/config/arm/arm.c
index dd88f0bcc..401538783 100644
--- a/gcc-4.8/gcc/config/arm/arm.c
+++ b/gcc-4.8/gcc/config/arm/arm.c
@@ -18144,9 +18144,13 @@ arm_print_operand (FILE *stream, rtx x, int code)
memsize = MEM_SIZE (x);
/* Only certain alignment specifiers are supported by the hardware. */
- if (memsize == 32 && (align % 32) == 0)
+ /* Note that ARM EABI only guarentees 8-byte stack alignment. While GCC
+ honors stricter alignment of composite type in user code, it doesn't
+ observe the alignment of memory passed as an extra argument for function
+ returning large composite type. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57271 */
+ if (memsize == 32 && (align % 32) == 0 && !TARGET_AAPCS_BASED)
align_bits = 256;
- else if ((memsize == 16 || memsize == 32) && (align % 16) == 0)
+ else if ((memsize == 16 || memsize == 32) && (align % 16) == 0 && !TARGET_AAPCS_BASED)
align_bits = 128;
else if (memsize >= 8 && (align % 8) == 0)
align_bits = 64;