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author | Ben Cheng <bccheng@google.com> | 2012-10-01 10:30:31 -0700 |
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committer | Ben Cheng <bccheng@google.com> | 2012-10-01 10:30:31 -0700 |
commit | 82bcbebce43f0227f506d75a5b764b6847041bae (patch) | |
tree | fe9f8597b48a430c4daeb5123e3e8eb28e6f9da9 /gcc-4.7/gcc/config/xtensa/xtensa.opt | |
parent | 3c052de3bb16ac53b6b6ed659ec7557eb84c7590 (diff) | |
download | toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.tar.gz toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.tar.bz2 toolchain_gcc-82bcbebce43f0227f506d75a5b764b6847041bae.zip |
Initial check-in of gcc 4.7.2.
Change-Id: I4a2f5a921c21741a0e18bda986d77e5f1bef0365
Diffstat (limited to 'gcc-4.7/gcc/config/xtensa/xtensa.opt')
-rw-r--r-- | gcc-4.7/gcc/config/xtensa/xtensa.opt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/gcc-4.7/gcc/config/xtensa/xtensa.opt b/gcc-4.7/gcc/config/xtensa/xtensa.opt new file mode 100644 index 000000000..e78104f1c --- /dev/null +++ b/gcc-4.7/gcc/config/xtensa/xtensa.opt @@ -0,0 +1,43 @@ +; Options for the Tensilica Xtensa port of the compiler. + +; Copyright (C) 2005, 2007, 2008, 2010 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; <http://www.gnu.org/licenses/>. + +mconst16 +Target Report Mask(CONST16) +Use CONST16 instruction to load constants + +mforce-no-pic +Target Report Mask(FORCE_NO_PIC) +Disable position-independent code (PIC) for use in OS kernel code + +mlongcalls +Target +Use indirect CALLXn instructions for large programs + +mtarget-align +Target +Automatically align branch targets to reduce branch penalties + +mtext-section-literals +Target +Intersperse literal pools with code in the text section + +mserialize-volatile +Target Report Mask(SERIALIZE_VOLATILE) +-mno-serialize-volatile Do not serialize volatile memory references with MEMW instructions |