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authorPavel Chupin <pavel.v.chupin@intel.com>2013-12-09 12:59:31 +0400
committerPavel Chupin <pavel.v.chupin@intel.com>2013-12-09 18:05:00 +0400
commit03518e5fd50ca1389a55a9d443d7277ec03d1cde (patch)
treebfb2a4a135d008fe90a439e808c0ec4fff870f03 /gcc-4.6
parentbfad6b9d996c13f4be3625f095152eb9f0a175bc (diff)
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[4.6, 4.8] Add -mtune=intel support
This is backport of r205719 and r205754 from trunk. Now -mtune=intel matches -mtune=slm for 4.8 and -mtune=atom for 4.6. As written in gcc-4.8 docs: Produce code optimized for the most current Intel processors, which are Haswell and Silvermont for this version of GCC. If you know the CPU on which your code will run, then you should use the corresponding -mtune or -march option instead of -mtune=intel. But, if you want your application performs better on both Haswell and Silvermont, then you should use this option. As new Intel processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of GCC, code generation controlled by this option will change to reflect the most current Intel processors at the time that version of GCC is released. There is no -march=intel option because -march indicates the instruction set the compiler can use, and there is no common instruction set applicable to all processors. In contrast, -mtune indicates the processor (or, in this case, collection of processors) for which the code is optimized. Change-Id: I3ec4c3b5423d9b3547cd8e3aa77a18af3fd89598 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
Diffstat (limited to 'gcc-4.6')
-rw-r--r--gcc-4.6/gcc/config.gcc12
-rw-r--r--gcc-4.6/gcc/config/i386/i386.c7
-rw-r--r--gcc-4.6/gcc/config/i386/i386.h1
-rw-r--r--gcc-4.6/gcc/doc/invoke.texi21
4 files changed, 35 insertions, 6 deletions
diff --git a/gcc-4.6/gcc/config.gcc b/gcc-4.6/gcc/config.gcc
index 3f1fab3..7a2b9e4 100644
--- a/gcc-4.6/gcc/config.gcc
+++ b/gcc-4.6/gcc/config.gcc
@@ -1271,7 +1271,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
need_64bit_hwint=yes
need_64bit_isa=yes
case X"${with_cpu}" in
- Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1429,7 +1429,7 @@ i[34567]86-*-solaris2*)
need_64bit_isa=yes
use_gcc_stdint=wrap
case X"${with_cpu}" in
- Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1438,7 +1438,7 @@ i[34567]86-*-solaris2*)
;;
*)
echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "generic atom core2 corei7 corei7-avx nocona x86-64 bdver1 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ echo "generic intel atom core2 corei7 corei7-avx nocona x86-64 bdver1 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
exit 1
;;
esac
@@ -1515,7 +1515,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
if test x$enable_targets = xall; then
tm_defines="${tm_defines} TARGET_BI_ARCH=1"
case X"${with_cpu}" in
- Xgeneric|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
+ Xgeneric|Xintel|Xatom|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver1|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
;;
X)
if test x$with_cpu_64 = x; then
@@ -1524,7 +1524,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
;;
*)
echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
- echo "generic atom core2 corei7 Xcorei7-avx nocona x86-64 bdver1 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
+ echo "generic intel atom core2 corei7 Xcorei7-avx nocona x86-64 bdver1 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
exit 1
;;
esac
@@ -3398,7 +3398,7 @@ case "${target}" in
esac
# OK
;;
- "" | x86-64 | generic | native \
+ "" | x86-64 | generic | intel | native \
| k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \
| opteron-sse3 | athlon-fx | bdver1 | btver1 | amdfam10 \
| barcelona | nocona | core2 | corei7 | corei7-avx | atom)
diff --git a/gcc-4.6/gcc/config/i386/i386.c b/gcc-4.6/gcc/config/i386/i386.c
index 6e7eb61..193d15e 100644
--- a/gcc-4.6/gcc/config/i386/i386.c
+++ b/gcc-4.6/gcc/config/i386/i386.c
@@ -2683,6 +2683,7 @@ static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =
"core2",
"corei7",
"atom",
+ "intel",
"geode",
"k6",
"k6-2",
@@ -3434,6 +3435,9 @@ ix86_option_override_internal (bool main_args_p)
{"atom", PROCESSOR_ATOM, CPU_ATOM,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_CX16 | PTA_MOVBE},
+ {"intel", PROCESSOR_ATOM, CPU_ATOM,
+ PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+ | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE},
{"geode", PROCESSOR_GEODE, CPU_GEODE,
PTA_MMX | PTA_3DNOW | PTA_3DNOW_A |PTA_PREFETCH_SSE},
{"k6", PROCESSOR_K6, CPU_K6, PTA_MMX},
@@ -3766,6 +3770,9 @@ ix86_option_override_internal (bool main_args_p)
if (!strcmp (ix86_arch_string, "generic"))
error ("generic CPU can be used only for %stune=%s %s",
prefix, suffix, sw);
+ else if (!strcmp (ix86_arch_string, "intel"))
+ error ("intel CPU can be used only for %stune=%s %s",
+ prefix, suffix, sw);
else if (!strncmp (ix86_arch_string, "generic", 7) || i == pta_size)
error ("bad value (%s) for %sarch=%s %s",
ix86_arch_string, prefix, suffix, sw);
diff --git a/gcc-4.6/gcc/config/i386/i386.h b/gcc-4.6/gcc/config/i386/i386.h
index e1a1dc8..81877fc 100644
--- a/gcc-4.6/gcc/config/i386/i386.h
+++ b/gcc-4.6/gcc/config/i386/i386.h
@@ -592,6 +592,7 @@ enum target_cpu_default
TARGET_CPU_DEFAULT_core2,
TARGET_CPU_DEFAULT_corei7,
TARGET_CPU_DEFAULT_atom,
+ TARGET_CPU_DEFAULT_intel,
TARGET_CPU_DEFAULT_geode,
TARGET_CPU_DEFAULT_k6,
diff --git a/gcc-4.6/gcc/doc/invoke.texi b/gcc-4.6/gcc/doc/invoke.texi
index 7e09c8c..8f072f7 100644
--- a/gcc-4.6/gcc/doc/invoke.texi
+++ b/gcc-4.6/gcc/doc/invoke.texi
@@ -12683,6 +12683,27 @@ indicates the instruction set the compiler can use, and there is no
generic instruction set applicable to all processors. In contrast,
@option{-mtune} indicates the processor (or, in this case, collection of
processors) for which the code is optimized.
+
+@item intel
+Produce code optimized for the most current Intel processors, which are
+Sandy Bridge and Bonnell for this version of GCC. If you know the CPU
+on which your code will run, then you should use the corresponding
+@option{-mtune} or @option{-march} option instead of @option{-mtune=intel}.
+But, if you want your application performs better on both Sandy Bridge and
+Bonnell, then you should use this option.
+
+As new Intel processors are deployed in the marketplace, the behavior of
+this option will change. Therefore, if you upgrade to a newer version of
+GCC, code generation controlled by this option will change to reflect
+the most current Intel processors at the time that version of GCC is
+released.
+
+There is no @option{-march=intel} option because @option{-march} indicates
+the instruction set the compiler can use, and there is no common
+instruction set applicable to all processors. In contrast,
+@option{-mtune} indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+
@item native
This selects the CPU to tune for at compilation time by determining
the processor type of the compiling machine. Using @option{-mtune=native}