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| author | Jing Yu <jingyu@google.com> | 2011-12-19 16:56:54 -0800 |
|---|---|---|
| committer | Jing Yu <jingyu@google.com> | 2011-12-19 16:56:54 -0800 |
| commit | 40d7cd0fd78fe2004e2a53c4618c148339b02733 (patch) | |
| tree | 5874557a6c86a1f564a03e5f28b266e31bc3759c /gcc-4.6/gcc/config/m32c/m32c.opt | |
| parent | fe2afdf3f3701489c05d2a7509752d6f0c7616f7 (diff) | |
| download | toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.tar.gz toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.tar.bz2 toolchain_gcc-40d7cd0fd78fe2004e2a53c4618c148339b02733.zip | |
Add gcc-4.6. Synced to @180989
Change-Id: Ie3676586e1d8e3c8cd9f07d022f450d05fa08439
svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6-mobile
Diffstat (limited to 'gcc-4.6/gcc/config/m32c/m32c.opt')
| -rw-r--r-- | gcc-4.6/gcc/config/m32c/m32c.opt | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/gcc-4.6/gcc/config/m32c/m32c.opt b/gcc-4.6/gcc/config/m32c/m32c.opt new file mode 100644 index 000000000..d19153bbe --- /dev/null +++ b/gcc-4.6/gcc/config/m32c/m32c.opt @@ -0,0 +1,44 @@ +; Target Options for R8C/M16C/M32C +; Copyright (C) 2005 2007 +; Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published +; by the Free Software Foundation; either version 3, or (at your +; option) any later version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT +; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +; License for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; <http://www.gnu.org/licenses/>. + +msim +Target +-msim Use simulator runtime + +mcpu=r8c +Target RejectNegative Var(target_cpu,'r') Init('r') +-mcpu=r8c Compile code for R8C variants + +mcpu=m16c +Target RejectNegative Var(target_cpu,'6') +-mcpu=m16c Compile code for M16C variants + +mcpu=m32cm +Target RejectNegative Var(target_cpu,'m') +-mcpu=m32cm Compile code for M32CM variants + +mcpu=m32c +Target RejectNegative Var(target_cpu,'3') +-mcpu=m32c Compile code for M32C variants + +memregs= +Target RejectNegative Joined Var(target_memregs_string) +-memregs= Number of memreg bytes (default: 16, range: 0..16) |