Fix ARM internal compiler error with negative shift amount

Back port fix of ARM ICE compiling the following code with
int foo(int a, int b)
{
    return a | (b << -3);
}

See http://gcc.gnu.org/ml/gcc-patches/2011-10/msg00594.html

Change-Id: Ic4c675a3830d7f213d8abdcf158ca296a836851b

1 files changed, 10 insertions, 1 deletions

diff --git a/gcc-4.6/gcc/config/arm/predicates.md b/gcc-4.6/gcc/config/arm/predicates.md
index e34b46da0..7f20106ba 100644
--- a/gcc-4.6/gcc/config/arm/predicates.md
+++ b/gcc-4.6/gcc/config/arm/predicates.md
@@ -129,6 +129,8 @@
   (ior (match_operand 0 "arm_rhs_operand")
        (match_operand 0 "memory_operand")))
 
+;; This doesn't have to do much because the constant is already checked
+;; in the shift_operator predicate.
 (define_predicate "shift_amount_operand"
   (ior (and (match_test "TARGET_ARM")
 	    (match_operand 0 "s_register_operand"))
@@ -218,13 +220,20 @@
        (match_test "mode == GET_MODE (op)")))
 
 ;; True for shift operators.
+;; Notes:
+;;  * mult is only permitted with a constant shift amount
+;;  * patterns that permit register shift amounts only in ARM mode use
+;;    shift_amount_operand, patterns that always allow registers do not,
+;;    so we don't have to worry about that sort of thing here.
 (define_special_predicate "shift_operator"
   (and (ior (ior (and (match_code "mult")
 		      (match_test "power_of_two_operand (XEXP (op, 1), mode)"))
 		 (and (match_code "rotate")
 		      (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT
 				   && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
-	    (match_code "ashift,ashiftrt,lshiftrt,rotatert"))
+	    (and (match_code "ashift,ashiftrt,lshiftrt,rotatert")
+		 (match_test "GET_CODE (XEXP (op, 1)) != CONST_INT
+			      || ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
        (match_test "mode == GET_MODE (op)")))
 
 ;; True for MULT, to identify which variant of shift_operator is in use.