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author | Dan Albert <danalbert@google.com> | 2015-06-17 11:09:54 -0700 |
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committer | Dan Albert <danalbert@google.com> | 2015-06-17 14:15:22 -0700 |
commit | f378ebf14df0952eae870c9865bab8326aa8f137 (patch) | |
tree | 31794503eb2a8c64ea5f313b93100f1163afcffb /gcc-4.4.3/gcc/config/rs6000/rs6000.opt | |
parent | 2c58169824949d3a597d9fa81931e001ef9b1bd0 (diff) | |
download | toolchain_gcc-f378ebf14df0952eae870c9865bab8326aa8f137.tar.gz toolchain_gcc-f378ebf14df0952eae870c9865bab8326aa8f137.tar.bz2 toolchain_gcc-f378ebf14df0952eae870c9865bab8326aa8f137.zip |
Delete old versions of GCC.
Change-Id: I710f125d905290e1024cbd67f48299861790c66c
Diffstat (limited to 'gcc-4.4.3/gcc/config/rs6000/rs6000.opt')
-rw-r--r-- | gcc-4.4.3/gcc/config/rs6000/rs6000.opt | 296 |
1 files changed, 0 insertions, 296 deletions
diff --git a/gcc-4.4.3/gcc/config/rs6000/rs6000.opt b/gcc-4.4.3/gcc/config/rs6000/rs6000.opt deleted file mode 100644 index 8a6235278..000000000 --- a/gcc-4.4.3/gcc/config/rs6000/rs6000.opt +++ /dev/null @@ -1,296 +0,0 @@ -; Options for the rs6000 port of the compiler -; -; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. -; Contributed by Aldy Hernandez <aldy@quesejoda.com>. -; -; This file is part of GCC. -; -; GCC is free software; you can redistribute it and/or modify it under -; the terms of the GNU General Public License as published by the Free -; Software Foundation; either version 3, or (at your option) any later -; version. -; -; GCC is distributed in the hope that it will be useful, but WITHOUT -; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -; License for more details. -; -; You should have received a copy of the GNU General Public License -; along with GCC; see the file COPYING3. If not see -; <http://www.gnu.org/licenses/>. - -mpower -Target Report RejectNegative Mask(POWER) -Use POWER instruction set - -mno-power -Target Report RejectNegative -Do not use POWER instruction set - -mpower2 -Target Report Mask(POWER2) -Use POWER2 instruction set - -mpowerpc -Target Report RejectNegative Mask(POWERPC) -Use PowerPC instruction set - -mno-powerpc -Target Report RejectNegative -Do not use PowerPC instruction set - -mpowerpc64 -Target Report Mask(POWERPC64) -Use PowerPC-64 instruction set - -mpowerpc-gpopt -Target Report Mask(PPC_GPOPT) -Use PowerPC General Purpose group optional instructions - -mpowerpc-gfxopt -Target Report Mask(PPC_GFXOPT) -Use PowerPC Graphics group optional instructions - -mmfcrf -Target Report Mask(MFCRF) -Use PowerPC V2.01 single field mfcr instruction - -mpopcntb -Target Report Mask(POPCNTB) -Use PowerPC V2.02 popcntb instruction - -mfprnd -Target Report Mask(FPRND) -Use PowerPC V2.02 floating point rounding instructions - -mcmpb -Target Report Mask(CMPB) -Use PowerPC V2.05 compare bytes instruction - -mmfpgpr -Target Report Mask(MFPGPR) -Use extended PowerPC V2.05 move floating point to/from GPR instructions - -maltivec -Target Report Mask(ALTIVEC) -Use AltiVec instructions - -mhard-dfp -Target Report Mask(DFP) -Use decimal floating point instructions - -mmulhw -Target Report Mask(MULHW) -Use 4xx half-word multiply instructions - -mdlmzb -Target Report Mask(DLMZB) -Use 4xx string-search dlmzb instruction - -mmultiple -Target Report Mask(MULTIPLE) -Generate load/store multiple instructions - -mstring -Target Report Mask(STRING) -Generate string instructions for block moves - -mnew-mnemonics -Target Report RejectNegative Mask(NEW_MNEMONICS) -Use new mnemonics for PowerPC architecture - -mold-mnemonics -Target Report RejectNegative InverseMask(NEW_MNEMONICS) -Use old mnemonics for PowerPC architecture - -msoft-float -Target Report RejectNegative Mask(SOFT_FLOAT) -Do not use hardware floating point - -mhard-float -Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) -Use hardware floating point - -mno-update -Target Report RejectNegative Mask(NO_UPDATE) -Do not generate load/store with update instructions - -mupdate -Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) -Generate load/store with update instructions - -mavoid-indexed-addresses -Target Report Var(TARGET_AVOID_XFORM) Init(-1) -Avoid generation of indexed load/store instructions when possible - -mno-fused-madd -Target Report RejectNegative Mask(NO_FUSED_MADD) -Do not generate fused multiply/add instructions - -mfused-madd -Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD) -Generate fused multiply/add instructions - -msched-prolog -Target Report Var(TARGET_SCHED_PROLOG) Init(1) -Schedule the start and end of the procedure - -msched-epilog -Target Undocumented Var(TARGET_SCHED_PROLOG) VarExists - -maix-struct-return -Target Report RejectNegative Var(aix_struct_return) -Return all structures in memory (AIX default) - -msvr4-struct-return -Target Report RejectNegative Var(aix_struct_return,0) VarExists -Return small structures in registers (SVR4 default) - -mxl-compat -Target Report Var(TARGET_XL_COMPAT) -Conform more closely to IBM XLC semantics - -mrecip -Target Report Var(TARGET_RECIP) -Generate software reciprocal sqrt for better throughput - -mno-fp-in-toc -Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) -Do not place floating point constants in TOC - -mfp-in-toc -Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) -Place floating point constants in TOC - -mno-sum-in-toc -Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) -Do not place symbol+offset constants in TOC - -msum-in-toc -Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists -Place symbol+offset constants in TOC - -; Output only one TOC entry per module. Normally linking fails if -; there are more than 16K unique variables/constants in an executable. With -; this option, linking fails only if there are more than 16K modules, or -; if there are more than 16K unique variables/constant in a single module. -; -; This is at the cost of having 2 extra loads and one extra store per -; function, and one less allocable register. -mminimal-toc -Target Report Mask(MINIMAL_TOC) -Use only one TOC entry per procedure - -mfull-toc -Target Report -Put everything in the regular TOC - -mvrsave -Target Report Var(TARGET_ALTIVEC_VRSAVE) -Generate VRSAVE instructions when generating AltiVec code - -mvrsave= -Target RejectNegative Joined --mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead - -misel -Target -Generate isel instructions - -misel= -Target RejectNegative Joined --misel=yes/no Deprecated option. Use -misel/-mno-isel instead - -mspe -Target -Generate SPE SIMD instructions on E500 - -mpaired -Target Var(rs6000_paired_float) -Generate PPC750CL paired-single instructions - -mspe= -Target RejectNegative Joined --mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead - -mdebug= -Target RejectNegative Joined --mdebug= Enable debug output - -mabi= -Target RejectNegative Joined --mabi= Specify ABI to use - -mcpu= -Target RejectNegative Joined --mcpu= Use features of and schedule code for given CPU - -mtune= -Target RejectNegative Joined --mtune= Schedule code for given CPU - -mtraceback= -Target RejectNegative Joined --mtraceback= Select full, part, or no traceback table - -mlongcall -Target Report Var(rs6000_default_long_calls) -Avoid all range limits on call instructions - -mgen-cell-microcode -Target Report Var(rs6000_gen_cell_microcode) Init(-1) -Generate Cell microcode - -mwarn-cell-microcode -Target Var(rs6000_warn_cell_microcode) Init(0) Warning -Warn when a Cell microcoded instruction is emitted - -mwarn-altivec-long -Target Var(rs6000_warn_altivec_long) Init(1) -Warn about deprecated 'vector long ...' AltiVec type usage - -mfloat-gprs= -Target RejectNegative Joined --mfloat-gprs= Select GPR floating point method - -mlong-double- -Target RejectNegative Joined UInteger --mlong-double-<n> Specify size of long double (64 or 128 bits) - -msched-costly-dep= -Target RejectNegative Joined -Determine which dependences between insns are considered costly - -minsert-sched-nops= -Target RejectNegative Joined -Specify which post scheduling nop insertion scheme to apply - -malign- -Target RejectNegative Joined -Specify alignment of structure fields default/natural - -mprioritize-restricted-insns= -Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) -Specify scheduling priority for dispatch slot restricted insns - -msingle-float -Target RejectNegative Var(rs6000_single_float) -Single-precision floating point unit - -mdouble-float -Target RejectNegative Var(rs6000_double_float) -Double-precision floating point unit - -msimple-fpu -Target RejectNegative Var(rs6000_simple_fpu) -Floating point unit does not support divide & sqrt - -mfpu= -Target RejectNegative Joined --mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu) - -mxilinx-fpu -Target Var(rs6000_xilinx_fpu) -Specify Xilinx FPU. - - |