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author | Jing Yu <jingyu@google.com> | 2010-07-22 14:03:48 -0700 |
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committer | Jing Yu <jingyu@google.com> | 2010-07-22 14:03:48 -0700 |
commit | b094d6c4bf572654a031ecc4afe675154c886dc5 (patch) | |
tree | 89394c56b05e13a5413ee60237d65b0214fd98e2 /gcc-4.4.3/gcc/config/mips/3000.md | |
parent | dc34721ac3bf7e3c406fba8cfe9d139393345ec5 (diff) | |
download | toolchain_gcc-b094d6c4bf572654a031ecc4afe675154c886dc5.tar.gz toolchain_gcc-b094d6c4bf572654a031ecc4afe675154c886dc5.tar.bz2 toolchain_gcc-b094d6c4bf572654a031ecc4afe675154c886dc5.zip |
commit gcc-4.4.3 which is used to build gcc-4.4.3 Android toolchain in master.
The source is based on fsf gcc-4.4.3 and contains local patches which
are recorded in gcc-4.4.3/README.google.
Change-Id: Id8c6d6927df274ae9749196a1cc24dbd9abc9887
Diffstat (limited to 'gcc-4.4.3/gcc/config/mips/3000.md')
-rw-r--r-- | gcc-4.4.3/gcc/config/mips/3000.md | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/gcc-4.4.3/gcc/config/mips/3000.md b/gcc-4.4.3/gcc/config/mips/3000.md new file mode 100644 index 000000000..64bdfe113 --- /dev/null +++ b/gcc-4.4.3/gcc/config/mips/3000.md @@ -0,0 +1,71 @@ +;; R3000 and TX39 pipeline description. +;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc. +;; +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 3, or (at your +;; option) any later version. + +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + + +;; This file overrides parts of generic.md. It is derived from the +;; old define_function_unit description. + +(define_insn_reservation "r3k_load" 2 + (and (eq_attr "cpu" "r3000,r3900") + (eq_attr "type" "load,fpload,fpidxload")) + "alu") + +(define_insn_reservation "r3k_imul" 12 + (and (eq_attr "cpu" "r3000,r3900") + (eq_attr "type" "imul,imul3,imadd")) + "imuldiv*12") + +(define_insn_reservation "r3k_idiv" 35 + (and (eq_attr "cpu" "r3000,r3900") + (eq_attr "type" "idiv")) + "imuldiv*35") + +(define_insn_reservation "r3k_fmove" 1 + (and (eq_attr "cpu" "r3000,r3900") + (eq_attr "type" "fabs,fneg,fmove")) + "alu") + +(define_insn_reservation "r3k_fadd" 2 + (and (eq_attr "cpu" "r3000,r3900") + (eq_attr "type" "fcmp,fadd")) + "alu") + +(define_insn_reservation "r3k_fmul_single" 4 + (and (eq_attr "cpu" "r3000,r3900") + (and (eq_attr "type" "fmul,fmadd") + (eq_attr "mode" "SF"))) + "alu") + +(define_insn_reservation "r3k_fmul_double" 5 + (and (eq_attr "cpu" "r3000,r3900") + (and (eq_attr "type" "fmul,fmadd") + (eq_attr "mode" "DF"))) + "alu") + +(define_insn_reservation "r3k_fdiv_single" 12 + (and (eq_attr "cpu" "r3000,r3900") + (and (eq_attr "type" "fdiv,frdiv") + (eq_attr "mode" "SF"))) + "alu") + +(define_insn_reservation "r3k_fdiv_double" 19 + (and (eq_attr "cpu" "r3000,r3900") + (and (eq_attr "type" "fdiv,frdiv") + (eq_attr "mode" "DF"))) + "alu") |