Initial checkin of unmodified gcc-5666.3.tar.gz

This is the source to build gcc-4.2 for MacOSX

   gcc version 4.2.1 (Apple Inc. build 5666) (dot 3)

http://opensource.apple.com/tarballs/gcc/gcc-5666.3.tar.gz

Change-Id: I69540223f018e9d07f861fca04bd3833fc138f8b

8 files changed, 1680 insertions, 0 deletions

diff --git a/gcc-4.2.1-5666.3/more-hdrs/assert.h b/gcc-4.2.1-5666.3/more-hdrs/assert.h
new file mode 100644
index 000000000..0bd55b020
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/assert.h
@@ -0,0 +1,71 @@
+/*  DO NOT EDIT THIS FILE.
+
+    It has been auto-edited by fixincludes from:
+
+	"/usr/include/assert.h"
+
+    This had to be done to correct non-standard usages in the
+    original, manufacturer supplied header file.  */
+
+#ifndef FIXINC_BROKEN_ASSERT_STDLIB_CHECK
+#define FIXINC_BROKEN_ASSERT_STDLIB_CHECK 1
+
+#ifdef __cplusplus
+#include <stdlib.h>
+#endif
+/* Allow this file to be included multiple times
+   with different settings of NDEBUG.  */
+#undef assert
+#undef __assert
+
+#ifdef NDEBUG
+#define assert(ignore) ((void) 0)
+#else
+
+#ifndef __GNUC__
+
+#define assert(expression)  \
+  ((void) ((expression) ? 0 : __assert (expression, __FILE__, __LINE__)))
+
+#define __assert(expression, file, lineno)  \
+  (printf ("%s:%u: failed assertion\n", file, lineno),	\
+   abort (), 0)
+
+#else
+
+#if defined(__STDC__) || defined (__cplusplus)
+
+/* Defined in libgcc.a */
+#ifdef __cplusplus
+extern "C" {
+extern void __eprintf (const char *, const char *, unsigned, const char *)
+    __attribute__ ((noreturn));
+}
+#else
+extern void __eprintf (const char *, const char *, unsigned, const char *)
+    __attribute__ ((noreturn));
+#endif
+
+#define assert(expression)  \
+  ((void) ((expression) ? 0 : __assert (#expression, __FILE__, __LINE__)))
+
+#define __assert(expression, file, line)  \
+  (__eprintf ("%s:%u: failed assertion `%s'\n",		\
+	      file, line, expression), 0)
+
+#else /* no __STDC__ and not C++; i.e. -traditional.  */
+
+extern void __eprintf () __attribute__ ((noreturn)); /* Defined in libgcc.a */
+
+#define assert(expression)  \
+  ((void) ((expression) ? 0 : __assert (expression, __FILE__, __LINE__)))
+
+#define __assert(expression, file, lineno)  \
+  (__eprintf ("%s:%u: failed assertion `%s'\n",		\
+	      file, lineno, "expression"), 0)
+
+#endif /* no __STDC__ and not C++; i.e. -traditional.  */
+#endif /* no __GNU__; i.e., /bin/cc.  */
+#endif
+
+#endif  /* FIXINC_BROKEN_ASSERT_STDLIB_CHECK */
diff --git a/gcc-4.2.1-5666.3/more-hdrs/float.h b/gcc-4.2.1-5666.3/more-hdrs/float.h
new file mode 100644
index 000000000..048737fd8
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/float.h
@@ -0,0 +1,9 @@
+/* This file is public domain.  */
+/* This file exists soley to keep Metrowerks' compilers happy.  The version
+   used by GCC 3.4 and later can be found in /usr/lib/gcc, although it's
+   not very informative.  */
+#ifdef __MWERKS__
+#include "mw_float.h"
+#else
+#error "This header only supports __MWERKS__."
+#endif
diff --git a/gcc-4.2.1-5666.3/more-hdrs/inttypes.h b/gcc-4.2.1-5666.3/more-hdrs/inttypes.h
new file mode 100644
index 000000000..697fb7b48
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/inttypes.h
@@ -0,0 +1,299 @@
+/*
+ * Copyright (c) 2000, 2001, 2002, 2003, 2004 Apple Computer, Inc.
+ * All rights reserved.
+ *
+ * @APPLE_LICENSE_HEADER_START@
+ *
+ * The contents of this file constitute Original Code as defined in and
+ * are subject to the Apple Public Source License Version 1.1 (the
+ * "License").  You may not use this file except in compliance with the
+ * License.  Please obtain a copy of the License at
+ * http://www.apple.com/publicsource and read it before using this file.
+ *
+ * This Original Code and all software distributed under the License are
+ * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
+ * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
+ * License for the specific language governing rights and limitations
+ * under the License.
+ *
+ * @APPLE_LICENSE_HEADER_END@
+ */
+
+/*
+ * <inttypes.h> -- Standard C header, defined in ISO/IEC 9899:1999
+ * (aka "C99"), section 7.8.   This defines format string conversion
+ * specifiers suitable for use within arguments to fprintf and fscanf
+ * and their ilk.
+ */
+
+#if !defined(_INTTYPES_H_)
+#define _INTTYPES_H_
+
+#include <sys/cdefs.h>		/* For __BEGIN_DECLS and __END_DECLS */
+#include <machine/ansi.h>	/* For _BSD_WCHAR_T_ */
+#include <stdint.h>
+
+#if !defined(__STDC_VERSION__) || (__STDC_VERSION__ < 199901L)
+  /* Translator is not ISO/IEC 9899:1999-compliant. */
+#  if !defined(restrict)
+#    define restrict
+#    define __RESTRICT_KEYWORD_DEFINED__
+#  endif
+#endif
+
+/* "C++ implementations should define these macros only when
+ *  __STDC_FORMAT_MACROS is defined before <inttypes.h> is included."
+ */
+#if (! defined(__cplusplus)) || defined(__STDC_FORMAT_MACROS)
+
+#  undef __PRI_8_LENGTH_MODIFIER__
+#  undef __PRI_64_LENGTH_MODIFIER__
+#  undef __SCN_64_LENGTH_MODIFIER__
+
+/* These could be "hh", "ll", and "ll" respectively, but that doesn't work on
+   10.2, and these do.  Note that there's no way to use scanf to scan a
+   decimal into a 'char' argument on 10.2, so "hh" is used unconditionally
+   and programs that use it won't work on Jaguar.  */
+#  define __PRI_8_LENGTH_MODIFIER__ ""  /* none */
+#  define __PRI_64_LENGTH_MODIFIER__ "q"
+#  define __SCN_64_LENGTH_MODIFIER__ "q"
+
+#  define PRId8         __PRI_8_LENGTH_MODIFIER__ "d"
+#  define PRIi8         __PRI_8_LENGTH_MODIFIER__ "i"
+#  define PRIo8         __PRI_8_LENGTH_MODIFIER__ "o"
+#  define PRIu8         __PRI_8_LENGTH_MODIFIER__ "u"
+#  define PRIx8         __PRI_8_LENGTH_MODIFIER__ "x"
+#  define PRIX8         __PRI_8_LENGTH_MODIFIER__ "X"
+
+#  define PRId16        "hd"
+#  define PRIi16        "hi"
+#  define PRIo16        "ho"
+#  define PRIu16        "hu"
+#  define PRIx16        "hx"
+#  define PRIX16        "hX"
+
+#  define PRId32        "d"
+#  define PRIi32        "i"
+#  define PRIo32        "o"
+#  define PRIu32        "u"
+#  define PRIx32        "x"
+#  define PRIX32        "X"
+
+#  define PRId64        __PRI_64_LENGTH_MODIFIER__ "d"
+#  define PRIi64        __PRI_64_LENGTH_MODIFIER__ "i"
+#  define PRIo64        __PRI_64_LENGTH_MODIFIER__ "o"
+#  define PRIu64        __PRI_64_LENGTH_MODIFIER__ "u"
+#  define PRIx64        __PRI_64_LENGTH_MODIFIER__ "x"
+#  define PRIX64        __PRI_64_LENGTH_MODIFIER__ "X"
+
+#  define PRIdLEAST8    PRId8
+#  define PRIiLEAST8    PRIi8
+#  define PRIoLEAST8    PRIo8
+#  define PRIuLEAST8    PRIu8
+#  define PRIxLEAST8    PRIx8
+#  define PRIXLEAST8    PRIX8
+
+#  define PRIdLEAST16   PRId16
+#  define PRIiLEAST16   PRIi16
+#  define PRIoLEAST16   PRIo16
+#  define PRIuLEAST16   PRIu16
+#  define PRIxLEAST16   PRIx16
+#  define PRIXLEAST16   PRIX16
+
+#  define PRIdLEAST32   PRId32
+#  define PRIiLEAST32   PRIi32
+#  define PRIoLEAST32   PRIo32
+#  define PRIuLEAST32   PRIu32
+#  define PRIxLEAST32   PRIx32
+#  define PRIXLEAST32   PRIX32
+
+#  define PRIdLEAST64   PRId64
+#  define PRIiLEAST64   PRIi64
+#  define PRIoLEAST64   PRIo64
+#  define PRIuLEAST64   PRIu64
+#  define PRIxLEAST64   PRIx64
+#  define PRIXLEAST64   PRIX64
+
+#  define PRIdFAST8     PRId8
+#  define PRIiFAST8     PRIi8
+#  define PRIoFAST8     PRIo8
+#  define PRIuFAST8     PRIu8
+#  define PRIxFAST8     PRIx8
+#  define PRIXFAST8     PRIX8
+
+#  define PRIdFAST16    PRId16
+#  define PRIiFAST16    PRIi16
+#  define PRIoFAST16    PRIo16
+#  define PRIuFAST16    PRIu16
+#  define PRIxFAST16    PRIx16
+#  define PRIXFAST16    PRIX16
+
+#  define PRIdFAST32    PRId32
+#  define PRIiFAST32    PRIi32
+#  define PRIoFAST32    PRIo32
+#  define PRIuFAST32    PRIu32
+#  define PRIxFAST32    PRIx32
+#  define PRIXFAST32    PRIX32
+
+#  define PRIdFAST64    PRId64
+#  define PRIiFAST64    PRIi64
+#  define PRIoFAST64    PRIo64
+#  define PRIuFAST64    PRIu64
+#  define PRIxFAST64    PRIx64
+#  define PRIXFAST64    PRIX64
+
+/* int32_t is 'int', but intptr_t is 'long'.  */
+#  define PRIdPTR       "ld"
+#  define PRIiPTR       "li"
+#  define PRIoPTR       "lo"
+#  define PRIuPTR       "lu"
+#  define PRIxPTR       "lx"
+#  define PRIXPTR       "lX"
+
+#  define PRIdMAX       PRId64
+#  define PRIiMAX       PRIi64
+#  define PRIoMAX       PRIo64
+#  define PRIuMAX       PRIu64
+#  define PRIxMAX       PRIx64
+#  define PRIXMAX       PRIX64
+
+#  define SCNd8         "hhd"
+#  define SCNi8         "hhi"
+#  define SCNo8         "hho"
+#  define SCNu8         "hhu"
+#  define SCNx8         "hhx"
+
+#  define SCNd16        "hd"
+#  define SCNi16        "hi"
+#  define SCNo16        "ho"
+#  define SCNu16        "hu"
+#  define SCNx16        "hx"
+
+#  define SCNd32        "d"
+#  define SCNi32        "i"
+#  define SCNo32        "o"
+#  define SCNu32        "u"
+#  define SCNx32        "x"
+
+#  define SCNd64        __SCN_64_LENGTH_MODIFIER__ "d"
+#  define SCNi64        __SCN_64_LENGTH_MODIFIER__ "i"
+#  define SCNo64        __SCN_64_LENGTH_MODIFIER__ "o"
+#  define SCNu64        __SCN_64_LENGTH_MODIFIER__ "u"
+#  define SCNx64        __SCN_64_LENGTH_MODIFIER__ "x"
+
+#  define SCNdLEAST8    SCNd8
+#  define SCNiLEAST8    SCNi8
+#  define SCNoLEAST8    SCNo8
+#  define SCNuLEAST8    SCNu8
+#  define SCNxLEAST8    SCNx8
+
+#  define SCNdLEAST16   SCNd16
+#  define SCNiLEAST16   SCNi16
+#  define SCNoLEAST16   SCNo16
+#  define SCNuLEAST16   SCNu16
+#  define SCNxLEAST16   SCNx16
+
+#  define SCNdLEAST32   SCNd32
+#  define SCNiLEAST32   SCNi32
+#  define SCNoLEAST32   SCNo32
+#  define SCNuLEAST32   SCNu32
+#  define SCNxLEAST32   SCNx32
+
+#  define SCNdLEAST64   SCNd64
+#  define SCNiLEAST64   SCNi64
+#  define SCNoLEAST64   SCNo64
+#  define SCNuLEAST64   SCNu64
+#  define SCNxLEAST64   SCNx64
+
+#  define SCNdFAST8     SCNd8
+#  define SCNiFAST8     SCNi8
+#  define SCNoFAST8     SCNo8
+#  define SCNuFAST8     SCNu8
+#  define SCNxFAST8     SCNx8
+
+#  define SCNdFAST16    SCNd16
+#  define SCNiFAST16    SCNi16
+#  define SCNoFAST16    SCNo16
+#  define SCNuFAST16    SCNu16
+#  define SCNxFAST16    SCNx16
+
+#  define SCNdFAST32    SCNd32
+#  define SCNiFAST32    SCNi32
+#  define SCNoFAST32    SCNo32
+#  define SCNuFAST32    SCNu32
+#  define SCNxFAST32    SCNx32
+
+#  define SCNdFAST64    SCNd64
+#  define SCNiFAST64    SCNi64
+#  define SCNoFAST64    SCNo64
+#  define SCNuFAST64    SCNu64
+#  define SCNxFAST64    SCNx64
+
+#  define SCNdPTR       "ld"
+#  define SCNiPTR       "li"
+#  define SCNoPTR       "lo"
+#  define SCNuPTR       "lu"
+#  define SCNxPTR       "lx"
+
+#  define SCNdMAX       SCNd64
+#  define SCNiMAX       SCNi64
+#  define SCNoMAX       SCNo64
+#  define SCNuMAX       SCNu64
+#  define SCNxMAX       SCNx64
+
+#endif /* if C++, then __STDC_FORMAT_MACROS enables the above macros */
+
+__BEGIN_DECLS
+
+  /* 7.8.2.1 */
+  extern intmax_t imaxabs(intmax_t j);
+
+  /* 7.8.2.2 */
+  typedef struct {
+        intmax_t quot;
+        intmax_t rem;
+  } imaxdiv_t;
+
+  extern imaxdiv_t imaxdiv(intmax_t numer, intmax_t denom);
+
+  /* 7.8.2.3 */
+  extern intmax_t strtoimax(const char * restrict nptr, char ** restrict endptr, int base);
+  extern uintmax_t strtoumax(const char * restrict nptr, char ** restrict endptr, int base);
+
+#ifndef __cplusplus /* wchar_t is a built-in type in C++ */
+#  ifndef	_BSD_WCHAR_T_DEFINED_
+#    define	_BSD_WCHAR_T_DEFINED_
+#    ifdef	__WCHAR_TYPE__
+       typedef __WCHAR_TYPE__ wchar_t;
+#    else /* __WCHAR_TYPE__ */
+       typedef	_BSD_WCHAR_T_	wchar_t;
+#    endif /* __WCHAR_TYPE__ */
+#  endif /* _BSD_WCHAR_T_DEFINED_ */
+#endif /* __cplusplus */
+
+  /* 7.8.2.4 */
+  extern intmax_t wcstoimax(const wchar_t * restrict nptr, wchar_t ** restrict endptr, int base);
+  extern uintmax_t wcstoumax(const wchar_t * restrict nptr, wchar_t ** restrict endptr, int base);
+
+__END_DECLS
+
+/*
+   No need to #undef the __*_{8,64}_LENGTH_MODIFIER__ macros;
+   in fact, you can't #undef them, because later uses of any of
+   their dependents will *not* then do the intended substitution.
+   Expansion of a #define like this one:
+
+        #define x IDENT y
+
+   uses the cpp value of IDENT at the location where x is *expanded*,
+   not where it is #defined.
+*/
+
+#if defined(__RESTRICT_KEYWORD_DEFINED__)
+#  undef restrict
+#  undef __RESTRICT_KEYWORD_DEFINED__
+#endif
+
+#endif /* !_INTTYPES_H_ */
diff --git a/gcc-4.2.1-5666.3/more-hdrs/ppc_intrinsics.h b/gcc-4.2.1-5666.3/more-hdrs/ppc_intrinsics.h
new file mode 100644
index 000000000..8cfe01f5d
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/ppc_intrinsics.h
@@ -0,0 +1,1026 @@
+/* APPLE LOCAL file PPC_INTRINSICS */
+
+/* Definitions for PowerPC intrinsic instructions
+   Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+02111-1307, USA.  */
+
+/* As a special exception, if you include this header file into source
+   files compiled by GCC, this header file does not by itself cause
+   the resulting executable to be covered by the GNU General Public
+   License.  This exception does not however invalidate any other
+   reasons why the executable file might be covered by the GNU General
+   Public License.  */
+
+/*
+ * The following PowerPC intrinsics are provided by this header:
+ *
+ * Low-Level Processor Synchronization
+ *   __eieio    - Enforce In-Order Execution of I/O
+ *   __isync    - Instruction Synchronize
+ *   __sync     - Synchronize
+ *   __lwsync   - Lightweight Synchronize
+ *
+ * Manipulating the Contents of a Variable or Register
+ *   __cntlzw   - Count Leading Zeros Word
+ *   __cntlzd   - Count Leading Zeros Double Word
+ *   __rlwimi   - Rotate Left Word Immediate then Mask Insert
+ *   __rlwinm   - Rotate Left Word Immediate then AND with Mask
+ *   __rlwnm    - Rotate Left Word then AND with Mask
+ *
+ * Byte-Reversing Functions
+ *   __lhbrx    - Load Half Word Byte-Reverse Indexed
+ *   __lwbrx    - Load Word Byte-Reverse Indexed
+ *   __sthbrx   - Store Half Word Byte-Reverse Indexed
+ *   __stwbrx   - Store Word Byte-Reverse Indexed
+ *
+ * Data Cache Manipulation
+ *   __dcba     - Data Cache Block Allocate
+ *   __dcbf     - Data Cache Block Flush
+ *   __dcbst    - Data Cache Block Store
+ *   __dcbt     - Data Cache Block Touch
+ *   __dcbtst   - Data Cache Block Touch for Store
+ *   __dcbzl    - Data Cache Block Set to Zero
+ *   __dcbz     - Data Cache Block Set to Zero (32-bytes only)
+ *
+ * Setting the Floating-Point Environment
+ *   __setflm   - Set Floating-point Mode
+ *
+ * Math Functions
+ *   __fabs     - Floating-Point Absolute Value
+ *   __fnabs    - Floating Negative Absolute Value
+ *   __fctiw    - Floating Convert to Integer Word
+ *   __fctiwz   - Floating Convert to Integer Word with Round toward Zero
+ *   __fctidz   - Floating Convert to Integer Doubleword with Round toward Zero
+ *   __fctid    - Floating Convert to Integer Doubleword
+ *   __fcfid    - Floating Convert From Integer Doubleword
+ *   __fmadd    - Floating Multiply-Add (Double-Precision)
+ *   __fmadds   - Floating Multiply-Add Single
+ *   __fmsub    - Floating Multiply-Subract (Double-Precision)
+ *   __fmsubs   - Floating Multiply-Subract Single
+ *   __fmul     - Floating Multiply (Double-Precision)
+ *   __fmuls    - Floating Multiply Single
+ *   __fnmadd   - Floating Negative Multiply-Add (Double-Precision)
+ *   __fnmadds  - Floating Negative Multiply-Add Single
+ *   __fnmsub   - Floating Negative Multiply-Subtract (Double-Precision)
+ *   __fnmsubs  - Floating Negative Multiply-Subtract Single
+ *   __fres     - Floating Reciprocal Estimate
+ *   __frsp     - Floating Round to Single-Precision
+ *   __frsqrte  - Floating Reciprocal Square Root Estimate
+ *   __frsqrtes - Floating Reciprocal Square Root Estimate Single
+ *   __fsel     - Floating Select
+ *   __fsels    - Floating Select (Single-Precision variant)
+ *   __fsqrt    - Floating-Point Square Root (Double-Precision)
+ *   __fsqrts   - Floating-Point Square Root Single-Precision
+ *   __mulhw    - Multiply High Word
+ *   __mulhwu   - Multiply High Word Unsigned
+ *   __stfiwx   - Store Floating-Point as Integer Word Indexed
+ *
+ * Miscellaneous Functions
+ *   __nop      - PPC preferred form of no operation
+ *   __astrcmp  - assembly strcmp
+ *   __icbi     - Instruction Cache Block Invalidate
+ *   __mffs     - Move from FPSCR
+ *   __mfspr    - Move from Special Purpose Register
+ *   __mtfsf    - Move to SPSCR Fields
+ *   __mtspr    - Move to Special Purpose Register
+ *   __OSReadSwapSInt16 - lhbrx for signed shorts
+ *   __OSReadSwapUInt16 - lhbrx for unsigned shorts
+ *
+ * TO DO:
+ * - Desired:
+ *   mullw
+ * - Available in CodeWarrior, not yet implemented here:
+ *   abs, labs, fabsf, fnabsf
+ *
+ * NOTES:
+ * - Some of the intrinsics need to be macros because certain 
+ *   parameters MUST be integer constants and not values in registers.
+ * - The declarations use __asm__ instead of asm and __inline__ instead
+ *   of inline to prevent errors when -ansi is specified.
+ * - Some of the intrinsic definitions use the "volatile" specifier on
+ *   the "asm" statements in order to work around what appears to be
+ *   a bug in the compiler/optimizer.  In general we have avoided the
+ *   use of "volatile" because it suppresses optimization on the
+ *   generated instructions.  The instructions to which "volatile"
+ *   has been added where it appears that it should not be needed are
+ *   lhbrx and lwbrx.
+ *
+ * Contributors: Fred Forsman (editor), Turly O'Connor, Ian Ollmann, Sanjay Patel
+ * Last modified: October 6, 2004
+ */
+
+#ifndef _PPC_INTRINSICS_H_
+#define _PPC_INTRINSICS_H_
+
+#if (defined(__ppc__) || defined(__ppc64__)) && ! defined(__MWERKS__)
+
+/*******************************************************************
+ *                 Special Purpose Registers (SPRs)                *
+ *******************************************************************/
+
+#define __SPR_MQR       0               /* PPC 601 only */
+#define __SPR_XER       1               
+#define __SPR_RTCU      4               /* Real time clock upper. PPC 601 only.*/
+#define __SPR_RTCL      5               /* Real time clock lower. PPC 601 only.*/
+#define __SPR_LR        8               
+#define __SPR_CTR       9               
+#define __SPR_VRSAVE    256             /* AltiVec */
+#define __SPR_TBL       268             /* Time-base Lower. Not on PPC 601 */
+#define __SPR_TBU       269             /* Time-base Upper. Not on PPC 601 */
+#define __SPR_UMMCR2    928             /* PPC 74xx */
+#define __SPR_UPMC5     929             /* PPC 745x */
+#define __SPR_UPMC6     930             /* PPC 745x */
+#define __SPR_UBAMR     935             /* PPC 7400 and 7410 */
+#define __SPR_UMMCR0    936             /* PPC 74xx and 750 */
+#define __SPR_UPMC1     937             /* PPC 74xx and 750 */
+#define __SPR_UPMC2     938             /* PPC 74xx and 750 */
+#define __SPR_USIAR     939             /* PPC 74xx and 750 */
+#define __SPR_UMMCR1    940             /* PPC 74xx and 750 */
+#define __SPR_UPMC3     941             /* PPC 74xx and 750 */
+#define __SPR_UPMC4     942             /* PPC 74xx and 750 */
+#define __SPR_PIR       1023            /* supervisor level only! */
+
+/*
+ * Shorthand macros for some commonly used SPR's.
+ */
+#define __mfxer()               __mfspr(__SPR_XER)
+#define __mflr()                __mfspr(__SPR_LR)
+#define __mfctr()               __mfspr(__SPR_CTR)
+#define __mfvrsave()            __mfspr(__SPR_VRSAVE)
+#define __mftb()                __mfspr(__SPR_TBL)
+#define __mftbu()               __mfspr(__SPR_TBU)
+
+#define __mtlr(value)           __mtspr(__SPR_LR, value)
+#define __mtxer(value)          __mtspr(__SPR_XER, value)
+#define __mtctr(value)          __mtspr(__SPR_CTR, value)
+#define __mtvrsave(value)       __mtspr(__SPR_VRSAVE, value)
+
+
+/*******************************************************************
+ *               Low-Level Processor Synchronization               *
+ *******************************************************************/
+
+/*
+ * __eieio - Enforce In-Order Execution of I/O
+ *
+ *   void __eieio (void);
+ */
+#define __eieio() __asm__ ("eieio" : : : "memory")
+
+/*
+ * __isync - Instruction Synchronize
+ *
+ *   void __isync (void);
+ */
+#define __isync()       \
+  __asm__ volatile ("isync")
+
+/*
+ * __sync - Synchronize
+ *
+ *  void __sync (void);
+ */
+#define __sync() __asm__ volatile ("sync")
+
+/*
+ * __lwsync - Lightweight Synchronize, see PPC2.01, Book 2
+ *
+ *  void __lwsync (void);
+ */
+#define __lwsync() __asm__ volatile ("sync 1")
+
+
+/*******************************************************************
+ *                     Byte-Reversing Functions                    *
+ *******************************************************************/
+
+/*
+ * __lhbrx - Load Half Word Byte-Reverse Indexed
+ *
+ *   int __lhbrx(void *, int);
+ */
+#define __lhbrx(base, index)   \
+  ({ unsigned short __ppc_i_lhbrxResult;       \
+     __asm__ volatile ("lhbrx %0, %1, %2" : "=r" (__ppc_i_lhbrxResult) : "b%" (index), "r" (base) : "memory"); \
+     /*return*/ __ppc_i_lhbrxResult; })
+
+/*
+ * __lwbrx - Load Word Byte-Reverse Indexed
+ *
+ *   int __lwbrx(void *, int);
+ */
+#define __lwbrx(base, index)    \
+  ({ unsigned int __ppc_i_lwbrxResult; \
+     __asm__ volatile ("lwbrx %0, %1, %2" : "=r" (__ppc_i_lwbrxResult) : "b%" (index), "r" (base) : "memory"); \
+     /*return*/ __ppc_i_lwbrxResult; })
+
+/*
+ * __sthbrx - Store Half Word Byte-Reverse Indexed
+ *
+ *   int __sthbrx(unsigned short, void *, int);
+ */
+#define __sthbrx(value, base, index)    \
+  __asm__ ("sthbrx %0, %1, %2" : : "r" (value), "b%" (index), "r" (base) : "memory")
+
+/*
+ * __stwbrx - Store Word Byte-Reverse Indexed
+ *
+ *   int __sthbrx(unsigned int, void *, int);
+ */
+#define __stwbrx(value, base, index)    \
+  __asm__ ("stwbrx %0, %1, %2" : : "r" (value), "b%" (index), "r" (base) : "memory")
+
+
+/*******************************************************************
+ *       Manipulating the Contents of a Variable or Register       *
+ *******************************************************************/
+
+/*
+ * __cntlzw - Count Leading Zeros Word
+ * __cntlzd - Count Leading Zeros Double Word
+ */
+
+#define __cntlzw(a)     __builtin_clz(a)
+#define __cntlzd(a)     __builtin_clzll(a)
+
+/*
+ * __rlwimi - Rotate Left Word Immediate then Mask Insert
+ *
+ *   int __rlwimi(int, long, int, int, int);
+ *
+ * We don't mention "%1" below: operand[1] needs to be skipped as 
+ * it's just a placeholder to let the compiler know that rA is read 
+ * from as well as written to. 
+ */
+#define __rlwimi(rA, rS, cnt, mb, me)                               \
+  ({ __asm__ ("rlwimi %0,%2,%3,%4,%5" : "=r" (rA)                   \
+              : "0" (rA), "r" (rS), "n" (cnt), "n" (mb), "n" (me)); \
+     /*return*/ rA;})
+
+/*
+ * __rlwinm - Rotate Left Word Immediate then AND with Mask
+ *
+ *   int __rlwinm(long, int, int, int);
+ */
+#define __rlwinm(rS, cnt, mb, me)						\
+  ({ unsigned int __ppc_i_val;							\
+     __asm__ ("rlwinm %0,%1,%2,%3,%4" : "=r" (__ppc_i_val)			\
+              : "r" (rS), "n" (cnt), "n" (mb), "n" (me));			\
+     /*return*/ __ppc_i_val;})
+
+/*
+ * __rlwnm - Rotate Left Word then AND with Mask
+ *
+ *   int __rlwnm(long, int, int, int);
+ */
+#define __rlwnm(value, leftRotateBits, maskStart, maskEnd)			\
+  ({ unsigned int __ppc_i_result;						\
+     __asm__ ("rlwnm %0, %1, %2, %3, %4" : "=r" (__ppc_i_result) :		\
+              "r" (value), "r" (leftRotateBits), "n" (maskStart), "n" (maskEnd)); \
+     /*return */ __ppc_i_result; })
+
+
+/*******************************************************************
+ *                     Data Cache Manipulation                     *
+ *******************************************************************/
+
+/* 
+ * --- Data Cache Block instructions ---
+ *
+ * Please see Motorola's "The Programming Environments for 32-Bit 
+ * Microprocessors" for a description of what these do.
+ *
+ *   Parameter descriptions:
+ *
+ *     base             starting address for figuring out where the 
+ *                      cacheline is
+ *
+ *     index            byte count to be added to the base address for 
+ *                      purposes of calculating the effective address 
+ *                      of the cacheline to be operated on.  
+ *                                      
+ *   Effective Address of cacheline to be manipulated = 
+ *     (char*) base + index
+ *      
+ *   WARNING: The size and alignment of cachelines are subject to 
+ *     change on future processors!  Cachelines are 32 bytes in 
+ *     size and are aligned to 32 bytes on PowerPC 601, 603, 604, 
+ *     750, 7400, 7410, 7450, and 7455.
+ *
+ */
+ 
+/*
+ * __dcba - Data Cache Block Allocate
+ *
+ *   void __dcba(void *, int)
+ *
+ * WARNING: dcba is a valid instruction only on PowerPC 7400, 7410, 
+ *          7450 and 7455.
+ */
+#define __dcba(base, index)     \
+  __asm__ ("dcba %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbf - Data Cache Block Flush
+ *
+ *   void __dcbf(void *, int);
+ */
+#define __dcbf(base, index)     \
+  __asm__ ("dcbf %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbst - Data Cache Block Store
+ *
+ *   void __dcbst(void *, int);
+ */
+#define __dcbst(base, index)    \
+  __asm__ ("dcbst %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbt - Data Cache Block Touch
+ *
+ *   void __dcbt(void *, int);
+ */
+#define __dcbt(base, index)     \
+  __asm__ ("dcbt %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbtst - Data Cache Block Touch for Store
+ *
+ *   void __dcbtst(void *, int);
+ */
+#define __dcbtst(base, index)   \
+  __asm__ ("dcbtst %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbzl - Data Cache Block Set to Zero
+ *
+ *   void __dcbzl(void *, int);
+ */
+#define __dcbzl(base, index)     \
+  __asm__ ("dcbzl %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __dcbz - Data Cache Block Set to Zero (32-bytes only)
+ *
+ * WARNING: this is for legacy purposes only
+ *
+ *   void __dcbz(void *, int);
+ */
+#define __dcbz(base, index)     \
+  __asm__ ("dcbz %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+
+/*******************************************************************
+ *              Setting the Floating-Point Environment             *
+ *******************************************************************/
+
+/*
+ * __setflm - Set Floating-point Mode
+ *
+ * Sets the FPSCR (floating-point status and control register),
+ * returning the original value.
+ *
+ *   ??? CW: float __setflm(float);
+ */
+static inline double __setflm (double newflm) __attribute__((always_inline));
+static inline double 
+__setflm(double newflm)
+{
+  double original;
+
+  __asm__ ("mffs %0" 
+           /* outputs:  */ : "=f" (original));
+  __asm__ ("mtfsf 255,%0" 
+           /* outputs:  */ : /* none */ 
+           /* inputs:   */ : "f" (newflm));
+  return original;
+}
+
+
+/*******************************************************************
+ *                          Math Functions                         *
+ *******************************************************************/
+
+/*
+ * __fabs - Floating-Point Absolute Value
+ */
+static inline double __fabs (double value) __attribute__((always_inline));
+static inline double 
+__fabs (double value)
+{
+  double result;
+  __asm__ ("fabs %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (value));
+  return result;
+}
+
+/*
+ * __fnabs - Floating Negative Absolute Value
+ */
+static inline double __fnabs (double b) __attribute__((always_inline));
+static inline double 
+__fnabs (double b)
+{
+  double result;
+  __asm__ ("fnabs %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fctiw - Floating Convert to Integer Word
+ *
+ * Convert the input value to a signed long and place in the low 32 
+ * bits of the FP register.  Clip to LONG_MIN or LONG_MAX if the FP 
+ * value exceeds the range representable by a long.  Use the rounding
+ * mode indicated in the FPSCR.
+ */
+static inline double __fctiw (double b) __attribute__((always_inline));
+static inline double 
+__fctiw (double b)
+{
+  double result;
+  __asm__ ("fctiw %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fctiwz - Floating Convert to Integer Word with Round toward Zero
+ *
+ * Convert the input value to a signed long and place in the low 32 
+ * bits of the FP register.  Clip to LONG_MIN or LONG_MAX if the FP 
+ * value exceeds the range representable by a long.
+ */
+static inline double __fctiwz (double b) __attribute__((always_inline));
+static inline double 
+__fctiwz (double b)
+{
+  double result;
+  __asm__ ("fctiwz %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fctidz - Floating Convert to Integer Double Word with Round toward Zero
+ *
+ * Convert the input value to a signed 64-bit int and place in the FP
+ * destination register.  Clip to LLONG_MIN (-2**63) or LLONG_MAX (2**63-1) 
+ * if the FP value exceeds the range representable by a int64_t.
+ * 
+ * WARNING: fctidz is a valid instruction only on 64-bit PowerPC 
+ */
+static inline double __fctidz (double b) __attribute__((always_inline));
+static inline double 
+__fctidz (double b)
+{
+  double result;
+  __asm__ ("fctidz %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fctid - Floating Convert to Integer Double Word
+ *
+ * Convert the input value to a signed 64-bit int and place in the FP
+ * destination register.  Clip to LLONG_MIN (-2**63) or LLONG_MAX (2**63-1) 
+ * if the FP value exceeds the range representable by a int64_t. Use the 
+ * rounding mode indicated in the FPSCR.
+ * 
+ * WARNING: fctid is a valid instruction only on 64-bit PowerPC 
+ */
+static inline double __fctid (double b) __attribute__((always_inline));
+static inline double 
+__fctid (double b)
+{
+  double result;
+  __asm__ ("fctid %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fcfid - Floating Convert From Integer Double Word
+ *
+ * Convert the 64-bit signed integer input value to a 64-bit FP value.  
+ * Use the rounding mode indicated in the FPSCR if the integer is out of
+ * double precision range.
+ * 
+ * WARNING: fcfid is a valid instruction only on 64-bit PowerPC 
+ */
+static inline double __fcfid (double b) __attribute__((always_inline));
+static inline double 
+__fcfid (double b)
+{
+  double result;
+  __asm__ ("fcfid %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (b));
+  return result;
+}
+
+/*
+ * fmadd - Floating Multiply-Add (Double-Precision)
+ *
+ *   (a * c + b) double precision
+ */
+static inline double __fmadd (double a, double c, double b) __attribute__((always_inline));
+static inline double 
+__fmadd (double  a, double c, double b)
+{
+  double result;
+  __asm__ ("fmadd %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * fmadds - Floating Multiply-Add Single
+ *
+ *   (a * c + b) single precision
+ *
+ * Double precision arguments are used to prevent the compiler from
+ * issuing frsp instructions upstream.
+ */
+static inline float __fmadds (double a, double c, double b) __attribute__((always_inline));
+static inline float 
+__fmadds (double  a, double c, double b)
+{
+  float result;
+  __asm__ ("fmadds %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * fmsub - Floating Multiply-Subract (Double-Precision)
+ *
+ *   (a * c - b) double precision
+ */
+static inline double __fmsub (double a, double c, double b) __attribute__((always_inline));
+static inline double 
+__fmsub (double  a, double c, double b)
+{
+  double result;
+  __asm__ ("fmsub %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * fmsubs - Floating Multiply-Subract Single
+ *
+ *   (a * c - b) single precision
+ *
+ * Double precision arguments are used to prevent the compiler from
+ * issuing frsp instructions upstream.
+ */
+static inline float __fmsubs (double a, double c, double b) __attribute__((always_inline));
+static inline float 
+__fmsubs (double  a, double c, double b)
+{
+  float result;
+  __asm__ ("fmsubs %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * fmul - Floating Multiply (Double-Precision)
+ *
+ *   (a * c) double precision
+ */
+static inline double __fmul (double a, double c) __attribute__((always_inline));
+static inline double 
+__fmul (double  a, double c)
+{
+  double result;
+  __asm__ ("fmul %0, %1, %2" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c));
+  return result;
+}
+
+/*
+ * fmuls - Floating Multiply Single
+ *
+ *   (a * c) single precision
+ *
+ * Double precision arguments are used to prevent the compiler from
+ * issuing frsp instructions upstream.
+ */
+static inline float __fmuls (double a, double c) __attribute__((always_inline));
+static inline float 
+__fmuls (double  a, double c)
+{
+  float result;
+  __asm__ ("fmuls %0, %1, %2" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c));
+  return result;
+}
+
+/*
+ * __fnmadd - Floating Negative Multiply-Add (Double-Precision)
+ *
+ *   -(a * c + b) double precision
+ */
+static inline double __fnmadd (double a, double c, double b) __attribute__((always_inline));
+static inline double 
+__fnmadd (double  a, double c, double b)
+{
+  double result;
+  __asm__ ("fnmadd %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * __fnmadds - Floating Negative Multiply-Add Single
+ *
+ *   -(a * c + b) single precision
+ *
+ * Double precision arguments are used to prevent the compiler from
+ * issuing frsp instructions upstream.
+ */
+static inline float __fnmadds (double a, double c, double b) __attribute__((always_inline));
+static inline float 
+__fnmadds (double  a, double c, double b)
+{
+  float result;
+  __asm__ ("fnmadds %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * __fnmsub - Floating Negative Multiply-Subtract (Double-Precision)
+ *
+ *   -(a * c - B) double precision
+ */
+static inline double __fnmsub (double a, double c, double b) __attribute__((always_inline));
+static inline double 
+__fnmsub (double  a, double c, double b)
+{
+  double result;
+  __asm__ ("fnmsub %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * __fnmsubs - Floating Negative Multiply-Subtract Single
+ *
+ *   -(a * c - b) single precision
+ *
+ * Double precision arguments are used to prevent the compiler from
+ * issuing frsp instructions upstream.
+ */
+static inline float __fnmsubs (double a, double c, double b) __attribute__((always_inline));
+static inline float 
+__fnmsubs (double  a, double c, double b)
+{
+  float result;
+  __asm__ ("fnmsubs %0, %1, %2, %3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (a), "f" (c), "f" (b));
+  return result;
+}
+
+/*
+ * __fres - Floating Reciprocal Estimate
+ *
+ * Produces a double precision result with 5 bits of accuracy.
+ * Note: not valid on the PowerPC 601.
+ *
+ * ??? CW: float __fres(float)
+ */
+static inline float __fres (float val) __attribute__((always_inline));
+static inline float 
+__fres (float val)
+{
+  float estimate;
+  __asm__ ("fres %0,%1" 
+           /* outputs:  */ : "=f" (estimate) 
+           /* inputs:   */ : "f" (val));
+  return estimate;
+}
+
+/*
+ * __frsp - Floating Round to Single-Precision
+ */
+static inline float __frsp (double d) __attribute__((always_inline));
+static inline float 
+__frsp (double d)
+{
+  float result;
+  __asm__ ("frsp %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (d));
+  return result;
+}
+
+/*
+ * __frsqrte - Floating Reciprocal Square Root Estimate
+ *
+ * Note: not valid on the PowerPC 601.
+ */
+static inline double __frsqrte (double val) __attribute__((always_inline));
+static inline double 
+__frsqrte (double val)
+{
+  double estimate;
+
+  __asm__ ("frsqrte %0,%1" 
+           /* outputs:  */ : "=f" (estimate) 
+           /* inputs:   */ : "f" (val));
+  return estimate;
+}
+
+/*
+ * __frsqrtes - Floating Reciprocal Square Root Estimate Single
+ */
+static inline float __frsqrtes (double f) __attribute__((always_inline));
+static inline float 
+__frsqrtes (double f)
+{
+  float result;
+  __asm__ ("frsqrte %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (f));
+  return result;
+}
+
+/*
+ * __fsel - Floating Select
+ *
+ *   if (test >= 0) return a; else return b;
+ *
+ * Note: not valid on the PowerPC 601.
+ */
+static inline double __fsel (double test, double a, double b) __attribute__((always_inline));
+static inline double 
+__fsel (double test, double a, double b)
+{
+  double result;
+  __asm__ ("fsel %0,%1,%2,%3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (test), "f" (a), "f" (b));
+  return result;
+}
+
+/*
+ * __fsels - Floating Select (Single-Precision variant)
+ *
+ * An artificial single precision variant of fsel. This produces the 
+ * same results as fsel, but is useful because the result is cast as 
+ * a float, discouraging the compiler from issuing a frsp instruction 
+ * afterward.
+ */
+static inline float __fsels (double test, double a, double b) __attribute__((always_inline));
+static inline float 
+__fsels (double test, double a, double b)
+{
+  float result;
+  __asm__ ("fsel %0,%1,%2,%3" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (test), "f" (a), "f" (b));
+  return result;
+}
+
+/*
+ * __fsqrt - Floating-Point Square Root (Double-Precision)
+ *
+ * WARNING: Illegal instruction for PowerPC 603, 604, 750, 7400, 7410, 
+ * 7450, and 7455
+ */
+static inline double __fsqrt (double b) __attribute__((always_inline));
+static inline double
+__fsqrt(double d)
+{
+  double result;
+  __asm__ ("fsqrt %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (d));
+  return result;
+}
+
+/*
+ * __fsqrts - Floating-Point Square Root Single-Precision
+ *
+ * WARNING: Illegal instruction for PowerPC 603, 604, 750, 7400, 7410, 
+ * 7450, and 7455
+ */
+static inline float __fsqrts (float f) __attribute__((always_inline));
+static inline float 
+__fsqrts (float f)
+{
+  float result;
+  __asm__ ("fsqrts %0, %1" 
+           /* outputs:  */ : "=f" (result) 
+           /* inputs:   */ : "f" (f));
+  return result;
+}
+
+/*
+ * __mulhw - Multiply High Word
+ */
+static inline int __mulhw (int a, int b) __attribute__((always_inline));
+static inline int 
+__mulhw (int a, int b)
+{
+  int result;
+  __asm__ ("mulhw %0, %1, %2" 
+           /* outputs:  */ : "=r" (result) 
+           /* inputs:   */ : "r" (a), "r"(b));
+  return result;
+}
+
+/*
+ * __mulhwu - Multiply High Word Unsigned
+ */
+static inline unsigned int __mulhwu (unsigned int a, unsigned int b) __attribute__((always_inline));
+static inline unsigned int 
+__mulhwu (unsigned int a, unsigned int b)
+{
+  unsigned int result;
+  __asm__ ("mulhwu %0, %1, %2" 
+           /* outputs:  */ : "=r" (result) 
+           /* inputs:   */ : "r" (a), "r"(b));
+  return result;
+}
+
+/*
+ * __stfiwx - Store Floating-Point as Integer Word Indexed
+ *
+ *   void x(int, void *, int);
+ */
+#define __stfiwx(value, base, index)    \
+  __asm__ ("stfiwx %0, %1, %2" : /*no result*/  \
+           : "f" (value), "b%" (index), "r" (base) : "memory")
+
+
+/*******************************************************************
+ *                     Miscellaneous Functions                     *
+ *******************************************************************/
+
+/*
+ * __nop - no operation (PowerPC preferred form)
+ *
+ *   void __nop();
+ */
+#define __nop()    \
+  __asm__ ("ori 0,0,0")
+
+/*
+ * __icbi - Instruction Cache Block Invalidate
+ *
+ *   void __icbi(void *, int);
+ */
+#define __icbi(base, index)    \
+  __asm__ ("icbi %0, %1" : /*no result*/ : "b%" (index), "r" (base) : "memory")
+
+/*
+ * __mffs - Move from FPSCR
+ */
+static inline double __mffs (void) __attribute__((always_inline));
+static inline double 
+__mffs (void)
+{
+  double result;
+  __asm__ volatile ("mffs %0" 
+                    /* outputs:  */ : "=f" (result));
+  return result;
+}
+
+/*
+ * __mfspr - Move from Special Purpose Register
+ *
+ *   int __mfspr(int);
+ */
+#define __mfspr(spr)							\
+  __extension__ ({ long __ppc_i_mfsprResult;				\
+     __asm__ volatile ("mfspr %0, %1" : "=r" (__ppc_i_mfsprResult) : "n" (spr)); \
+     /*return*/ __ppc_i_mfsprResult; })
+
+/*
+ * __mtfsf - Move to SPSCR Fields
+ *
+ *   void __mtfsf(int, int);
+ */
+#define __mtfsf(mask, newValue) \
+  __asm__ volatile ("mtfsf %0, %1" : : "n" (mask), "f" (newValue))
+
+/*
+ * __mtspr - Move to Special Purpose Register
+ *
+ *   __mtspr x(int, int);
+ */
+#define __mtspr(spr, value)     \
+  __asm__ volatile ("mtspr %0, %1" : : "n" (spr), "r" (value))
+
+/*
+ * __OSReadSwapSInt16
+ *
+ * lhbrx for signed shorts.  This will do the required sign 
+ * extension after load and byteswap.
+ */
+static inline signed short __OSReadSwapSInt16 (signed short *base, int index) __attribute__((always_inline));
+static inline signed short 
+__OSReadSwapSInt16 (signed short *base, int index)
+{
+  signed long result;
+  __asm__ volatile ("lhbrx %0, %1, %2" 
+		    /* outputs:  */ : "=r" (result) 
+		    /* inputs:   */ : "b%" (index), "r" (base) 
+		    /* clobbers: */ : "memory");
+  return result;
+}
+
+/*
+ * __OSReadSwapUInt16
+ */
+static inline unsigned short __OSReadSwapUInt16 (volatile void *base, int inex) __attribute__((always_inline));
+static inline unsigned short 
+__OSReadSwapUInt16 (volatile void *base, int index)
+{
+  unsigned long result;
+  __asm__ volatile ("lhbrx %0, %1, %2"
+		    /* outputs:  */ : "=r" (result)
+		    /* inputs:   */ : "b" (index), "r" (base)
+		    /* clobbers: */ : "memory");
+  return result;
+}
+
+/*
+ * __astrcmp - assembly strcmp
+ */
+static inline int astrcmp (const char *in_s1, const char *in_s2) __attribute__((always_inline));
+static inline int 
+astrcmp (const char *in_s1, const char *in_s2)
+{
+  int result, temp;
+  register const char *s1 = in_s1 - 1;
+  register const char *s2 = in_s2 - 1;
+
+  __asm__ ("1:lbzu %0,1(%1)\n"
+           "\tcmpwi cr1,%0,0\n"
+           "\tlbzu %3,1(%2)\n"
+           "\tsubf. %0,%3,%0\n"
+           "\tbeq- cr1,2f\n"
+           "\tbeq+ 1b\n2:"
+            /* outputs: */  : "=&r" (result), "+b" (s1), "+b" (s2), "=r" (temp)
+            /* inputs: */   : 
+            /* clobbers: */ : "cr0", "cr1", "memory");
+
+  return result;
+
+  /*
+   * "=&r" (result)     means: 'result' is written on (the '='), it's any GP
+   *                    register (the 'r'), and it must not be the same as
+   *                    any of the input registers (the '&').
+   * "+b" (s1)          means: 's1' is read from and written to (the '+'),
+   *                    and it must be a base GP register (i.e., not R0.)
+   * "=r" (temp)        means: 'temp' is any GP reg and it's only written to.
+   * 
+   * "memory"           in the 'clobbers' section means that gcc will make
+   *                    sure that anything that should be in memory IS there
+   *                    before calling this routine.
+   */
+}
+
+#endif  /* (defined(__ppc__) || defined(__ppc64__)) && ! defined(__MWERKS__) */
+
+#endif /* _PPC_INTRINSICS_H_ */
diff --git a/gcc-4.2.1-5666.3/more-hdrs/stdarg.h b/gcc-4.2.1-5666.3/more-hdrs/stdarg.h
new file mode 100644
index 000000000..e12e16383
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/stdarg.h
@@ -0,0 +1,6 @@
+/* This file is public domain.  */
+#ifdef __MWERKS__
+#include "mw_stdarg.h"
+#else
+#error "This header only supports __MWERKS__."
+#endif
diff --git a/gcc-4.2.1-5666.3/more-hdrs/stdbool.h b/gcc-4.2.1-5666.3/more-hdrs/stdbool.h
new file mode 100644
index 000000000..de5287ef1
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/stdbool.h
@@ -0,0 +1,10 @@
+/* This file is public domain.  */
+/* stdbool.h has moved to avoid accidental use with a non-GCC
+   compiler.  Only GCC should have used stdbool.h due to licensing
+   restrictions.  */
+#ifdef __MWERKS__
+#include "mw_stdbool.h"
+#else
+#error "This header only supports __MWERKS__."
+#endif
+
diff --git a/gcc-4.2.1-5666.3/more-hdrs/stdint.h b/gcc-4.2.1-5666.3/more-hdrs/stdint.h
new file mode 100644
index 000000000..1126b569b
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/stdint.h
@@ -0,0 +1,253 @@
+/*
+ * Copyright (c) 2000, 2001, 2003, 2004, 2008 Apple Computer, Inc.
+ * All rights reserved.
+ */
+
+#ifndef _STDINT_H_
+#define _STDINT_H_
+
+#if __LP64__
+#define __WORDSIZE 64
+#else
+#define __WORDSIZE 32
+#endif
+
+/* from ISO/IEC 988:1999 spec */
+
+/* 7.18.1.1 Exact-width integer types */
+#ifndef _INT8_T
+#define _INT8_T
+typedef signed char           int8_t;
+#endif /*_INT8_T */
+
+#ifndef _INT16_T
+#define _INT16_T
+typedef short                int16_t;
+#endif /* _INT16_T */
+
+#ifndef _INT32_T
+#define _INT32_T
+typedef int                  int32_t;
+#endif /* _INT32_T */
+
+#ifndef _INT64_T
+#define _INT64_T
+typedef long long            int64_t;
+#endif /* _INT64_T */
+
+#ifndef _UINT8_T
+#define _UINT8_T
+typedef unsigned char         uint8_t;
+#endif /*_UINT8_T */
+
+#ifndef _UINT16_T
+#define _UINT16_T
+typedef unsigned short       uint16_t;
+#endif /* _UINT16_T */
+
+#ifndef _UINT32_T
+#define _UINT32_T
+typedef unsigned int         uint32_t;
+#endif /* _UINT32_T */
+
+#ifndef _UINT64_T
+#define _UINT64_T
+typedef unsigned long long   uint64_t;
+#endif /* _UINT64_T */
+
+/* 7.18.1.2 Minimum-width integer types */
+typedef int8_t           int_least8_t;
+typedef int16_t         int_least16_t;
+typedef int32_t         int_least32_t;
+typedef int64_t         int_least64_t;
+typedef uint8_t         uint_least8_t;
+typedef uint16_t       uint_least16_t;
+typedef uint32_t       uint_least32_t;
+typedef uint64_t       uint_least64_t;
+
+
+/* 7.18.1.3 Fastest-width integer types */
+typedef int8_t            int_fast8_t;
+typedef int16_t          int_fast16_t;
+typedef int32_t          int_fast32_t;
+typedef int64_t          int_fast64_t;
+typedef uint8_t          uint_fast8_t;
+typedef uint16_t        uint_fast16_t;
+typedef uint32_t        uint_fast32_t;
+typedef uint64_t        uint_fast64_t;
+
+
+/* 7.18.1.4 Integer types capable of holding object pointers */
+
+#ifndef _INTPTR_T
+#define _INTPTR_T
+typedef long   intptr_t;
+#endif /* _INTPTR_T */
+
+#ifndef _UINTPTR_T
+#define _UINTPTR_T
+typedef unsigned long   uintptr_t;
+#endif /* _UINTPTR_T */
+
+
+/* 7.18.1.5 Greatest-width integer types */
+#ifndef _INTMAX_T
+#define _INTMAX_T
+#ifdef __INTMAX_TYPE__
+typedef __INTMAX_TYPE__             intmax_t;
+#else /* __INTMAX_TYPE__ */
+typedef long long                intmax_t;
+#endif /* __INTMAX_TYPE__ */
+#endif /* _INTMAX_T */
+
+#ifndef _UINTMAX_T
+#define _UINTMAX_T
+#ifdef __UINTMAX_TYPE__
+typedef __UINTMAX_TYPE__             uintmax_t;
+#else /* __UINTMAX_TYPE__ */
+typedef unsigned long long      uintmax_t;
+#endif /* __UINTMAX_TYPE__ */
+#endif /* _UINTMAX_T */
+
+/* 7.18.2 Limits of specified-width integer types:
+ *   These #defines specify the minimum and maximum limits
+ *   of each of the types declared above.
+ */
+
+
+/* 7.18.2.1 Limits of exact-width integer types */
+#define INT8_MAX         127
+#define INT16_MAX        32767
+#define INT32_MAX        2147483647
+#define INT64_MAX        9223372036854775807LL
+
+#define INT8_MIN          -128
+#define INT16_MIN         -32768
+   /*
+      Note:  the literal "most negative int" cannot be written in C --
+      the rules in the standard (section 6.4.4.1 in C99) will give it
+      an unsigned type, so INT32_MIN (and the most negative member of
+      any larger signed type) must be written via a constant expression.
+   */
+#define INT32_MIN        (-INT32_MAX-1)
+#define INT64_MIN        (-INT64_MAX-1)
+
+#define UINT8_MAX         255
+#define UINT16_MAX        65535
+#define UINT32_MAX        4294967295U
+#define UINT64_MAX        18446744073709551615ULL
+
+/* 7.18.2.2 Limits of minimum-width integer types */
+#define INT_LEAST8_MIN    INT8_MIN
+#define INT_LEAST16_MIN   INT16_MIN
+#define INT_LEAST32_MIN   INT32_MIN
+#define INT_LEAST64_MIN   INT64_MIN
+
+#define INT_LEAST8_MAX    INT8_MAX
+#define INT_LEAST16_MAX   INT16_MAX
+#define INT_LEAST32_MAX   INT32_MAX
+#define INT_LEAST64_MAX   INT64_MAX
+
+#define UINT_LEAST8_MAX   UINT8_MAX
+#define UINT_LEAST16_MAX  UINT16_MAX
+#define UINT_LEAST32_MAX  UINT32_MAX
+#define UINT_LEAST64_MAX  UINT64_MAX
+
+/* 7.18.2.3 Limits of fastest minimum-width integer types */
+#define INT_FAST8_MIN     INT8_MIN
+#define INT_FAST16_MIN    INT16_MIN
+#define INT_FAST32_MIN    INT32_MIN
+#define INT_FAST64_MIN    INT64_MIN
+
+#define INT_FAST8_MAX     INT8_MAX
+#define INT_FAST16_MAX    INT16_MAX
+#define INT_FAST32_MAX    INT32_MAX
+#define INT_FAST64_MAX    INT64_MAX
+
+#define UINT_FAST8_MAX    UINT8_MAX
+#define UINT_FAST16_MAX   UINT16_MAX
+#define UINT_FAST32_MAX   UINT32_MAX
+#define UINT_FAST64_MAX   UINT64_MAX
+
+/* 7.18.2.4 Limits of integer types capable of holding object pointers */
+
+#if __WORDSIZE == 64
+#define INTPTR_MIN	  INT64_MIN
+#define INTPTR_MAX	  INT64_MAX
+#else
+#define INTPTR_MIN        INT32_MIN
+#define INTPTR_MAX        INT32_MAX
+#endif
+
+#if __WORDSIZE == 64
+#define UINTPTR_MAX	  UINT64_MAX
+#else
+#define UINTPTR_MAX       UINT32_MAX
+#endif
+
+/* 7.18.2.5 Limits of greatest-width integer types */
+#define INTMAX_MIN        INT64_MIN
+#define INTMAX_MAX        INT64_MAX
+
+#define UINTMAX_MAX       UINT64_MAX
+
+/* 7.18.3 "Other" */
+#if __WORDSIZE == 64
+#define PTRDIFF_MIN	  INT64_MIN
+#define PTRDIFF_MAX	  INT64_MAX
+#else
+#define PTRDIFF_MIN       INT32_MIN
+#define PTRDIFF_MAX       INT32_MAX
+#endif
+
+/* We have no sig_atomic_t yet, so no SIG_ATOMIC_{MIN,MAX}.
+   Should end up being {-127,127} or {0,255} ... or bigger.
+   My bet would be on one of {U}INT32_{MIN,MAX}. */
+
+#if __WORDSIZE == 64
+#define SIZE_MAX	  UINT64_MAX
+#else
+#define SIZE_MAX          UINT32_MAX
+#endif
+
+#ifndef WCHAR_MAX
+#  ifdef __WCHAR_MAX__
+#    define WCHAR_MAX     __WCHAR_MAX__
+#  else
+#    define WCHAR_MAX     0x7fffffff
+#  endif
+#endif
+
+/* WCHAR_MIN should be 0 if wchar_t is an unsigned type and
+   (-WCHAR_MAX-1) if wchar_t is a signed type.  Unfortunately,
+   it turns out that -fshort-wchar changes the signedness of
+   the type. */
+#ifndef WCHAR_MIN
+#  if WCHAR_MAX == 0xffff
+#    define WCHAR_MIN       0
+#  else
+#    define WCHAR_MIN       (-WCHAR_MAX-1)
+#  endif
+#endif
+
+#define WINT_MIN	  INT32_MIN
+#define WINT_MAX	  INT32_MAX
+
+#define SIG_ATOMIC_MIN	  INT32_MIN
+#define SIG_ATOMIC_MAX	  INT32_MAX
+
+/* 7.18.4 Macros for integer constants */
+#define INT8_C(v)    (v)
+#define INT16_C(v)   (v)
+#define INT32_C(v)   (v)
+#define INT64_C(v)   (v ## LL)
+
+#define UINT8_C(v)   (v ## U)
+#define UINT16_C(v)  (v ## U)
+#define UINT32_C(v)  (v ## U)
+#define UINT64_C(v)  (v ## ULL)
+
+#define INTMAX_C(v)  (v ## LL)
+#define UINTMAX_C(v) (v ## ULL)
+
+#endif /* _STDINT_H_ */
diff --git a/gcc-4.2.1-5666.3/more-hdrs/varargs.h b/gcc-4.2.1-5666.3/more-hdrs/varargs.h
new file mode 100644
index 000000000..83188caef
--- /dev/null
+++ b/gcc-4.2.1-5666.3/more-hdrs/varargs.h
@@ -0,0 +1,6 @@
+/* This file is public domain.  */
+#ifdef __MWERKS__
+#include "mw_varargs.h"
+#else
+#error "This header only supports __MWERKS__."
+#endif