toolchain_gcc/gcc-4.7/gcc/config/mips, branch replicant-6.0

Delete old versions of GCC.

2015-06-17T21:15:22+00:00

Change-Id: I710f125d905290e1024cbd67f48299861790c66c

Backport fix to set mips_dbx_regno entries to IGNORED_DWARF_REGNUM by default

2013-10-25T07:09:22+00:00

  2012-12-12  Steve Ellcey  
	* config/mips/mips.c (mips_option_override): Set
	mips_dbx_regno entries to IGNORED_DWARF_REGNUM by default.

  2012-12-10  Steve Ellcey  
	PR target/54061
	rtl.h (IGNORED_DWARF_REGNUM): New.
	* dwarf2out.c (reg_loc_descriptor): Check for IGNORED_DWARF_REGNUM.
	(mem_loc_descriptor): Ditto.
	* config/mips/mips.h (ALL_COP_REG_FIRST): New.
	(ALL_COP_REG_LAST): New.
	(ALL_COP_REG_NUM): Redefine using above macros.
	* config/mips/mips.c (mips_option_override): Set mips_dbx_regno
	coprocessor entries to IGNORED_DWARF_REGNUM.

Error reads:
  target C++: libicui18n <= external/icu4c/i18n/olsontz.cpp
  external/icu4c/i18n/decimfmt.cpp: In member function 'virtual icu_50::UnicodeString&
    icu_50::DecimalFormat::format(const icu_50::StringPiece&, icu_50::UnicodeString&,
    icu_50::FieldPositionIterator*, UErrorCode&) const':
  external/icu4c/i18n/decimfmt.cpp:1322:1: internal compiler error: in dbx_reg_number,
  at dwarf2out.c:10185

See http://gcc.gnu.org/ml/gcc-patches/2012-12/msg00830.html

Change-Id: I84110b5b54d8d9262043811eddb0edc1c42303f8

Extend MIPS GCC4.6/4.7/4.8 -mldc1-sdc1 to control ldxc1/sdxc1 too

2013-08-30T01:57:31+00:00

-mldc1-sdc1 now also controls codegen of ldxc1/sdxc1, the indexed
versions (where address of load/store is computed from sum of two
registers) of ldc1/sdc1 which are already controlled by this option.

Although double (or struct containing double) is always aligned
and the stock does guarantee 8-byte alignment, this option
is to workaround issue when double is allocated from a custom
allocator w/o honoring 8-byte minimal alignment.

Change-Id: I79433976509b885b5699d62693fd3154bb752abf

Add MXU support in gcc4.6/4.7/4.8 with -mmxu

2013-08-15T03:36:10+00:00

For Ingenic MXU.

Change-Id: Ie7b465c971e3642b3244ac1a77b6f86be4ab4fea

Add new GCC/MIPS option -mldc1-sdc1

2013-04-26T04:56:39+00:00

ldc1/sdc1 needs memory to be 8-byte aligned.
This option is on by default for arch supports it, but can be turned
off by "-mno-ldc1-sdc1" to workaround issue, for example.

Change-Id: I14291dc4280e75f6c765c933b60eb1b7cd44f974

Fix MIPS GCC to emit -m elf32ltsmip for linker

2013-02-28T02:54:44+00:00

ARM/X86 GCC in NDK explicitly emit -m armelf_linux_eabi and -m elf_i386,
respectively, for linker.  Fix MIPS to do the same, to help mclinker
which is built vanilla and relies on either filename (eg.
eg. arm-linux-androideabi-ld.mcd implies arm) or -mtriple/-march/-m
to figure out the target

Change-Id: I236786d0e90a3152225de1eea5e73e3de4ac3f84

Fix OpenMP

2012-12-27T13:46:00+00:00

Based on 1271761f530c0050154e8d526b95f952df551751,
92c478dba755a1a2f6f00ff390666acbffd41982, and
51df2e98d22e2c6f5d2a16860bc8fc3644179c1d.

With the following modifications:
1. Translate -pthread to -lc instead of -lpthread Android
   doesn't have (has pthread* in libc.so instead)
2. Because of 1., we can restore to the original order of
   LINUX_OR_ANDROID_LD

Change-Id: I505250c32b9908cb17bb269dc26e73c91669c07f

Enable MIPS floating-point madd/msub/nmadd/nmsub/recip/rsqrt with 32-bit FPU.

2012-12-11T05:48:05+00:00

Merge "Port MIPS Android support to GCC-4.6/4.7"

2012-10-23T18:06:25+00:00

Port MIPS Android support to GCC-4.6/4.7

2012-10-23T13:39:50+00:00

Used to be local NDK patch at $NDK/build/tools/toolchain-patches/
gcc/0008-Port-MIPS-Android-support-to-GCC-4.6.patch

Change-Id: I486ea194683b370dcb038488a92fadef7e2da1ac