Add upstream binutils-2.25 snapshot 4/4 2014

For MIPS -mmsa support

Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96

1 files changed, 1869 insertions, 0 deletions

diff --git a/binutils-2.25/opcodes/ChangeLog-2007 b/binutils-2.25/opcodes/ChangeLog-2007
new file mode 100644
index 00000000..d628f1ca
--- /dev/null
+++ b/binutils-2.25/opcodes/ChangeLog-2007
@@ -0,0 +1,1869 @@
+2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_table): Use "%LQ" on cvtsi2ss/cvtsi2sd.
+	(putop): Handle '%' and "LQ".
+
+	* i386-opc.tbl: Remove IgnoreSize from cvtsi2ss/cvtsi2sd.
+	* i386-tbl.h: Regenerated.
+
+2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to
+	CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS.
+	(cpu_flags): Add CpuSSE4_1_Or_5.
+
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+	* i386-opc.h (CpuSSE4_1_Or_5): New.
+	(CpuLM): Updated.
+	(i386_cpu_flags): Add cpusse4_1_or_5.
+
+	* i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5
+	on ptest, roundpd, roundps, roundsd and roundss.
+
+2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
+	IntelMnemonic.
+
+	* i386-opc.h (OldGcc): New.
+	(ATTMnemonic): Likewise.
+	(IntelMnemonic): Likewise.
+	(Opcode_Modifier_Max): Updated.
+	(i386_opcode_modifier): Add oldgcc, attmnemonic and
+	intelmnemonic.
+
+	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
+	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
+	IntelMnemonic.
+	* i386-tbl.h: Regeneratd.
+
+2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (intel_mnemonic): New.
+	(print_i386_disassembler_options): Display att-mnemonic and
+	intel-mnemonic options.
+	(print_insn): Handle att-mnemonic and intel-mnemonic.
+	(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
+	(putop): Handle "!M" and "M".
+
+2007-12-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (i386-gen.o): Also depend on
+	$(srcdir)/../include/opcode/i386.h.
+	* Makefile.in: Regenerated.
+
+2007-11-29  Mark Shinwell  <shinwell@codesourcery.com>
+
+	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
+	entries.
+	* mips-opc.c (IL2E): New.
+	(IL2F): New.
+	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
+	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
+	Move coprocessor encodings to the end of the table.  Allow
+	certain MIPS V .ps instructions on the Loongson-2E and -2F.
+
+2007-11-29  Mark Shinwell  <shinwell@codesourcery.com>
+
+	* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
+	(mips_builtin_opcodes): Use these new I* values.
+
+2007-11-27  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt",
+	"tgxt"): Removed.
+	("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
+
+2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* ia64-ic.tbl: Updated for Itanium 9100 series.
+	* ia64-raw.tbl: Likewise.
+	* ia64-waw.tbl: Likewise.
+	* ia64-asmtab.c: Regenerated.
+
+2007-11-14  Tristan Gingold  <gingold@adacore.com>
+
+	* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
+	* ia64-gen.c (lookup_regindex): Likewise.
+
+2007-11-07  Jens Arnold  <jens@jens-arnold.net>
+
+	PR gas/5228
+	* m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with
+	parallel loads.
+
+2007-11-07  Tristan Gingold  <gingold@adacore.com>
+
+	* ia64-dis.c (print_insn_ia64): Generate symbolic names for cr
+	registers instead of register number.
+
+2007-11-07  David O'Brien  <obrien@FreeBSD.org>
+
+	* arm-dis.c (arm_opcodes): Remove superflous escapes of percent
+	operators.
+
+2007-11-06  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodes
+	which are not included in the "Preliminary Decimal Floating-Point
+	Architecture" document.
+
+2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (opcode_modifiers): Replace No_xSuf with
+	No_ldSuf.
+	* i386-opc.tbl: Likewise.
+
+	* i386-opc.h (No_xSuf): Renamed to ...
+	(No_ldSuf): This.
+	(FWait): Updated.
+
+2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
+	ToQword and AddrPrefixOp0.
+
+	* i386-opc.h (ByteOkIntel): New.
+	(ToDword): Likewise.
+	(ToQword): Likewise.
+	(AddrPrefixOp0): Likewise.
+	(IsPrefix): Updated.
+	(i386_opcode_modifier): Add byteokintel, todword, toqword
+	and addrprefixop0.
+
+	* i386-opc.tbl (cvtss2si): Add ToQword.
+	(cvttss2si): Likewise.
+	(cvtsd2si): Add ToDword.
+	(cvttsd2si): Likewise.
+	(monitor): Add AddrPrefixOp0.
+	(invlpga): Likewise.
+	(vmload): Likewise.
+	(vmrun): Likewise.
+	(vmsave): Likewise.
+	(pextrb): Add ByteOkIntel.
+	(pinsrb): Likewise.
+	* i386-tbl.h: Regenerated.
+
+2007-10-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1.
+	(USE_REG_TABLE): Likewise.
+	(USE_MOD_TABLE): Likewise.
+	(USE_RM_TABLE): Likewise.
+	(USE_PREFIX_TABLE): Likewise.
+	(USE_X86_64_TABLE): Likewise.
+	(USE_3BYTE_TABLE): Likewise.
+
+2007-10-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New.
+	(MOD_0F51): Likewise.
+	(MOD_0FD7): Likewise.
+	(MOD_0FE7_PREFIX_2): Likewise.
+	(MOD_0F382A_PREFIX_2): Likewise.
+	(MOD_0F71_REG_2): Updated.
+	(MOD_0FF0_PREFIX_3): Likewise.
+	(MOD_62_32BIT): Likewise.
+	(dis386_twobyte): Use MOD_0F51 and  MOD_0FD7.
+	(prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
+	MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2.
+	(mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
+	MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
+
+2007-10-26  Nick Clifton  <nickc@redhat.com>
+
+	* arm-dis.c (print_insn): Check for a symtab that exists but is
+	empty.
+
+2007-10-24  Alan Modra  <amodra@bigpond.net.au>
+
+	* po/POTFILES.in: Regenerate.
+
+2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_SIMD_Suffix): Renamed to ...
+	(CMP_Fixup): This.  Rewrite.
+	(OPSIMD): Renamed to ...
+	(CMP): This. Updated.
+	(prefix_table): Update PREFIX_0FC2 entry.
+
+2007-10-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_table): Reordered by opcode.
+	(mod_table): Likewise.
+
+2007-10-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
+
+2007-10-17  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
+	coldfire.
+
+2007-10-15  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (powerpc_opcodes): Fix the first two operands of
+	dquaiq. to use the TE and FRT macros.
+
+2007-10-15  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (TE): Correct signedness.
+	(powerpc_opcodes): Sort psq_st and psq_stu according to major
+	opcode number.
+
+2007-10-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (dis386_twobyte): Reformat.
+	(prefix_table):  Likewise.
+	(three_byte_table): Likewise.
+
+2007-10-15  Alan Modra  <amodra@bigpond.net.au>
+
+	* mcore-dis.c (print_insn_mcore): Protect "fprintf" var against
+	macro expansion.
+
+2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (opcode_modifiers): Add FirstXmm0.
+
+	* i386-opc.h (FirstXmm0): New.
+	(IsPrefix): Updated.
+	(i386_opcode_modifier): Add firstxmm0.
+
+	* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
+	(blendvps): Likewise.
+	(pblendvb): Likewise.
+	* i386-tbl.h: Regenerated.
+
+2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
+
+2007-10-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (v_mode): Defined as previous one + 1.
+	(w_mode): Likewise.
+	(d_mode): Likewise.
+	(q_mode): Likewise.
+	(t_mode): Likewise.
+	(x_mode): Likewise.
+	(m_mode): Likewise.
+	(cond_jump_mode): Likewise.
+	(loop_jcxz_mode): Likewise.
+	(dq_mode): Likewise.
+	(dqw_mode): Likewise.
+	(f_mode): Likewise.
+	(const_1_mode): Likewise.
+	(stack_v_mode): Likewise.
+	(z_mode): Likewise.
+	(o_mode): Likewise.
+	(dqb_mode): Likewise.
+	(dqd_mode): Likewise.
+	(es_reg): Likewise.
+	(cs_reg): Likewise.
+	(ss_reg): Likewise.
+	(ds_reg): Likewise.
+	(fs_reg): Likewise.
+	(gs_reg): Likewise.
+	(eAX_reg): Likewise.
+	(eCX_reg): Likewise.
+	(eDX_reg): Likewise.
+	(eBX_reg): Likewise.
+	(eSP_reg): Likewise.
+	(eBP_reg): Likewise.
+	(eSI_reg): Likewise.
+	(eDI_reg): Likewise.
+	(al_reg): Likewise.
+	(cl_reg): Likewise.
+	(dl_reg): Likewise.
+	(bl_reg): Likewise.
+	(ah_reg): Likewise.
+	(ch_reg): Likewise.
+	(dh_reg): Likewise.
+	(bh_reg): Likewise.
+	(ax_reg): Likewise.
+	(cx_reg): Likewise.
+	(dx_reg): Likewise.
+	(bx_reg): Likewise.
+	(sp_reg): Likewise.
+	(bp_reg): Likewise.
+	(si_reg): Likewise.
+	(di_reg): Likewise.
+	(rAX_reg): Likewise.
+	(rCX_reg): Likewise.
+	(rDX_reg): Likewise.
+	(rBX_reg): Likewise.
+	(rSP_reg): Likewise.
+	(rBP_reg): Likewise.
+	(rSI_reg): Likewise.
+	(rDI_reg): Likewise.
+	(z_mode_ax_reg): Likewise.
+	(indir_dx_reg): Likewise.
+	(DREX_OC1): Updated.
+	(DREX_NO_OC0): Likewise.
+	(DREX_MASK): Likewise.
+	(MAX_BYTEMODE): New.  Issue an error if MAX_BYTEMODE is not
+	less than DREX_OC1.
+
+2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c: Updated comments for 'Y'.
+	(putop): Don't add 'q' for 'Y' if suffix_always isn't true.
+
+2007-10-08  Maciej W. Rozycki  <macro@linux-mips.org>
+
+	* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
+	(mips_cp0_names_r4000): Likewise.
+	(mips_arch_choices): Link to the above as appropriate.
+
+2007-10-08  Nick Clifton  <nickc@redhat.com>
+
+	* configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency
+	to be ../bfd/libbfd.la.
+	* configure: Regenerate.
+
+2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (dis386_twobyte): Add getsec.
+
+	* i386-gen.c (cpu_flags): Add CpuSMX.
+
+	* i386-opc.h (CpuSMX): New.
+	(CpuSSSE3): Updated.
+	(i386_cpu_flags): Add cpusmx.
+
+	* i386-opc.tbl: Add getsec.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
+	(prefix_table): Likewise.
+
+2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
+	unpckhpX and unpckhpX.
+
+2007-10-04  David Daney  <ddaney@avtrex.com>
+
+	* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
+	registers.
+
+2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
+	instead of "movlpX" and "movhlpX", respectively.
+	(MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
+	"movhpX" and "movlhpX", respectively.
+
+2007-10-04  Nick Clifton  <nickc@redhat.com>
+
+	* configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS.
+	(WIN32LIBADD): Rename to SHARED_LIBADD
+	(SHARED_DEPENDENCIES): New exported variable.
+	(enable_shared): Add dependency upon libbfd.la for non-cygwin
+	based shared library builds.
+	* Makefile.am (libopcodes_la_DEPENDENCIES): Append
+	SHARED_DEPENDENCIES.
+	(libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD.
+	(libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS.
+	* configure: Regenerate.
+	* Makefile.in: Regenerate.
+
+	PR gas/5100
+	* arc-opc.c (insert_offset): Fix spelling mistake in error
+	message.
+
+2007-10-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_REG): Set add to 0 only when needed.
+	(OP_C): Likewise.
+	(OP_D): Likewise.
+	(OP_MMX): Likewise.
+	(OP_XMM): Likewise.
+	(OP_EM): Likewise.
+	(OP_MXC): Likewise.
+	(OP_EX): Likewise.
+
+2007-10-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.tbl: Update SSE comments.
+
+2007-10-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
+	(THREE_BYTE_0F7B): This.
+	(dis386_twobyte): Updated.
+	(three_byte_table): Updated comments.
+
+2007-10-01  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+	* cr16-opc.c: Updated the branch on condition instructions with
+	RELAXABLE flag.
+
+2007-09-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* 386-dis.c (prefix_table): Reformat comment.
+
+2007-09-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* 386-dis.c (USE_GROUPS): Renamed to ...
+	(USE_REG_TABLE): This.
+	(USE_OPC_EXT_TABLE): Renamed to ...
+	(USE_MOD_TABLE): This.
+	(USE_OPC_EXT_RM_TABLE): Renamed to ...
+	(USE_RM_TABLE): This.
+	(USE_XXX_TABLE): Reordered.
+	(GRP): Renamed to ...
+	(REG_TABLE): This.
+	(OPC_EXT_TABLE): Renamed to ...
+	(MOD_TABLE): This.
+	(OPC_EXT_RM_TABLE): Renamed to ...
+	(RM_TABLE): This.
+	(GRP_XXX): Renamed to ...
+	(REG_XXX): This.
+	(PREGRP_XXX): Renamed to ...
+	(PREFIX_XXX): This.
+	(OPC_EXT_XXX): Renamed to ...
+	(MOD_XXX): This.
+	(OPC_EXT_RM_XXX): Renamed to ...
+	(RM_XXX): This.
+	(grps): Renamed to ...
+	(reg_table): This
+	(prefix_user_table): Renamed to ...
+	(prefix_table): This
+	(opc_ext_table): Renamed to ...
+	(mod_table): This
+	(opc_ext_rm_table): Renamed to ...
+	(rm_table): This
+	(OPC_EXT_RM_XXX): Likewise.
+	(dis386): Updated.
+	(dis386_twobyte): Likewise.
+	(reg_table): Likewise.
+	(prefix_table): Likewise.
+	(x86_64_table): Likewise.
+	(three_byte_table): Likewise.
+	(mod_table): Likewise.
+	(rm_table): Likewise.
+	(get_valid_dis386): Likewise.
+
+2007-09-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
+	(USE_PREFIX_TABLE): This.
+	(X86_64_SPECIAL): Renamed to ...
+	(USE_X86_64_TABLE): This.
+	(IS_3BYTE_OPCODE): Renamed to ...
+	(USE_3BYTE_TABLE): This.
+	(GRPXXX): Removed.
+	(PREGRPXXX): Likewise.
+	(X86_64_XXX): Likewise.
+	(THREE_BYTE_XXX): Likewise.
+	(OPC_EXT_XXX): Likewise.
+	(OPC_EXT_RM_XXX): Likewise.
+	(DIS386): New.
+	(GRP): Likewise.
+	(PREGRP): Likewise.
+	(X86_64_TABLE): Likewise.
+	(THREE_BYTE_TABLE): Likewise.
+	(OPC_EXT_TABLE): Likewise.
+	(OPC_EXT_RM_TABLE): Likewise.
+	(GRP_XXX): Likewise.
+	(PREGRP_XXX): Likewise.
+	(X86_64_XXX): Likewise.
+	(THREE_BYTE_XXX): Likewise.
+	(OPC_EXT_XXX): Likewise.
+	(OPC_EXT_RM_XXX): Likewise.
+	(dis386): Updated.
+	(dis386_twobyte): Likewise.
+	(grps): Likewise.
+	(prefix_user_table): Likewise.
+	(x86_64_table): Likewise.
+	(three_byte_table): Likewise.
+	(opc_ext_table): Likewise.
+	(opc_ext_rm_table): Likewise.
+	(get_valid_dis386): Likewise.
+
+2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
+	(x86_64_table): Likewise.
+	(opc_ext_table): Likewise.
+
+2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/5072
+	* i386-dis.c: Update comments on '{', '}' and '|' to support
+	only AT&T and Intel modes.
+	(X86_64_4...X86_64_27): New.
+	(dis386): Updated.  Use X86_64_4...X86_64_21.
+	(dis386_twobyte): Updated.
+	(float_mem): Likewise.
+	(x86_64_table): Add X86_64_4...X86_64_27.
+	(opc_ext_table): Updated.  Use X86_64_22...X86_64_27.
+	(putop): Updated handling of '{', '}' and '|' to support only
+	AT&T and Intel modes.
+
+2007-09-27  Kazu Hirata  <kazu@codesourcery.com>
+
+	* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
+
+2007-09-26  James E. Wilson  <wilson@specifix.com>
+
+	* ia64-gen.c (print_dependency_table): Fix typo in last patch.
+
+2007-09-26  Nick Clifton  <nickc@redhat.com>
+
+	* mt-asm.c (parse_imm16): Reword error message in order to allow
+	it to be translated properly.
+	* ia64-gen.c (print_dependency_table): Likewise.
+	* mips-dis.c (print_insn_args): Likewise.
+
+2007-09-26  Jan Beulich  <jbeulich@novell.com>
+
+	* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
+	relative addressing. Update used_prefixes based on whether any
+	base or index register was printed.
+
+2007-09-26  Jan Beulich  <jbeulich@novell.com>
+
+	* i386-opc.h (RegEip): Define.
+	(RegEiz): Adjust.
+	* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
+	* i386-tbl.h: Re-generate.
+
+2007-09-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (process_i386_opcodes): Process opcode_length.
+
+	* i386-opc.h (template): Add opcode_length.
+	* 386-opc.tbl: Likewise.
+	* i386-tbl.h: Regenerated.
+
+2007-09-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.h: Adjust whitespaces.
+
+2007-09-21  Dave Brolley  <brolley@redhat.com>
+
+	* mep-desc.c: Regenerated.
+
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
+
+2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR 658
+	* 386-dis.c (index64): New.
+	(index32): Likewise.
+	(intel_index64): Likewise.
+	(intel_index32): Likewise.
+	(att_index64): Likewise.
+	(att_index32): Likewise.
+	(print_insn): Set index64 and index32.
+	(OP_E_extended): Use index64/index32 for index register for
+	SIB with INDEX == 4.
+
+	* i386-opc.h (RegEiz): New.
+	(RegRiz): Likewise.
+
+	* i386-reg.tbl: Add eiz and riz.
+	* i386-tbl.h: Regenerated.
+
+2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_E_extended): Always display scale for memory.
+
+2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.h (RegRip): New.
+
+	* i386-reg.tbl (rip): Use RegRip for reg_num.
+	* i386-tbl.h: Regenerated.
+
+2007-09-17  Nick Clifton  <nickc@redhat.com>
+
+	* po/es.po: Updated Spanish translation.
+
+2007-09-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+
+2007-09-14  Michael Meissner  <michael.meissner@amd.com>
+	    Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+	    Tony Linthicum  <tony.linthicum@amd.com>
+
+	* i386-opc.h (CpuSSE5):  New macro.
+	(i386_cpu_flags): Add Drex, Drexv and Drexc.
+
+	* i386-gen.c (cpu_flag_init): Add CPU_SSE5_FLAGS.
+	(operand_type_init): Add CpuSSE5.
+	(opcode_modifiers): Add Drex, Drexv and Drexc.
+	(i386_opcode_modifier): Ditto.
+
+	* i386-opc.tbl (fmaddps,fmaddpd,fmaddss,fmaddsd): Define SSE5
+	instructions here.
+	(fmsubps,fmsubpd,fmsubss,fmsubsd): Ditto.
+	(fnmaddps,fnmaddpd,fnmaddss,fnmaddsd): Ditto.
+	(fnmsubps,fnmsubpd,fnmsubss,fnmsubsd): Ditto.
+	(pmacssww,pmacsww,pmacsswd,pmacswd): Ditto.
+	(pmacssdd,pmacsdd,pmacssdql,pmacssdqh): Ditto.
+	(pmacsdql,pmacsdqh,pmadcsswd,pmadcswd): Ditto.
+	(phaddbw,phaddbd,phaddbq,phaddwd): Ditto.
+	(phaddwq,phadddq,phaddubw,phaddubd): Ditto.
+	(phaddubq,phadduwd,phadduwq,phaddudq): Ditto.
+	(phsubbw,phsubwd,phsubdq): Ditto.
+	(pcmov,pperm,permps,permpd): Ditto.
+	(protb,protw,protd,protq): Ditto.
+	(pshlb,pshlw,pshld,pshlq): Ditto.
+	(pshab,pshaw,pshad,pshaq): Ditto.
+	(comps,comeqps,comltps,comungeps,comleps,comungtps): Ditto.
+	(comunordps,comneps,comneqps,comnltps,comugeps): Ditto.
+	(comnleps,comugtps,comordps,comueqps,comultps): Ditto.
+	(comngeps,comuleps,comngtps,comfalseps,comuneps): Ditto.
+	(comuneqps,comunltps,comgeps,comunleps,comgtps,comtrueps): Ditto.
+	(compd,comeqpd,comltpd,comungepd,comlepd,comungtpd,comunordpd): Ditto.
+	(comnepd,comneqpd,comnltpd,comugepd,comnlepd,comugtpd): Ditto.
+	(comordpd,comueqpd,comultpd,comngepd,comulepd,comngtpd): Ditto.
+	(comfalsepd,comunepd,comuneqpd,comunltpd,comgepd): Ditto.
+	(comunlepd,comgtpd,comtruepd): Ditto.
+	(comss,comeqss,comltss,comungess,comless,comungtss,comunordss): Ditto.
+	(comness,comneqss,comnltss,comugess,comnless,comugtss): Ditto.
+	(comordss,comueqss,comultss,comngess,comuless,comngtss): Ditto.
+	(comfalsess,comuness,comuneqss,comunltss,comgess): Ditto.
+	(comunless,comgtss,comtruess): Ditto.
+	(comsd,comeqsd,comltsd,comungesd,comlesd,comungtsd,comunordsd): Ditto.
+	(comnesd,comneqsd,comnltsd,comugesd,comnlesd,comugtsd): Ditto.
+	(comordsd,comueqsd,comultsd,comngesd,comulesd,comngtsd): Ditto.
+	(comfalsesd,comunesd,comuneqsd,comunltsd,comgesd): Ditto.
+	(comunlesd,comgtsd,comtruesd): Ditto.
+	(pcomub,pcomltub,pcomleub,pcomgtub,pcomgeub,pcomequb): Ditto.
+	(pcomnequb,pcomneub): Ditto.
+	(pcomuw,pcomltuw,pcomleuw,pcomgtuw,pcomgeuw,pcomequw): Ditto.
+	(pcomnequw,pcomneuw): Ditto.
+	(pcomud,pcomltud,pcomleud,pcomgtud,pcomgeud,pcomequd): Ditto.
+	(pcomnequd,pcomneud): Ditto.
+	(pcomuq,pcomltuq,pcomleuq,pcomgtuq,pcomgeuq,pcomequq): Ditto.
+	(pcomnequq,pcomneuq): Ditto.
+	(pcomb,pcomltb,pcomleb,pcomgtb,pcomgeb,pcomeqb): Ditto.
+	(pcomneqb,pcomneb): Ditto.
+	(pcomw,pcomltw,pcomlew,pcomgtw,pcomgew,pcomeqw): Ditto.
+	(pcomneqw,pcomnew): Ditto.
+	(pcomd,pcomltd,pcomled,pcomgtd,pcomged,pcomeqd): Ditto.
+	(pcomneqd,pcomned): Ditto.
+	(pcomq,pcomltq,pcomleq,pcomgtq,pcomgeq): Ditto.
+	(pcomeqq,pcomneqq,pcomneq): Ditto.
+	(pcomtrueb, pcomtruew, pcomtrued, pcomtrueq): Ditto.
+	(pcomtrueub, pcomtrueuw, pcomtrueud, pcomtrueuq): Ditto.
+	(pcomfalseb, pcomfalsew, pcomfalsed, pcomfalseq): Ditto.
+	(pcomfalseub, pcomfalseuw, pcomfalseud, pcomfalseuq): Ditto.
+	(frczps,frczpd,frczss,frczsd): Ditto.
+	(cvtph2ps,cvtps2ph): Ditto.
+
+	* i386-tbl.h: Regenerate from i386-opc.tbl.
+	* i386-init.h: Likewise.
+
+	* i386-dis.c (libiberty.h): Include to get ARRAY_SIZE.
+	(dis386_move_test): New disassembly support for move from test
+	register instruction that overlaps with SSE5 instructions.
+	(print_insn): Add support for special casing the i386/i486 move
+	from test register instruction that overlaps with the SSE5
+	0x0f24 4 operand instructions.
+	(OP_DREX_ICMP): New macros for SSE5 DREX handling.
+	(OP_DREX_FCMP): Ditto.
+	(OP_E_extended): Rename from OP_E, add additional argument to skip
+	the DREX byte.
+	(OP_E): Call OP_E_extended.
+	(DREX_REG_MEMORY): New macros for drex handling.
+	(DREX_REG_UNKNOWN): Ditto.
+	(DREX4_OC1): Ditto.
+	(DREX4_NO_OC0): Ditto.
+	(DREX4_MASK): Ditto.
+	(three_byte_table): Add SSE5 instructions.
+	(print_drex_arg): New function to print a DREX register or memory
+	reference.
+	(OP_DREX4): New function for handling DREX 4 argument ops.
+	(OP_DREX3): New function for handling DREX 3 argument ops.
+	(twobyte_has_modrm): 0f{25,7a,7b} all use the modrm byte.
+	(THREE_BYTE_SSE5_0F{24,25,7A,7B}): New macros for initializing 3
+	byte opcode support for SSE5 instructions.
+	(dis386_twobyte): Add SSE5 24/25/7a/7b support.
+	(three_byte_table): Add rows for describing SSE5 instructions.
+
+2007-09-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (get_valid_dis386): Take a pointer to
+	disassemble_info.  Handle IS_3BYTE_OPCODE.
+	(print_insn): Updated.  Don't handle IS_3BYTE_OPCODE here.
+
+2007-09-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.h (CpuUnused): Defined with CpuMax.
+	(OTUnused): Defined with OTMax.
+
+2007-09-12  Jan Beulich  <jbeulich@novell.com>
+
+	* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
+	pblendvb.
+	* i386-tbl.h: Regenerate.
+
+2007-09-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (main): Remove the local variable, unused.
+
+2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+
+2007-09-08  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* configure.in (AC_CHECK_HEADERS): Add limits.h.
+	* configure: Regenerated.
+	* config.in: Likewise.
+
+	* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
+	<string.h>.  Use xstrerror instead of strerror.
+	(initializer): New.
+	(cpu_flag_init): Likewise.
+	(bitfield): Likewise.
+	(BITFIELD): New.
+	(cpu_flags): Likewise.
+	(opcode_modifiers): Likewise.
+	(operand_types): Likewise.
+	(compare): Likewise.
+	(set_cpu_flags): Likewise.
+	(output_cpu_flags): Likewise.
+	(process_i386_cpu_flags): Likewise.
+	(output_opcode_modifier): Likewise.
+	(process_i386_opcode_modifier): Likewise.
+	(output_operand_type): Likewise.
+	(process_i386_operand_type): Likewise.
+	(set_bitfield): Likewise.
+	(operand_type_init): Likewise.
+	(process_i386_initializers): Likewise.
+	(process_i386_opcodes): Call process_i386_opcode_modifier to
+	process opcode_modifier.  Call process_i386_operand_type to
+	process operand_types.
+	(process_i386_registers): Call process_i386_operand_type to
+	process reg_type.
+	(main): Check unused bits in i386_cpu_flags and i386_operand_type.
+	Sort cpu_flags, opcode_modifiers and operand_types.  Call
+	process_i386_initializers.
+
+	* i386-init.h: New.
+	* i386-tbl.h: Regenerated.
+
+	* i386-opc.h: Include <limits.h>.
+	(CHAR_BIT): Define as 8 if not defined.
+	(Cpu186): Changed to position of bitfiled.
+	(Cpu286): Likewise.
+	(Cpu386): Likewise.
+	(Cpu486): Likewise.
+	(Cpu586): Likewise.
+	(Cpu686): Likewise.
+	(CpuP4): Likewise.
+	(CpuK6): Likewise.
+	(CpuK8): Likewise.
+	(CpuMMX): Likewise.
+	(CpuMMX2): Likewise.
+	(CpuSSE): Likewise.
+	(CpuSSE2): Likewise.
+	(Cpu3dnow): Likewise.
+	(Cpu3dnowA): Likewise.
+	(CpuSSE3): Likewise.
+	(CpuPadLock): Likewise.
+	(CpuSVME): Likewise.
+	(CpuVMX): Likewise.
+	(CpuSSSE3): Likewise.
+	(CpuSSE4a): Likewise.
+	(CpuABM): Likewise.
+	(CpuSSE4_1): Likewise.
+	(CpuSSE4_2): Likewise.
+	(Cpu64): Likewise.
+	(CpuNo64): Likewise.
+	(D): Likewise.
+	(W): Likewise.
+	(Modrm): Likewise.
+	(ShortForm): Likewise.
+	(Jump): Likewise.
+	(JumpDword): Likewise.
+	(JumpByte): Likewise.
+	(JumpInterSegment): Likewise.
+	(FloatMF): Likewise.
+	(FloatR): Likewise.
+	(FloatD): Likewise.
+	(Size16): Likewise.
+	(Size32): Likewise.
+	(Size64): Likewise.
+	(IgnoreSize): Likewise.
+	(DefaultSize): Likewise.
+	(No_bSuf): Likewise.
+	(No_wSuf): Likewise.
+	(No_lSuf): Likewise.
+	(No_sSuf): Likewise.
+	(No_qSuf): Likewise.
+	(No_xSuf): Likewise.
+	(FWait): Likewise.
+	(IsString): Likewise.
+	(RegKludge): Likewise.
+	(IsPrefix): Likewise.
+	(ImmExt): Likewise.
+	(NoRex64): Likewise.
+	(Rex64): Likewise.
+	(Ugh): Likewise.
+	(Reg8): Likewise.
+	(Reg16): Likewise.
+	(Reg32): Likewise.
+	(Reg64): Likewise.
+	(FloatReg): Likewise.
+	(RegMMX): Likewise.
+	(RegXMM): Likewise.
+	(Imm8): Likewise.
+	(Imm8S): Likewise.
+	(Imm16): Likewise.
+	(Imm32): Likewise.
+	(Imm32S): Likewise.
+	(Imm64): Likewise.
+	(Imm1): Likewise.
+	(BaseIndex): Likewise.
+	(Disp8): Likewise.
+	(Disp16): Likewise.
+	(Disp32): Likewise.
+	(Disp32S): Likewise.
+	(Disp64): Likewise.
+	(InOutPortReg): Likewise.
+	(ShiftCount): Likewise.
+	(Control): Likewise.
+	(Debug): Likewise.
+	(Test): Likewise.
+	(SReg2): Likewise.
+	(SReg3): Likewise.
+	(Acc): Likewise.
+	(FloatAcc): Likewise.
+	(JumpAbsolute): Likewise.
+	(EsSeg): Likewise.
+	(RegMem): Likewise.
+	(OTMax): Likewise.
+	(Reg): Commented out.
+	(WordReg): Likewise.
+	(ImplicitRegister): Likewise.
+	(Imm): Likewise.
+	(EncImm): Likewise.
+	(Disp): Likewise.
+	(AnyMem): Likewise.
+	(LLongMem): Likewise.
+	(LongMem): Likewise.
+	(ShortMem): Likewise.
+	(WordMem): Likewise.
+	(ByteMem): Likewise.
+	(CpuMax): New
+	(CpuLM): Likewise.
+	(CpuNumOfUints): Likewise.
+	(CpuNumOfBits): Likewise.
+	(CpuUnused): Likewise.
+	(OTNumOfUints): Likewise.
+	(OTNumOfBits): Likewise.
+	(OTUnused): Likewise.
+	(i386_cpu_flags): New type.
+	(i386_operand_type): Likewise.
+	(i386_opcode_modifier): Likewise.
+	(CpuSledgehammer): Removed.
+	(CpuSSE4): Likewise.
+	(CpuUnknownFlags): Likewise.
+	(Reg): Likewise.
+	(WordReg): Likewise.
+	(ImplicitRegister): Likewise.
+	(Imm): Likewise.
+	(EncImm): Likewise.
+	(Disp): Likewise.
+	(AnyMem): Likewise.
+	(LLongMem): Likewise.
+	(LongMem): Likewise.
+	(ShortMem): Likewise.
+	(WordMem): Likewise.
+	(ByteMem): Likewise.
+	(template): Use i386_cpu_flags for cpu_flags, use
+	i386_opcode_modifier for opcode_modifier, use
+	i386_operand_type for operand_types.
+	(reg_entry): Use i386_operand_type for reg_type.
+
+	* Makefile.am (HFILES): Add i386-init.h.
+	($(srcdir)/i386-init.h): New rule.
+	($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
+	instead.
+	* Makefile.in: Regenerated.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (next_field): Updated to take a separator.
+	(process_i386_opcodes): Updated.
+	(process_i386_registers): Likewise.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (table): Moved ...
+	(main): Here.  Call process_copyright to output copyright.
+	(process_copyright): New.
+	(process_i386_opcodes): Take FILE *table.
+	(process_i386_registers): Likewise.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (table): New.
+	(process_i386_opcodes): Report errno when faied to open
+	i386-opc.tbl.  Output opcodes to table.  Close i386-opc.tbl
+	before return.
+	(process_i386_registers): Report errno when faied to open
+	i386-reg.tbl.  Output opcodes to table.  Close i386-reg.tbl
+	before return.
+	(main): Open i386-tbl.h for output.
+
+	* Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@".
+	* Makefile.in: Regenerated.
+
+2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.tbl: Correct SVME instructions to allow 32bit register
+	operand in 64bit mode.
+	* i386-tbl.h: Regenerated.
+
+2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New.
+	(dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45.
+	(opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
+
+2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (SVME_Fixup): Removed.
+	(OPC_EXT_39): New.
+	(OPC_EXT_RM_6): Likewise.
+	(grps): Use OPC_EXT_39.
+	(opc_ext_table): Add OPC_EXT_39.
+	(opc_ext_rm_table): Add OPC_EXT_RM_6.
+
+	* i386-opc.tbl: Correct SVME instructions to take register
+	operand only.
+	* i386-tbl.h: Regenerated.
+
+2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE.
+	* Makefile.in: Regenerated.
+
+	* configure.in (AC_GNU_SOURCE): Added.
+	(AC_PROG_CC): Moved before AC_GNU_SOURCE.
+	(AC_CHECK_DECLS): Add stpcpy.
+	* configure: Regenerated.
+	* config.in: Likewise.
+
+	* i386-dis.c: Include "sysdep.h" before "dis-asm.h".
+
+	* sysdep.h (stpcpy): New.
+
+2007-08-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (INVLPG_Fixup): Removed.
+	(OPC_EXT_38): New.
+	(OPC_EXT_RM_5): Likewise.
+	(grps): Use OPC_EXT_38.
+	(opc_ext_table): Add OPC_EXT_38.
+	(opc_ext_rm_table): Add OPC_EXT_RM_5.
+
+2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (SIMD_Fixup): Removed.
+	(OPC_EXT_34...OPC_EXT_37): New.
+	(dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35.
+	(prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37.
+	(opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
+
+2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New.
+	(dis386): Use OPC_EXT_0...OPC_EXT_2.
+	(dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5.
+	(grps): Updated to use OPC_EXT_6...OPC_EXT_31.
+	(prefix_user_table): Use OPC_EXT_32.
+	(x86_64_table): Use OPC_EXT_33.
+	(opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
+
+2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_user_table): Fix comment.
+
+2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_Skip_MODRM): New.
+	(OP_Monitor): Likewise.
+	(OP_Mwait): Likewise.
+	(Mb): Likewise.
+	(Skip_MODRM): Likewise.
+	(USE_OPC_EXT_TABLE): Likewise.
+	(USE_OPC_EXT_RM_TABLE): Likewise.
+	(PREGRP98...PREGRP100): Likewise.
+	(OPC_EXT_0...OPC_EXT_24): Likewise.
+	(OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise.
+	(lock_prefix): Likewise.
+	(data_prefix): Likewise.
+	(addr_prefix): Likewise.
+	(repz_prefix): Likewise.
+	(repnz_prefix): Likewise.
+	(opc_ext_table): Likewise.
+	(opc_ext_rm_table): Likewise.
+	(get_valid_dis386): Likewise.
+	(OP_VMX): Removed.
+	(OP_0fae): Likewise.
+	(PNI_Fixup): Likewise.
+	(VMX_Fixup): Likewise.
+	(VM): Likewise.
+	(twobyte_uses_DATA_prefix): Likewise.
+	(twobyte_uses_REPNZ_prefix): Likewise.
+	(twobyte_uses_REPZ_prefix): Likewise.
+	(threebyte_0x38_uses_DATA_prefix): Likewise.
+	(threebyte_0x38_uses_REPNZ_prefix): Likewise.
+	(threebyte_0x38_uses_REPZ_prefix): Likewise.
+	(threebyte_0x3a_uses_DATA_prefix): Likewise.
+	(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
+	(threebyte_0x3a_uses_REPZ_prefix): Likewise.
+	(grps): Use OPC_EXT_0...OPC_EXT_24.
+	(prefix_user_table): Add PREGRP98...PREGRP100.
+	(print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix,
+	uses_REPNZ_prefix and uses_REPZ_prefix.  Initialize
+	repz_prefix, repnz_prefix, lock_prefix, addr_prefix and
+	data_prefix based on prefixes.  Call get_valid_dis386 to
+	get a pointer to the valid dis386.  Print out prefixes if
+	they aren't NULL.
+	(OP_C): Clear lock_prefix if PREFIX_LOCK is used.
+	(REP_Fixup): Set repz_prefix to "rep " when seeing
+	PREFIX_REPZ.
+
+2007-08-28  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* po/nl.po: Updated translation.
+
+2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (Md): New.
+	(grps): Use 0 on invlpg.  Use M on fxsave and fxrstor.  Use
+	Md on ldmxcsr and stmxcsr.  Use b_mode on clflush.
+	(OP_0fae): Clear bytemode for sfence.
+
+2007-08-22  Ben Elliston  <bje@au.ibm.com>
+
+	* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
+	(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
+	(PPCPS): Likewise.
+	(powerpc_opcodes): Add all pair singles instructions.
+	* ppc-dis.c (powerpc_dialect): Handle "ppcps".
+	(print_ppc_disassembler_options): Document -Mppcps.
+
+2007-08-21  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* s390-mkopc.c (struct s390_cond_ext_format): New global struct.
+	(s390_cond_ext_format): New global variable.
+	(expandConditionalJump): New function.
+	(main): Invoke expandConditionalJump for mnemonics containing '*'.	
+	* s390-opc.txt: Replace mnemonics with conditional
+	mask extensions with instructions using the newly introduced '*' tag.
+
+2007-08-17  Alan Modra  <amodra@bigpond.net.au>
+
+	* po/Make-in: Add --msgid-bugs-address to xgettext invocation.
+
+2007-08-10  Nick Clifton  <nickc@redhat.com>
+
+	* po/fi.po: Updated Finnish translation.
+	* po/ga.po: Updated Irish translation.
+	* po/vi.po: Updated Vietnamese translation.
+
+2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
+	pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
+	* i386-tbl.h: Regenerated.
+
+2007-08-03  James E. Wilson  <wilson@specifix.com>
+
+	* ia64-gen.c: (main): Add missing newline to copyright message.
+	* ia64-ic.tbl (fp-non-arith): Add xmpy.
+	* ia64-asmtab.c: Regenerate.
+	
+2007-08-01  Michael Snyder  <msnyder@access-company.com>
+
+	* i386-dis.c (print_insn): Guard against NULL.
+
+2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4834
+	* i386-dis.c (EXw): New.
+	(prefix_user_table): Updated to use EXw, EXd and EXq for SSE4
+	instructions when appropriated.
+
+2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4834
+	* i386-dis.c (Eq): New.
+	(EMC): Renamed to ...
+	(EMCq): This.  Use q_mode instead of v_mode.
+	(prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
+	when appropriated.
+
+2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (dis386_twobyte): Change "movd" to "movK".
+	(prefix_user_table): Likewise.  Use EXq instead of EXx on
+	"movq".
+
+2007-07-27  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* ppc-opc (PPC7450): New.
+	(powerpc_opcodes): Use it in dcba.
+
+2007-07-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (main): Print a newline after copyright notice.
+
+2007-07-19  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/4801
+	* maxq-dis.c (get_reg_name): Fix the scan of the
+	mem_access_syntax_table.
+
+2007-07-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (EMq): Removed.
+	(EMx): New.
+	(prefix_user_table): Replace EMq with EMx.
+
+2007-07-16  Nick Clifton  <nickc@redhat.com>
+
+	* po/nl.po: Updated translation.
+
+2007-07-12  Nick Clifton  <nickc@redhat.com>
+
+	* po/vi.po: Updated translation.
+	* po/nl.po: Updated translation.
+
+2007-07-06  Mark Kettenis  <kettenis@gnu.org>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (i386-tbl.h): Add $(srcdir)/ to target.
+	(ia64-asmtab.c): Likewise.
+	* Makefile.in: Regenerate.
+
+2007-07-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* aclocal.m4: Regenerated.
+
+2007-07-04  Nick Clifton  <nickc@redhat.com>
+
+	* alpha-dis.c: Update copyright notice to refer to GPLv3.
+	* alpha-opc.c, arc-dis.c, arc-dis.h, arc-ext.c, arc-ext.h,
+	arc-opc.c, arm-dis.c, avr-dis.c, bfin-dis.c, cgen-asm.c,
+	cgen-asm.in, cgen-bitset.c, cgen-dis.c, cgen-dis.in, cgen-ibld.in,
+	cgen-opc.c, cgen-ops.h, cgen.sh, cgen-types.h, cr16-dis.c,
+	cr16-opc.c, cris-dis.c, cris-opc.c, crx-dis.c, crx-opc.c,
+	d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c, disassemble.c,
+	dis-buf.c, dis-init.c, dlx-dis.c, h8300-dis.c, h8500-dis.c,
+	h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c, i386-dis.c,
+	i386-gen.c, i386-opc.c, i386-opc.h, i860-dis.c, i960-dis.c,
+	ia64-asmtab.h, ia64-dis.c, ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c,
+	ia64-opc.c, ia64-opc-d.c, ia64-opc-f.c, ia64-opc.h, ia64-opc-i.c,
+	ia64-opc-m.c, ia64-opc-x.c, m10200-dis.c, m10200-opc.c,
+	m10300-dis.c, m10300-opc.c, m68hc11-dis.c, m68hc11-opc.c,
+	m68k-dis.c, m68k-opc.c, m88k-dis.c, maxq-dis.c, mcore-dis.c,
+	mcore-opc.h, mips16-opc.c, mips-dis.c, mips-opc.c, mmix-dis.c,
+	mmix-opc.c, msp430-dis.c, ns32k-dis.c, opintl.h, or32-dis.c,
+	or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c, pj-opc.c,
+	ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c, s390-opc.c,
+	score-dis.c, score-opc.h, sh64-dis.c, sh64-opc.c, sh64-opc.h,
+	sh-dis.c, sh-opc.h, sparc-dis.c, sparc-opc.c, spu-dis.c,
+	spu-opc.c, sysdep.h, tic30-dis.c, tic4x-dis.c, tic54x-dis.c,
+	tic54x-opc.c, tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c,
+	vax-dis.c, w65-dis.c, w65-opc.h, xtensa-dis.c, z80-dis.c,
+	z8k-dis.c, z8kgen.c: Likewise.
+	* i386-opc.tbl, i386-reg.tbl: Add copyright notice.
+	* aclocal.m4, configure, fr30-asm.c, fr30-desc.c, fr30-desc.h,
+	fr30-dis.c, fr30-ibld.c, fr30-opc.c, fr30-opc.h, frv-asm.c,
+	frv-desc.c, frv-desc.h, frv-dis.c, frv-ibld.c, frv-opc.c,
+	frv-opc.h, i386-tbl.h, ia64-asmtab.c, ip2k-asm.c, ip2k-desc.c,
+	ip2k-desc.h, ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h,
+	iq2000-asm.c, iq2000-desc.c, iq2000-desc.h, iq2000-dis.c,
+	iq2000-ibld.c, iq2000-opc.c, iq2000-opc.h, m32c-asm.c,
+	m32c-desc.c, m32c-desc.h, m32c-dis.c, m32c-ibld.c, m32c-opc.c,
+	m32c-opc.h, m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
+	m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c, mep-asm.c,
+	mep-desc.c, mep-desc.h, mep-dis.c, mep-ibld.c, mep-opc.c,
+	mep-opc.h, mt-asm.c, mt-desc.c, mt-desc.h, mt-dis.c, mt-ibld.c,
+	mt-opc.c, mt-opc.h, openrisc-asm.c, openrisc-desc.c,
+	openrisc-desc.h, openrisc-dis.c, openrisc-ibld.c, openrisc-opc.c,
+	openrisc-opc.h, xc16x-asm.c, xc16x-desc.c, xc16x-desc.h,
+	xc16x-dis.c, xc16x-ibld.c, xc16x-opc.c, xc16x-opc.h,
+	xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
+	xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
+	xstormy16-opc.h, z8k-opc.h: Regenerated
+
+2007-07-04  M R Swami Reddy  <MR.Swami.Reddy@nsc.com>
+
+	* cr16-dis.c (getcinvstring): Add const qualifier to char *
+	parameter.
+	(print_insn_cr16): Remove cast to char *.
+
+2007-07-03  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-dis.c (fetch_arg): Add E.  Replace length switch with
+	direct masking.
+	(print_ins_arg): Add j & K operand types.
+	(match_insn_m68k): Check and skip initial '.' arg character.
+	(m68k_scan_mask): Likewise.
+	* m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
+
+2007-07-02  Alan Modra  <amodra@bigpond.net.au>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+	* aclocal.m4: Regenerate.
+	* config.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+	* po/opcodes.pot: Regenerate.
+
+2007-06-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* aclocal.m4: Regenerated.
+	* Makefile.in: Likewise.
+
+2007-06-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-reg.tbl: Remove spaces before comments.
+
+2007-06-29  M R Swami Reddy  <MR.Swami.Reddy@nsc.com>
+
+	* cr16-opc.c: New file.
+	* cr16-dis.c: New file.
+	* Makefile.am: Entries for cr16.
+	* Makefile.in: Regenerate.
+	* cofigure.in: Add cr16 target information.
+	* configure  : Regenerate.
+	* disassemble.c: Add cr16 target information.
+
+2007-06-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
+	(CFILES): Add i386-gen.c.
+	(i386-gen): New rule.
+	(i386-gen.o): Likewise.
+	(i386-tbl.h): Likewise.
+	Run "make dep-am".
+	* Makefile.in: Regenerated.
+
+	* i386-gen.c: New file.
+	* i386-opc.tbl: Likewise.
+	* i386-reg.tbl: Likewise.
+	* i386-tbl.h: Likewise.
+
+	* i386-opc.c: Include "i386-tbl.h".
+	(i386_optab): Removed.
+	(i386_regtab): Likewise.
+	(i386_regtab_size): Likewise.
+
+2007-06-26  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
+
+2007-06-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.h (regKludge): Renamed to ...
+	(RegKludge): This.
+
+	* i386-opc.c (i386_optab): Replace regKludge with RegKludge.
+
+2007-06-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4667
+	* i386-dis.c (EX): Removed.
+	(EMd): New.
+	(EMq): Likewise.
+	(EXd): Likewise.
+	(EXq): Likewise.
+	(EXx): Likewise.
+	(PREGRP93...PREGRP97): Likewise.
+	(dis386_twobyte): Updated.
+	(prefix_user_table): Updated. Add PREGRP93...PREGRP97.
+	(OP_EX): Remove Intel syntax handling.
+
+2007-06-18  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-opc.c (m68k_opcodes): Add wdebugl variants.
+
+2007-06-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
+
+	* acinclude.m4: Removed.
+
+	* Makefile.in: Regenerated.
+	* doc/Makefile.in: Likewise.
+	* aclocal.m4: Likewise.
+	* configure: Likewise.
+
+2007-06-05  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
+
+2007-05-24  Steve Ellcey  <sje@cup.hp.com>
+
+	* Makefile.in: Regnerate.
+	* configure: Regenerate.
+	* aclocal.m4: Regenerate.
+
+2007-05-18  Alan Modra  <amodra@bigpond.net.au>
+
+	* ppc-dis.c (print_insn_powerpc): Don't skip all operands
+	after setting skip_optional.
+
+2007-05-16  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-dis.c (operand_value_powerpc, skip_optional_operands): New.
+	(print_insn_powerpc): Use the new operand_value_powerpc and
+	skip_optional_operands functions to omit or print all optional
+	operands as a group.
+	* ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
+	(XFL_MASK): Delete L and W bits from the mask.
+	(mtfsfi, mtfsfi.): Replace use of BF with BFF.  Relpace use of XRA_MASK
+	with XWRA_MASK.  Use W.
+	(mtfsf, mtfsf.): Use XFL_L and W.
+
+2007-05-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4502
+	* i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
+
+2007-05-10  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.h (ShortForm): Redefined.
+	(Jump): Likewise.
+	(JumpDword): Likewise.
+	(JumpByte): Likewise.
+	(JumpInterSegment): Likewise.
+	(FloatMF): Likewise.
+	(FloatR): Likewise.
+	(FloatD): Likewise.
+	(Size16): Likewise.
+	(Size32): Likewise.
+	(Size64): Likewise.
+	(IgnoreSize): Likewise.
+	(DefaultSize): Likewise.
+	(No_bSuf): Likewise.
+	(No_wSuf): Likewise.
+	(No_lSuf): Likewise.
+	(No_sSuf): Likewise.
+	(No_qSuf): Likewise.
+	(No_xSuf): Likewise.
+	(FWait): Likewise.
+	(IsString): Likewise.
+	(regKludge): Likewise.
+	(IsPrefix): Likewise.
+	(ImmExt): Likewise.
+	(NoRex64): Likewise.
+	(Rex64): Likewise.
+	(Ugh): Likewise.
+
+2007-05-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
+	for some SSE4 instructions.
+	(threebyte_0x3a_uses_DATA_prefix): Likewise.
+
+2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
+
+	* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
+	type for crc32.
+
+2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
+	check data size prefix in 16bit mode.
+
+	* i386-opc.c (i386_optab): Default crc32 to non-8bit and
+	support Intel mode.
+
+2007-04-30  Mark Salter  <msalter@redhat.com>
+
+	* frv-desc.c: Regenerate.
+	* frv-desc.h: Regenerate.
+
+2007-04-30  Alan Modra  <amodra@bigpond.net.au>
+
+	PR 4436
+	* ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
+
+2007-04-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (modrm): Put reg before rm.
+
+2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4430
+	* i386-dis.c (print_displacement): New.
+	(OP_E): Call print_displacement instead of print_operand_value
+	to output displacement when either base or index exist.  Print
+	the explicit zero displacement in 16bit mode.
+
+2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4429
+	* i386-dis.c (print_insn): Also swap the order of op_riprel
+	when swapping op_index.  Break when the RIP relative address
+	is printed.
+	(OP_E): Properly handle RIP relative addressing and print the
+	explicit zero displacement for Intel mode.
+
+2007-04-27  Alan Modra  <amodra@bigpond.net.au>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+	* ns32k-dis.c: Include sysdep.h first.
+
+2007-04-24  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
+	opcode.
+	* opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions.
+
+2007-04-24  Nick Clifton  <nickc@redhat.com>
+
+	* arm-dis.c (print_insn): Initialise type.
+
+2007-04-24  Alan Modra  <amodra@bigpond.net.au>
+
+	* cgen-types.h: Include bfd_stdint.h, not stdint.h.
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+
+2007-04-23  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-opc.c: Mark mcfisa_c instructions.
+
+2007-04-21  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm-dis.c (arm_opcodes): Disassemble to unified syntax.
+	(thumb_opcodes): Add missing white space in adr.
+	(arm_decode_shift): New parameter, print_shift.  Only decode the
+	shift parameter if set.  Adjust callers.
+	(print_insn_arm): Support for operand type q with no shift decode.
+
+2007-04-21  Alan Modra  <amodra@bigpond.net.au>
+
+	* i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
+	Move contents to..
+	(i386_regtab): ..here.
+	* i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
+
+	* ppc-opc.c (powerpc_operands): Delete duplicate entries.
+	(BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
+	(VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
+	(powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
+
+2007-04-20  Nathan Sidwell  <nathan@codesourcery.com>
+
+	* m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
+	rambar1.
+
+2007-04-20  Alan Modra  <amodra@bigpond.net.au>
+
+	* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
+	change.
+	* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
+	in all entries.  Add PPC_OPERAND_SIGNED to DE entry.  Remove
+	references to following deleted functions.
+	(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
+	(insert_ds, extract_ds, insert_de, extract_de): Delete.
+	(insert_des, extract_des, insert_li, extract_li): Delete.
+	(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
+	(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
+	(num_powerpc_operands): New constant.
+	(XSPRG_MASK): Remove entire SPRG field.
+	(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
+
+2007-04-20  Alan Modra  <amodra@bigpond.net.au>
+
+	* ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift.
+	(Z2_MASK): Define.
+	(powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
+
+2007-04-20  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm-dis.c (print_insn): Only look for a mapping symbol in the section
+	being disassembled.
+
+2007-04-19  Alan Modra  <amodra@bigpond.net.au>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
+2007-04-19  Alan Modra  <amodra@bigpond.net.au>
+
+	* ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc,
+	db10cyc, db12cyc, db16cyc.
+
+2007-04-19  Nathan Froyd <froydnj@codesourcery.com>
+
+	* ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe.
+
+2007-04-18  H.J. Lu <hongjiu.lu@intel.com>
+
+	* i386-dis.c (CRC32_Fixup): New.
+	(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
+	 PREGRP91): New.
+	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
+	(threebyte_0x3a_uses_DATA_prefix): Likewise.
+	(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
+	PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
+	(three_byte_table): Likewise.
+
+	* i386-opc.c (i386_optab): Add SSE4.2 opcodes.
+
+	* i386-opc.h (CpuSSE4_2): New.
+	(CpuSSE4): Likewise.
+	(CpuUnknownFlags): Add CpuSSE4_2.
+
+2007-04-18  H.J. Lu <hongjiu.lu@intel.com>
+
+	* i386-dis.c (XMM_Fixup): New.
+	(Edqb): New.
+	(Edqd): New.
+	(XMM0): New.
+	(dqb_mode): New.
+	(dqd_mode): New.
+	(PREGRP39 ... PREGRP85): New.
+	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
+	(threebyte_0x3a_uses_DATA_prefix): Likewise.
+	(prefix_user_table): Add PREGRP39 ... PREGRP85.
+	(three_byte_table): Likewise.
+	(putop): Handle 'K'.
+	(intel_operand_size): Handle dqb_mode, dqd_mode):
+	(OP_E): Likewise.
+	(OP_G): Likewise.
+
+	* i386-opc.c (i386_optab): Add SSE4.1 opcodes.
+
+	* i386-opc.h (CpuSSE4_1): New.
+	(CpuUnknownFlags): Add CpuSSE4_1.
+	(regKludge): Update comment.
+
+2007-04-18  Matthias Klose  <doko@ubuntu.com>
+
+	* Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion.
+	* Makefile.in: Regenerate.
+
+2007-04-14  Steve Ellcey  <sje@cup.hp.com>
+
+	* Makefile.am: Add ACLOCAL_AMFLAGS.
+	* Makefile.in: Regenerate.
+
+2007-04-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c: Remove trailing white spaces.
+	* i386-opc.c: Likewise.
+	* i386-opc.h: Likewise.
+
+2007-04-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4333
+	* i386-dis.c (GRP1a): New.
+	(GRP1b ... GRPPADLCK2): Update index.
+	(dis386): Use GRP1a for entry 0x8f.
+	(mod, rm, reg): Removed. Replaced by ...
+	(modrm): This.
+	(grps): Add GRP1a.
+
+2007-04-09  Kazu Hirata  <kazu@codesourcery.com>
+
+	* m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and
+	info->print_address_func if longjmp is called.
+
+2007-03-29  DJ Delorie  <dj@redhat.com>
+
+	* m32c-desc.c: Regenerate.
+	* m32c-dis.c: Regenerate.
+	* m32c-opc.c: Regenerate.
+
+2007-03-28  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
+	movq.  Remove InvMem from sldt, smsw and str.
+
+	* i386-opc.h (InvMem): Renamed to ...
+	(RegMem): Update comments.
+	(AnyMem): Remove InvMem.
+
+2007-03-27  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
+
+2007-03-24  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
+	(print_insn_coprocessor): Handle %<bitfield>x.
+
+2007-03-24  Paul Brook  <paul@codesourcery.com>
+	    Mark Shinwell  <shinwell@codesourcery.com>
+
+	* arm-dis.c (arm_opcodes): Print SRS base register.
+
+2007-03-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
+
+	* i386-opc.c (i386_optab): Add rex.wrxb.
+
+2007-03-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (REX_MODE64): Remove definition.
+	(REX_EXTX): Likewise.
+	(REX_EXTY): Likewise.
+	(REX_EXTZ): Likewise.
+	(USED_REX): Use REX_OPCODE instead of 0x40.
+	Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
+	REX_R, REX_X and REX_B respectively.
+
+2007-03-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/4218
+	* i386-dis.c (PREGRP38): New.
+	(dis386): Use PREGRP38 for 0x90.
+	(prefix_user_table): Add PREGRP38.
+	(print_insn): Set uses_REPZ_prefix to 1 for pause.
+	(NOP_Fixup1): Properly handle REX bits.
+	(NOP_Fixup2): Likewise.
+
+	* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
+	Allow register with nop.
+
+2007-03-20  DJ Delorie  <dj@redhat.com>
+
+	* m32c-asm.c: Regenerate.
+	* m32c-desc.c: Regenerate.
+	* m32c-desc.h: Regenerate.
+	* m32c-dis.h: Regenerate.
+	* m32c-ibld.c: Regenerate.
+	* m32c-opc.c: Regenerate.
+	* m32c-opc.h: Regenerate.
+
+2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-opc.c: Include "libiberty.h".
+	(i386_regtab): Remove the last entry.
+	(i386_regtab_size): New.
+	(i386_float_regtab_size): Likewise.
+
+	* i386-opc.h (i386_regtab_size): New.
+	(i386_float_regtab_size): Likewise.
+
+2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.am (CFILES): Add i386-opc.c.
+	(ALL_MACHINES): Add i386-opc.lo.
+	Run "make dep-am".
+	* Makefile.in: Regenerated.
+
+	* configure.in: Add i386-opc.lo for bfd_i386_arch.
+	* configure: Regenerated.
+
+	* i386-dis.c: Include "opcode/i386.h".
+	(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
+	(FWAIT_OPCODE): Remove definition.
+	(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
+	(MAX_OPERANDS): Remove definition.
+
+	* i386-opc.c: New file.
+	* i386-opc.h: Likewise.
+
+2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in: Regenerated.
+
+2007-03-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_Rd): Renamed to ...
+	(OP_R): This.
+	(Rd): Updated.
+	(Rm): Likewise.
+
+2007-03-08  Alan Modra  <amodra@bigpond.net.au>
+
+	* fr30-asm.c: Regenerate.
+	* frv-asm.c: Regenerate.
+	* ip2k-asm.c: Regenerate.
+	* iq2000-asm.c: Regenerate.
+	* m32c-asm.c: Regenerate.
+	* m32r-asm.c: Regenerate.
+	* m32r-dis.c: Regenerate.
+	* mt-asm.c: Regenerate.
+	* mt-ibld.c: Regenerate.
+	* mt-opc.c: Regenerate.
+	* openrisc-asm.c: Regenerate.
+	* xc16x-asm.c: Regenerate.
+	* xstormy16-asm.c: Regenerate.
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
+2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
+	INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU,	INSTR_RRR_F0FF): New
+	instruction formats added.
+	(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
+	MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
+	masks added.
+	* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
+	instructions added.
+	* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
+	(main): z9-ec cpu type option added.
+	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
+
+2007-02-22  DJ Delorie  <dj@redhat.com>
+
+	* s390-opc.c (INSTR_SS_L2RDRD): New.
+	(MASK_SS_L2RDRD): New.
+	* s390-opc.txt (pka): Use it.
+
+2007-02-20  Thiemo Seufer  <ths@mips.com>
+            Chao-Ying Fu  <fu@mips.com>
+
+	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
+	(print_insn_args): Add support for balign instruction.
+	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
+	(mips_builtin_opcodes): Add DSP R2 instructions.
+
+2007-02-19  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
+	(INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
+	* s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
+	cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.
+
+2007-02-19  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type.
+	* s390-opc.c (s390_operands): Add RO_28 as optional gpr.
+	(INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc
+	and sfpc.
+
+2007-02-16  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/4045
+	* avr-dis.c (comment_start): New variable, contains the prefix to
+	use when printing addresses in comments.
+	(print_insn_avr): Set comment_start to an empty space if there is
+	no symbol table available as the generic address printing code
+	will prefix the numeric value of the address with 0x.
+
+2007-02-13  H.J. Lu  <hongjiu.lu@intel.com>
+
+	 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands
+	 in struct dis386.
+
+2007-02-05  Dave Brolley  <brolley@redhat.com>
+	    Richard Sandiford  <rsandifo@redhat.com>
+	    DJ Delorie  <dj@redhat.com>
+	    Graydon Hoare  <graydon@redhat.com>
+	    Frank Ch. Eigler  <fche@redhat.com>
+	    Ben Elliston  <bje@redhat.com>
+
+	* Makefile.am (HFILES): Add mep-desc.h mep-opc.h.
+	(CFILES): Add mep-*.c
+	(ALL_MACHINES): Add mep-*.lo.
+	(CLEANFILES): Add stamp-mep.
+	(CGEN_CPUS): Add mep.
+	(MEP_DEPS): New variable.
+	(mep-*): New targets.
+	* configure.in: Handle bfd_mep_arch.
+	* disassemble.c (ARCH_mep): New macro.
+	(disassembler): Handle bfd_arch_mep.
+	(disassemble_init_for_target): Likewise.
+	* mep-*: New files for Toshiba Media Processor (MeP).
+	* Makefile.in: Regenerated.
+	* configure: Regenerated.
+
+2007-02-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_J): Undo the last change. Properly handle 64K
+	wrap around within the same segment in 16bit mode.
+
+2007-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-dis.c (OP_J): Mask to 16bit only if there is a data16
+	prefix.
+
+2007-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* avr-dis.c (avr_operand): Correct PR number in comment.
+
+2007-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* disassemble.c (disassembler_usage): Call
+	print_i386_disassembler_options for i386 disassembler.
+
+	* i386-dis.c (print_i386_disassembler_options): New.
+	(print_insn): Support the new addr64 option.
+
+2007-02-02  Hiroki Kaminaga  <kaminaga@sm.sony.co.jp>
+
+	* ppc-dis.c (powerpc_dialect): Handle ppc440.
+	* ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can
+	be used.
+
+2007-02-02  Alan Modra  <amodra@bigpond.net.au>
+
+	* ppc-opc.c (insert_bdm): -Many comment.
+	(valid_bo): Add "extract" param.  Accept both powerpc and power4
+	BO fields when disassembling with -Many.
+	(insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
+
+2007-01-08  Kazu Hirata  <kazu@codesourcery.com>
+
+	* m68k-opc.c (m68k_opcodes): Replace cpu32 with
+	cpu32 | fido_a except on tbl instructions.
+
+2007-01-04  Paul Brook  <paul@codesourcery.com>
+
+	* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
+
+2007-01-04  Andreas Schwab  <schwab@suse.de>
+
+	* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
+
+2007-01-04  Julian Brown  <julian@codesourcery.com>
+
+	* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
+	vqrshl instructions.
+
+For older changes see ChangeLog-2006
+
+Copyright (C) 2007 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
+
+Local Variables:
+mode: change-log
+left-margin: 8
+fill-column: 74
+version-control: never
+End: