From e83aff58bf1b7e6b355a0cfa206e9d3aebe5623f Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 4 Jan 2008 18:30:24 +0100 Subject: [ARM] 4739/1: at91sam9263: make gpio bank C and D irqs work On the at91sam9263, IRQs for GPIO banks C and D don't currently work. This is because banks C, D, and E share one clock and toplevel IRQ, but the AT91 code setting up and handling GPIO IRQs expects no sharing. This patch: - Fixes GPIO IRQ setup and handling to cope with GPIO banks that are shared like on sam9263 chips, by setting up a list of those banks and making the IRQ dispatching logic scan that list. - Precomputes the address of each bank's registers, saving it with other per-bank data so that it no longer needs to be constantly recomputed during IRQs and other GPIO operations. That shrinks hot-path code, while helping the GPIO bank irq updates. - Fixes a minor bug where IRQ_TYPE_NONE was wrongly rejected (it just means "use the default", which is "both edges" here). Signed-off-by: David Brownell Acked-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/generic.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-at91/generic.h') diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index b5daf7f5e01..7b9ce7a336b 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -47,6 +47,9 @@ extern void at91_irq_resume(void); #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ struct at91_gpio_bank { + unsigned chipbase; /* bank's first GPIO number */ + void __iomem *regbase; /* base of register bank */ + struct at91_gpio_bank *next; /* bank sharing same IRQ/clock/... */ unsigned short id; /* peripheral ID */ unsigned long offset; /* offset from system peripheral base */ struct clk *clock; /* associated clock */ -- cgit v1.2.3