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* ARM: S5PC1XX: add cpu idle and system reset supportKyungmin Park2009-12-011-0/+84
| | | | | | | | | Add CPU idle support by a call to SoC build-in power management core. Add system reset support by a simple write to system controll register. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC1xx: add gpiolib and external/gpio interrupt supportKyungmin Park2009-12-014-3/+158
| | | | | | | | | | | Add support for gpiolib calls. This is based on the gpiolib implementation from plat-s3c64xx tree. Add support for external interrupts for GPIO H banks. Add support for GPIO interrupts for all banks. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC1XX: clocks reimplementationKyungmin Park2009-12-011-3/+2
| | | | | | | | | Clocks hierarchy has been completely reimplemented to match the S5PC100 specification. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC1XX: clock registers renameKyungmin Park2009-12-011-137/+75
| | | | | | | | | | S5PC100 and S5PC110 clock registers differs in many places, rename all previously defined registers to be S5PC100 specific. Remove all power management registers. They will be added later to a separate file. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: Clock and PLL supportByungho Min2009-08-162-0/+459
| | | | | | | | | S5PC100 has 4 PLLs (APLL,MPLL,EPLL,HPLL) and 3 clock domains. Clock scheme is implemented here. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: edited title] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: IRQ and timerByungho Min2009-08-161-0/+182
| | | | | | | | | | S5PC100 has 3 VICs(Vectored Interrupt Controller). The VICs come from S3C64xx series, so the driver source code can be shared with S3C families. The S5PC100 has 3 VICs while S3C64xx has only 2. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S5PC100: CPU initializationByungho Min2009-08-161-0/+65
Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: subject fixup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>