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-rw-r--r--include/asm-sh/bugs.h4
-rw-r--r--include/asm-sh/cpu-sh3/freq.h4
-rw-r--r--include/asm-sh/cpu-sh3/mmu_context.h1
-rw-r--r--include/asm-sh/cpu-sh3/timer.h3
-rw-r--r--include/asm-sh/cpu-sh4/freq.h2
-rw-r--r--include/asm-sh/dma-mapping.h8
-rw-r--r--include/asm-sh/dma.h1
-rw-r--r--include/asm-sh/fixmap.h8
-rw-r--r--include/asm-sh/floppy.h4
-rw-r--r--include/asm-sh/io.h4
-rw-r--r--include/asm-sh/pgtable.h6
-rw-r--r--include/asm-sh/processor.h4
-rw-r--r--include/asm-sh/se7300.h64
-rw-r--r--include/asm-sh/se73180.h66
-rw-r--r--include/asm-sh/ubc.h3
15 files changed, 20 insertions, 162 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index aeee8da9c54..b66139ff73f 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -29,7 +29,7 @@ static void __init check_bugs(void)
*p++ = '2';
*p++ = 'a';
break;
- case CPU_SH7705 ... CPU_SH7300:
+ case CPU_SH7705 ... CPU_SH7729:
*p++ = '3';
break;
case CPU_SH7750 ... CPU_SH4_501:
@@ -39,7 +39,7 @@ static void __init check_bugs(void)
*p++ = '4';
*p++ = 'a';
break;
- case CPU_SH73180 ... CPU_SH7722:
+ case CPU_SH7343 ... CPU_SH7722:
*p++ = '4';
*p++ = 'a';
*p++ = 'l';
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index 273f3229785..0a054b53b9d 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -10,11 +10,7 @@
#ifndef __ASM_CPU_SH3_FREQ_H
#define __ASM_CPU_SH3_FREQ_H
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
-#define FRQCR 0xa415ff80
-#else
#define FRQCR 0xffffff80
-#endif
#define MIN_DIVISOR_NR 0
#define MAX_DIVISOR_NR 4
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index 4704e86dff5..b20786d42d0 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -30,7 +30,6 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7712) || \
defined(CONFIG_CPU_SUBTYPE_SH7710)
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 4928b08f9d1..b6c2020a2ad 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -19,7 +19,6 @@
* SH7729R
* SH7710
* SH7720
- * SH7300
* SH7710
* ---------------------------------------------------------------------------
*/
@@ -28,7 +27,7 @@
#define TMU_TOCR 0xfffffe90 /* Byte access */
#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
+#if defined(CONFIG_CPU_SUBTYPE_SH7710)
#define TMU_012_TSTR 0xa412fe92 /* Byte access */
#define TMU0_TCOR 0xa412fe94 /* Long access */
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index 026025b51ce..dc1d32a8637 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,7 +10,7 @@
#ifndef __ASM_CPU_SH4_FREQ_H
#define __ASM_CPU_SH4_FREQ_H
-#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722)
+#if defined(CONFIG_CPU_SUBTYPE_SH7722)
#define FRQCR 0xa4150000
#define VCLKCR 0xa4150004
#define SCLKACR 0xa4150008
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index d3bc7818bbb..6f492ac3fa1 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -69,11 +69,11 @@ static inline dma_addr_t dma_map_single(struct device *dev,
{
#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
if (dev->bus == &pci_bus_type)
- return virt_to_bus(ptr);
+ return virt_to_phys(ptr);
#endif
dma_cache_sync(dev, ptr, size, dir);
- return virt_to_bus(ptr);
+ return virt_to_phys(ptr);
}
#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
@@ -116,7 +116,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
if (dev->bus == &pci_bus_type)
return;
#endif
- dma_cache_sync(dev, bus_to_virt(dma_handle), size, dir);
+ dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
}
static inline void dma_sync_single_range(struct device *dev,
@@ -128,7 +128,7 @@ static inline void dma_sync_single_range(struct device *dev,
if (dev->bus == &pci_bus_type)
return;
#endif
- dma_cache_sync(dev, bus_to_virt(dma_handle) + offset, size, dir);
+ dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
}
static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index 6034d4a29e7..4c75b70b641 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -111,6 +111,7 @@ struct dma_info {
struct list_head list;
int first_channel_nr;
+ int first_vchannel_nr;
};
struct dma_chan_caps {
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
index 458e9fa5954..8a566177ad9 100644
--- a/include/asm-sh/fixmap.h
+++ b/include/asm-sh/fixmap.h
@@ -46,6 +46,9 @@
* fix-mapped?
*/
enum fixed_addresses {
+#define FIX_N_COLOURS 16
+ FIX_CMAP_BEGIN,
+ FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
#ifdef CONFIG_HIGHMEM
FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
@@ -53,8 +56,8 @@ enum fixed_addresses {
__end_of_fixed_addresses
};
-extern void __set_fixmap (enum fixed_addresses idx,
- unsigned long phys, pgprot_t flags);
+extern void __set_fixmap(enum fixed_addresses idx,
+ unsigned long phys, pgprot_t flags);
#define set_fixmap(idx, phys) \
__set_fixmap(idx, phys, PAGE_KERNEL)
@@ -106,5 +109,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
return __virt_to_fix(vaddr);
}
-
#endif
diff --git a/include/asm-sh/floppy.h b/include/asm-sh/floppy.h
index dc1ad464fa3..3b59b3af777 100644
--- a/include/asm-sh/floppy.h
+++ b/include/asm-sh/floppy.h
@@ -181,7 +181,7 @@ static void _fd_chose_dma_mode(char *addr, unsigned long size)
{
if(can_use_virtual_dma == 2) {
if((unsigned int) addr >= (unsigned int) high_memory ||
- virt_to_bus(addr) >= 0x10000000)
+ virt_to_phys(addr) >= 0x10000000)
use_virtual_dma = 1;
else
use_virtual_dma = 0;
@@ -219,7 +219,7 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
doing_pdma = 0;
clear_dma_ff(FLOPPY_DMA);
set_dma_mode(FLOPPY_DMA,mode);
- set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
+ set_dma_addr(FLOPPY_DMA,virt_to_phys(addr));
set_dma_count(FLOPPY_DMA,size);
enable_dma(FLOPPY_DMA);
return 0;
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index aa80930ce8e..e6a1877dcb2 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -241,10 +241,6 @@ static inline void *phys_to_virt(unsigned long address)
#define virt_to_phys(address) ((unsigned long)(address))
#endif
-#define virt_to_bus virt_to_phys
-#define bus_to_virt phys_to_virt
-#define page_to_bus page_to_phys
-
/*
* readX/writeX() are used to access memory mapped devices. On some
* architectures the memory mapped IO stuff needs to be accessed
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 22efffe4501..e3fae12c0e4 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -55,11 +55,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE)
-/*
- * First 1MB map is used by fixed purpose.
- * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
- */
-#define VMALLOC_START (P3SEG+0x00100000)
+#define VMALLOC_START (P3SEG)
#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
/*
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 2252e75daa2..26d52174f4b 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -45,7 +45,7 @@ enum cpu_type {
CPU_SH7705, CPU_SH7706, CPU_SH7707,
CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
- CPU_SH7729, CPU_SH7300,
+ CPU_SH7729,
/* SH-4 types */
CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
@@ -55,7 +55,7 @@ enum cpu_type {
CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
/* SH4AL-DSP types */
- CPU_SH73180, CPU_SH7343, CPU_SH7722,
+ CPU_SH7343, CPU_SH7722,
/* Unknown subtype */
CPU_SH_NONE
diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h
deleted file mode 100644
index 4e24edccb30..00000000000
--- a/include/asm-sh/se7300.h
+++ /dev/null
@@ -1,64 +0,0 @@
-#ifndef __ASM_SH_HITACHI_SE7300_H
-#define __ASM_SH_HITACHI_SE7300_H
-
-/*
- * linux/include/asm-sh/se/se7300.h
- *
- * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
- *
- * SH-Mobile SolutionEngine 7300 support
- */
-
-/* Box specific addresses. */
-
-/* Area 0 */
-#define PA_ROM 0x00000000 /* EPROM */
-#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
-#define PA_FROM 0x00400000 /* Flash ROM */
-#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
-#define PA_SRAM 0x00800000 /* SRAM */
-#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
-/* Area 1 */
-#define PA_EXT1 0x04000000
-#define PA_EXT1_SIZE 0x04000000
-/* Area 2 */
-#define PA_EXT2 0x08000000
-#define PA_EXT2_SIZE 0x04000000
-/* Area 3 */
-#define PA_SDRAM 0x0c000000
-#define PA_SDRAM_SIZE 0x04000000
-/* Area 4 */
-#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
-#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
-#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
-#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
-#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
-#define MRSHPC_OPTION (PA_MRSHPC + 6)
-#define MRSHPC_CSR (PA_MRSHPC + 8)
-#define MRSHPC_ISR (PA_MRSHPC + 10)
-#define MRSHPC_ICR (PA_MRSHPC + 12)
-#define MRSHPC_CPWCR (PA_MRSHPC + 14)
-#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
-#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
-#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
-#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
-#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
-#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
-#define MRSHPC_CDCR (PA_MRSHPC + 28)
-#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
-#define PA_LED 0xb0800000 /* LED */
-#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
-#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
-#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
-#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
-/* Area 5 */
-#define PA_EXT5 0x14000000
-#define PA_EXT5_SIZE 0x04000000
-/* Area 6 */
-#define PA_LCD1 0xb8000000
-#define PA_LCD2 0xb8800000
-
-#define __IO_PREFIX sh7300se
-#include <asm/io_generic.h>
-
-#endif /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h
deleted file mode 100644
index 907c062b4c9..00000000000
--- a/include/asm-sh/se73180.h
+++ /dev/null
@@ -1,66 +0,0 @@
-#ifndef __ASM_SH_SE73180_H
-#define __ASM_SH_SE73180_H
-
-/*
- * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
- *
- * SH-Mobile SolutionEngine 73180 support
- */
-
-/* Box specific addresses. */
-
-/* Area 0 */
-#define PA_ROM 0x00000000 /* EPROM */
-#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
-#define PA_FROM 0x00400000 /* Flash ROM */
-#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
-#define PA_SRAM 0x00800000 /* SRAM */
-#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
-/* Area 1 */
-#define PA_EXT1 0x04000000
-#define PA_EXT1_SIZE 0x04000000
-/* Area 2 */
-#define PA_EXT2 0x08000000
-#define PA_EXT2_SIZE 0x04000000
-/* Area 3 */
-#define PA_SDRAM 0x0c000000
-#define PA_SDRAM_SIZE 0x04000000
-/* Area 4 */
-#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
-#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
-#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
-#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
-#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
-#define MRSHPC_OPTION (PA_MRSHPC + 6)
-#define MRSHPC_CSR (PA_MRSHPC + 8)
-#define MRSHPC_ISR (PA_MRSHPC + 10)
-#define MRSHPC_ICR (PA_MRSHPC + 12)
-#define MRSHPC_CPWCR (PA_MRSHPC + 14)
-#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
-#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
-#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
-#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
-#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
-#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
-#define MRSHPC_CDCR (PA_MRSHPC + 28)
-#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
-#define PA_LED 0xb0C00000 /* LED */
-#define LED_SHIFT 0
-#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
-#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
-#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
-#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
-/* Area 5 */
-#define PA_EXT5 0x14000000
-#define PA_EXT5_SIZE 0x04000000
-/* Area 6 */
-#define PA_LCD1 0xb8000000
-#define PA_LCD2 0xb8800000
-
-#define __IO_PREFIX sh73180se
-#include <asm/io_generic.h>
-
-/* arch/sh/boards/se/73180/irq.c */
-int shmse_irq_demux(int irq);
-
-#endif /* __ASM_SH_SE73180_H */
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 38d46e01b84..56f4e30dc49 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -15,8 +15,7 @@
#include <asm/cpu/ubc.h>
/* User Break Controller */
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
- defined(CONFIG_CPU_SUBTYPE_SH7300)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
#else
#define UBC_TYPE_SH7729 0
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 13:53:13 +0000