diff options
Diffstat (limited to 'arch/powerpc/kernel')
| -rw-r--r-- | arch/powerpc/kernel/cpu_setup_44x.S | 1 | ||||
| -rw-r--r-- | arch/powerpc/kernel/cputable.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/kernel/misc_32.S | 5 |
3 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index 31c18b52aff..10b4ab1008a 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S @@ -40,6 +40,7 @@ _GLOBAL(__setup_cpu_460gt) mtlr r4 blr +_GLOBAL(__setup_cpu_440x5) _GLOBAL(__setup_cpu_440gx) _GLOBAL(__setup_cpu_440spe) b __fixup_440A_mcheck diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index b1eb834bc0f..7e8719504f3 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -39,6 +39,7 @@ extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); +extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); @@ -1500,6 +1501,8 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_user_features = COMMON_USER_BOOKE, .icache_bsize = 32, .dcache_bsize = 32, + .cpu_setup = __setup_cpu_440x5, + .machine_check = machine_check_440A, .platform = "ppc440", }, { /* 460EX */ diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index bdc8b0e860e..5c33bc14bd9 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S @@ -479,17 +479,20 @@ _GLOBAL(_tlbil_pid) * (no broadcast) */ _GLOBAL(_tlbil_va) + mfmsr r10 + wrteei 0 slwi r4,r4,16 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ tlbsx 0,r3 mfspr r4,SPRN_MAS1 /* check valid */ andis. r3,r4,MAS1_VALID@h - beqlr + beq 1f rlwinm r4,r4,0,1,31 mtspr SPRN_MAS1,r4 tlbwe msync isync +1: wrtee r10 blr #endif /* CONFIG_FSL_BOOKE */ |