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author | Chris Zankel <czankel@tensilica.com> | 2005-06-23 22:01:26 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-24 00:05:22 -0700 |
commit | 9a8fd5589902153a134111ed7a40f9cca1f83254 (patch) | |
tree | 6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6 /include/asm-xtensa/shmparam.h | |
parent | 3f65ce4d141e435e54c20ed2379d983d362a2cb5 (diff) | |
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[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/shmparam.h')
-rw-r--r-- | include/asm-xtensa/shmparam.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/asm-xtensa/shmparam.h b/include/asm-xtensa/shmparam.h new file mode 100644 index 00000000000..d3b65bfa71c --- /dev/null +++ b/include/asm-xtensa/shmparam.h @@ -0,0 +1,23 @@ +/* + * include/asm-xtensa/shmparam.h + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of + * this archive for more details. + */ + +#ifndef _XTENSA_SHMPARAM_H +#define _XTENSA_SHMPARAM_H + +#include <asm/processor.h> + +/* + * Xtensa can have variable size caches, and if + * the size of single way is larger than the page size, + * then we have to start worrying about cache aliasing + * problems. + */ + +#define SHMLBA ((PAGE_SIZE > DCACHE_WAY_SIZE)? PAGE_SIZE : DCACHE_WAY_SIZE) + +#endif /* _XTENSA_SHMPARAM_H */ |