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| author | Jerome Glisse <jglisse@redhat.com> | 2011-08-24 20:00:17 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-10-03 11:40:02 -0700 |
| commit | 5297aef4dd2d5b7f17fe515a0a455bf969bb19a9 (patch) | |
| tree | fe4a8dc81bfbd93580f3df0c3c45ae1fd0f41113 /drivers/gpu | |
| parent | 795464a57a2a7c342ccdc0939647d45dabd24668 (diff) | |
| download | kernel_samsung_smdk4412-5297aef4dd2d5b7f17fe515a0a455bf969bb19a9.tar.gz kernel_samsung_smdk4412-5297aef4dd2d5b7f17fe515a0a455bf969bb19a9.tar.bz2 kernel_samsung_smdk4412-5297aef4dd2d5b7f17fe515a0a455bf969bb19a9.zip | |
drm/radeon/kms: evergreen & ni reset SPI block on CP resume
commit a49a50dad48586d42ebac1a6730c3a3cd5603421 upstream.
For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 15bd0477a3e..49f801b90d2 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev) SOFT_RESET_PA | SOFT_RESET_SH | SOFT_RESET_VGT | + SOFT_RESET_SPI | SOFT_RESET_SX)); RREG32(GRBM_SOFT_RESET); mdelay(15); diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 559dbd41290..aa6f87aca13 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -1158,6 +1158,7 @@ int cayman_cp_resume(struct radeon_device *rdev) SOFT_RESET_PA | SOFT_RESET_SH | SOFT_RESET_VGT | + SOFT_RESET_SPI | SOFT_RESET_SX)); RREG32(GRBM_SOFT_RESET); mdelay(15); |