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| author | Dave Airlie <airlied@redhat.com> | 2011-08-30 20:22:04 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-10-03 11:40:03 -0700 |
| commit | 34b64435133e6feea81571344077738cfd4f7ede (patch) | |
| tree | 0a5851a5d06847feba58f6670e91bcc3c529f757 /drivers/gpu | |
| parent | c122ead30dcdb8712ba3d49d478ae66ac33dfb7b (diff) | |
| download | kernel_samsung_smdk4412-34b64435133e6feea81571344077738cfd4f7ede.tar.gz kernel_samsung_smdk4412-34b64435133e6feea81571344077738cfd4f7ede.tar.bz2 kernel_samsung_smdk4412-34b64435133e6feea81571344077738cfd4f7ede.zip | |
drm/radeon/kms: set a default max_pixel_clock
commit 9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2 upstream.
On some Power rv100 cards, we have no ATY OF table, but we have
no combios table either, and hence we refuse all modes on VGA-0
since we end up with a 0 max pixel clock.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index 2d48e7a1474..b956cf1f9f9 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c @@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_device *dev) } else { DRM_INFO("Using generic clock info\n"); + /* may need to be per card */ + rdev->clock.max_pixel_clock = 35000; + if (rdev->flags & RADEON_IS_IGP) { p1pll->reference_freq = 1432; p2pll->reference_freq = 1432; |