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| author | Francisco Jerez <currojerez@riseup.net> | 2010-09-20 16:18:28 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-09-24 16:28:12 +1000 |
| commit | 0fbb114af7ea63227599460c412fb8796556a169 (patch) | |
| tree | 8f4df7e11ce6fac9b34e0d03a58ce8295a6ab994 /drivers/gpu/drm/nouveau/nouveau_perf.c | |
| parent | 038b8b2a0dd8a0760d086f0c90af656b242369e3 (diff) | |
| download | kernel_samsung_smdk4412-0fbb114af7ea63227599460c412fb8796556a169.tar.gz kernel_samsung_smdk4412-0fbb114af7ea63227599460c412fb8796556a169.tar.bz2 kernel_samsung_smdk4412-0fbb114af7ea63227599460c412fb8796556a169.zip | |
drm/nouveau: Parse old style perf tables.
Used on nv17-nv28, they contain memory clocks and timings, only one of
the table entries can actually be used, depending on the RAMCFG
straps, and it's usually higher than the frequency programmed on boot
by the BIOS.
The memory timings listed in table version 0x1x are used to init the
0x12xx range but they aren't required for reclocking to work.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_perf.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_perf.c | 47 |
1 files changed, 46 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c index a397420e46c..00f8243c6c7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_perf.c +++ b/drivers/gpu/drm/nouveau/nouveau_perf.c @@ -27,6 +27,51 @@ #include "nouveau_drv.h" #include "nouveau_pm.h" +static void +legacy_perf_init(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + struct nvbios *bios = &dev_priv->vbios; + struct nouveau_pm_engine *pm = &dev_priv->engine.pm; + char *perf, *entry, *bmp = &bios->data[bios->offset]; + int headerlen, use_straps; + + if (bmp[5] < 0x5 || bmp[6] < 0x14) { + NV_DEBUG(dev, "BMP version too old for perf\n"); + return; + } + + perf = ROMPTR(bios, bmp[0x73]); + if (!perf) { + NV_DEBUG(dev, "No memclock table pointer found.\n"); + return; + } + + switch (perf[0]) { + case 0x12: + case 0x14: + case 0x18: + use_straps = 0; + headerlen = 1; + break; + case 0x01: + use_straps = perf[1] & 1; + headerlen = (use_straps ? 8 : 2); + break; + default: + NV_WARN(dev, "Unknown memclock table version %x.\n", perf[0]); + return; + } + + entry = perf + headerlen; + if (use_straps) + entry += (nv_rd32(dev, NV_PEXTDEV_BOOT_0) & 0x3c) >> 1; + + sprintf(pm->perflvl[0].name, "performance_level_0"); + pm->perflvl[0].memory = ROM16(entry[0]) * 20; + pm->nr_perflvl = 1; +} + void nouveau_perf_init(struct drm_device *dev) { @@ -59,7 +104,7 @@ nouveau_perf_init(struct drm_device *dev) } } else { if (bios->data[bios->offset + 6] < 0x27) { - NV_DEBUG(dev, "BMP version too old for perf\n"); + legacy_perf_init(dev); return; } |