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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-12 16:25:35 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-12 16:25:35 -0800 |
commit | 9219a3b9889dbc7dae68e472f239672ff48860b0 (patch) | |
tree | c6446d63dd7ffb0f118804e354eee3d80041717e /arch/mips/mm/tlbex.c | |
parent | 23ead7291269db3be71b442324381c8d63e5d0b3 (diff) | |
parent | cde15b5927fea3e1b4de0b277008cf273d8b000b (diff) | |
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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (37 commits)
MIPS: Only write c0_framemask on CPUs which have this register.
MIPS: Alchemy: new userspace suspend interface for development boards.
MIPS: Alchemy: dbdma suspend/resume support.
MIPS: Alchemy: Fix up PM code on Au1550/Au1200
MIPS: Alchemy: move calc_clock function.
MIPS: Alchemy: RTC counter clocksource / clockevent support.
MIPS: make cp0 counter clocksource/event usable as fallback.
MIPS: Alchemy: remove cpu_table.
MIPS: Alchemy: remove get/set_au1x00_lcd_clock().
MIPS: Print irq handler description
MIPS: Alchemy: pb1200: update CPLD cascade irq handler.
MIPS: Alchemy: update core interrupt code.
MIPS: Alchemy: move commandline mangling out of common code
MIPS: Alchemy: devboards: consolidate files
MIPS: Alchemy: Move development board code to common subdirectory
MIPS: Add Cavium OCTEON to arch/mips/Kconfig
MIPS: Add defconfig for Cavium OCTEON.
MIPS: Adjust the dma-common.c platform hooks.
MIPS: Add Cavium OCTEON slot into proper tlb category.
MIPS: Compute branch returns for Cavium OCTEON specific branch instructions.
...
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r-- | arch/mips/mm/tlbex.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 979cf919728..42942038d0f 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -317,6 +317,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_BCM3302: case CPU_BCM4710: case CPU_LOONGSON2: + case CPU_CAVIUM_OCTEON: if (m4kc_tlbp_war()) uasm_i_nop(p); tlbw(p); |