From 7cd0b3084cb5e1ee69431d462eedc2e3e7eb8203 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Wed, 29 Jun 2016 18:00:22 -0700 Subject: nir/intrinsics: Add more atomic_counter ops v2: Delete some stray debug code notice by Iago. v3: Massive rebase on new ir_function_signature::intrinsic_id mechanism. Signed-off-by: Ian Romanick Reviewed-by: Iago Toral Quiroga [v1] Acked-by: Ilia Mirkin --- src/compiler/nir/nir_intrinsics.h | 14 +++++++++++++ src/compiler/nir/nir_lower_atomics.c | 38 ++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) (limited to 'src/compiler/nir') diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h index 1568c2857a..00bd294b91 100644 --- a/src/compiler/nir/nir_intrinsics.h +++ b/src/compiler/nir/nir_intrinsics.h @@ -141,10 +141,24 @@ INTRINSIC(set_vertex_count, 1, ARR(1), false, 0, 0, 0, xx, xx, xx, 0) #define ATOMIC(name, flags) \ INTRINSIC(name##_var, 0, ARR(0), true, 1, 1, 0, xx, xx, xx, flags) \ INTRINSIC(name, 1, ARR(1), true, 1, 0, 1, BASE, xx, xx, flags) +#define ATOMIC2(name) \ + INTRINSIC(name##_var, 1, ARR(1), true, 1, 1, 0, xx, xx, xx, 0) \ + INTRINSIC(name, 2, ARR(1, 1), true, 1, 0, 1, BASE, xx, xx, 0) +#define ATOMIC3(name) \ + INTRINSIC(name##_var, 2, ARR(1, 1), true, 1, 1, 0, xx, xx, xx, 0) \ + INTRINSIC(name, 3, ARR(1, 1, 1), true, 1, 0, 1, BASE, xx, xx, 0) ATOMIC(atomic_counter_inc, 0) ATOMIC(atomic_counter_dec, 0) ATOMIC(atomic_counter_read, NIR_INTRINSIC_CAN_ELIMINATE) +ATOMIC2(atomic_counter_add) +ATOMIC2(atomic_counter_min) +ATOMIC2(atomic_counter_max) +ATOMIC2(atomic_counter_and) +ATOMIC2(atomic_counter_or) +ATOMIC2(atomic_counter_xor) +ATOMIC2(atomic_counter_exchange) +ATOMIC3(atomic_counter_comp_swap) /* * Image load, store and atomic intrinsics. diff --git a/src/compiler/nir/nir_lower_atomics.c b/src/compiler/nir/nir_lower_atomics.c index 04e1febc17..583e2a50c7 100644 --- a/src/compiler/nir/nir_lower_atomics.c +++ b/src/compiler/nir/nir_lower_atomics.c @@ -54,6 +54,38 @@ lower_instr(nir_intrinsic_instr *instr, op = nir_intrinsic_atomic_counter_dec; break; + case nir_intrinsic_atomic_counter_add_var: + op = nir_intrinsic_atomic_counter_add; + break; + + case nir_intrinsic_atomic_counter_min_var: + op = nir_intrinsic_atomic_counter_min; + break; + + case nir_intrinsic_atomic_counter_max_var: + op = nir_intrinsic_atomic_counter_max; + break; + + case nir_intrinsic_atomic_counter_and_var: + op = nir_intrinsic_atomic_counter_and; + break; + + case nir_intrinsic_atomic_counter_or_var: + op = nir_intrinsic_atomic_counter_or; + break; + + case nir_intrinsic_atomic_counter_xor_var: + op = nir_intrinsic_atomic_counter_xor; + break; + + case nir_intrinsic_atomic_counter_exchange_var: + op = nir_intrinsic_atomic_counter_exchange; + break; + + case nir_intrinsic_atomic_counter_comp_swap_var: + op = nir_intrinsic_atomic_counter_comp_swap; + break; + default: return; } @@ -120,6 +152,12 @@ lower_instr(nir_intrinsic_instr *instr, new_instr->src[0].is_ssa = true; new_instr->src[0].ssa = offset_def; + /* Copy the other sources, if any, from the original instruction to the new + * instruction. + */ + for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++) + new_instr->src[i + 1] = instr->src[i]; + if (instr->dest.is_ssa) { nir_ssa_dest_init(&new_instr->instr, &new_instr->dest, instr->dest.ssa.num_components, 32, NULL); -- cgit v1.2.3