From 5ffe38ef6ae3427b39b2d866ab8d1a73f9f69e56 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 15 Nov 2010 04:16:32 +0000 Subject: Implement a basic MCCodeEmitter for PPC. This doesn't handle fixups yet, and doesn't handle actually encoding operand values, but this is enough for llc -show-mc-encoding to show the base instruction encoding information, e.g.: mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6] stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00] stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00] Ltmp0: lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00] cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00] beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCTargetMachine.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'lib/Target/PowerPC/PPCTargetMachine.cpp') diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 307f36087d..7946837e06 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -36,6 +36,10 @@ extern "C" void LLVMInitializePowerPCTarget() { RegisterAsmInfoFn C(ThePPC32Target, createMCAsmInfo); RegisterAsmInfoFn D(ThePPC64Target, createMCAsmInfo); + + // Register the MC Code Emitter + TargetRegistry::RegisterCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter); + TargetRegistry::RegisterCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter); } -- cgit v1.2.3