From 9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 30 Dec 2007 20:49:49 +0000 Subject: Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Alpha/AlphaLLRP.cpp | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'lib/Target/Alpha/AlphaLLRP.cpp') diff --git a/lib/Target/Alpha/AlphaLLRP.cpp b/lib/Target/Alpha/AlphaLLRP.cpp index 79d03c6645..15d12c7593 100644 --- a/lib/Target/Alpha/AlphaLLRP.cpp +++ b/lib/Target/Alpha/AlphaLLRP.cpp @@ -67,11 +67,9 @@ namespace { case Alpha::STW: case Alpha::STB: case Alpha::STT: case Alpha::STS: if (MI->getOperand(2).getReg() == Alpha::R30) { - if (prev[0] - && prev[0]->getOperand(2).getReg() == - MI->getOperand(2).getReg() - && prev[0]->getOperand(1).getImmedValue() == - MI->getOperand(1).getImmedValue()) { + if (prev[0] && + prev[0]->getOperand(2).getReg() == MI->getOperand(2).getReg()&& + prev[0]->getOperand(1).getImm() == MI->getOperand(1).getImm()){ prev[0] = prev[1]; prev[1] = prev[2]; prev[2] = 0; @@ -83,8 +81,8 @@ namespace { } else if (prev[1] && prev[1]->getOperand(2).getReg() == MI->getOperand(2).getReg() - && prev[1]->getOperand(1).getImmedValue() == - MI->getOperand(1).getImmedValue()) { + && prev[1]->getOperand(1).getImm() == + MI->getOperand(1).getImm()) { prev[0] = prev[2]; prev[1] = prev[2] = 0; BuildMI(MBB, MI, TII->get(Alpha::BISr), Alpha::R31) @@ -98,8 +96,8 @@ namespace { } else if (prev[2] && prev[2]->getOperand(2).getReg() == MI->getOperand(2).getReg() - && prev[2]->getOperand(1).getImmedValue() == - MI->getOperand(1).getImmedValue()) { + && prev[2]->getOperand(1).getImm() == + MI->getOperand(1).getImm()) { prev[0] = prev[1] = prev[2] = 0; BuildMI(MBB, MI, TII->get(Alpha::BISr), Alpha::R31).addReg(Alpha::R31) .addReg(Alpha::R31); -- cgit v1.2.3