From 3f4f34c7ba24c3703a0cddf778183f7d876ac83f Mon Sep 17 00:00:00 2001 From: Sean Callanan Date: Sat, 4 Feb 2012 07:45:35 +0000 Subject: Modified the Enhanced Disassembler to create and cache disassemblers according to the string value of the target triple, not according to the enum of the triple CPU. The reason for this is that certain attributes of the instruction set are not reflected in the enum, but only in the string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149773 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/MC/MCDisassembler/EDOperand.cpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'lib/MC/MCDisassembler/EDOperand.cpp') diff --git a/lib/MC/MCDisassembler/EDOperand.cpp b/lib/MC/MCDisassembler/EDOperand.cpp index 9aededb676..48b374659d 100644 --- a/lib/MC/MCDisassembler/EDOperand.cpp +++ b/lib/MC/MCDisassembler/EDOperand.cpp @@ -30,8 +30,10 @@ EDOperand::EDOperand(const EDDisassembler &disassembler, MCOpIndex(mcOpIndex) { unsigned int numMCOperands = 0; - if (Disassembler.Key.Arch == Triple::x86 || - Disassembler.Key.Arch == Triple::x86_64) { + Triple::ArchType arch = Disassembler.TgtTriple.getArch(); + + if (arch == Triple::x86 || + arch == Triple::x86_64) { uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; switch (operandType) { @@ -54,8 +56,8 @@ EDOperand::EDOperand(const EDDisassembler &disassembler, break; } } - else if (Disassembler.Key.Arch == Triple::arm || - Disassembler.Key.Arch == Triple::thumb) { + else if (arch == Triple::arm || + arch == Triple::thumb) { uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; switch (operandType) { @@ -126,7 +128,9 @@ int EDOperand::evaluate(uint64_t &result, void *arg) { uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex]; - switch (Disassembler.Key.Arch) { + Triple::ArchType arch = Disassembler.TgtTriple.getArch(); + + switch (arch) { default: return -1; case Triple::x86: @@ -168,7 +172,7 @@ int EDOperand::evaluate(uint64_t &result, unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg(); - if (segmentReg != 0 && Disassembler.Key.Arch == Triple::x86_64) { + if (segmentReg != 0 && arch == Triple::x86_64) { unsigned fsID = Disassembler.registerIDWithName("FS"); unsigned gsID = Disassembler.registerIDWithName("GS"); -- cgit v1.2.3