From ba36cb5242eb02b12b277f82b9efe497f7da4d7f Mon Sep 17 00:00:00 2001 From: Gabor Greif Date: Thu, 28 Aug 2008 21:40:38 +0000 Subject: erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 598 +++++++++++----------- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 262 +++++----- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 36 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 38 +- lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 85 +-- lib/CodeGen/SelectionDAG/LegalizeTypes.h | 11 +- lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 2 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 18 +- lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 20 +- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 12 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 180 +++---- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 60 +-- lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp | 6 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 72 +-- 14 files changed, 704 insertions(+), 696 deletions(-) (limited to 'lib/CodeGen') diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 15133b368e..a57d815c2d 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -148,8 +148,8 @@ namespace { // Visitation implementation - Implement dag node combining for different // node types. The semantics are as follows: // Return Value: - // SDValue.Val == 0 - No change was made - // SDValue.Val == N - N was replaced, is dead, and is already handled. + // SDValue.getNode() == 0 - No change was made + // SDValue.getNode() == N - N was replaced, is dead, and is already handled. // otherwise - N should be replaced by the returned Operand. // SDValue visitTokenFactor(SDNode *N); @@ -491,7 +491,7 @@ static bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS, // free when it is profitable to do so. static bool isOneUseSetCC(SDValue N) { SDValue N0, N1, N2; - if (isSetCCEquivalent(N, N0, N1, N2) && N.Val->hasOneUse()) + if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) return true; return false; } @@ -503,11 +503,11 @@ SDValue DAGCombiner::ReassociateOps(unsigned Opc, SDValue N0, SDValue N1){ if (N0.getOpcode() == Opc && isa(N0.getOperand(1))) { if (isa(N1)) { SDValue OpNode = DAG.getNode(Opc, VT, N0.getOperand(1), N1); - AddToWorkList(OpNode.Val); + AddToWorkList(OpNode.getNode()); return DAG.getNode(Opc, VT, OpNode, N0.getOperand(0)); } else if (N0.hasOneUse()) { SDValue OpNode = DAG.getNode(Opc, VT, N0.getOperand(0), N1); - AddToWorkList(OpNode.Val); + AddToWorkList(OpNode.getNode()); return DAG.getNode(Opc, VT, OpNode, N0.getOperand(1)); } } @@ -516,11 +516,11 @@ SDValue DAGCombiner::ReassociateOps(unsigned Opc, SDValue N0, SDValue N1){ if (N1.getOpcode() == Opc && isa(N1.getOperand(1))) { if (isa(N0)) { SDValue OpNode = DAG.getNode(Opc, VT, N1.getOperand(1), N0); - AddToWorkList(OpNode.Val); + AddToWorkList(OpNode.getNode()); return DAG.getNode(Opc, VT, OpNode, N1.getOperand(0)); } else if (N1.hasOneUse()) { SDValue OpNode = DAG.getNode(Opc, VT, N1.getOperand(0), N0); - AddToWorkList(OpNode.Val); + AddToWorkList(OpNode.getNode()); return DAG.getNode(Opc, VT, OpNode, N1.getOperand(1)); } } @@ -532,7 +532,7 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo, assert(N->getNumValues() == NumTo && "Broken CombineTo call!"); ++NodesCombined; DOUT << "\nReplacing.1 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(To[0].Val->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(To[0].getNode()->dump(&DAG)); DOUT << " and " << NumTo-1 << " other values\n"; WorkListRemover DeadNodes(*this); DAG.ReplaceAllUsesWith(N, To, &DeadNodes); @@ -540,8 +540,8 @@ SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo, if (AddTo) { // Push the new nodes and any users onto the worklist for (unsigned i = 0, e = NumTo; i != e; ++i) { - AddToWorkList(To[i].Val); - AddUsersToWorkList(To[i].Val); + AddToWorkList(To[i].getNode()); + AddUsersToWorkList(To[i].getNode()); } } @@ -564,12 +564,12 @@ bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) { return false; // Revisit the node. - AddToWorkList(Op.Val); + AddToWorkList(Op.getNode()); // Replace the old value with the new one. ++NodesCombined; - DOUT << "\nReplacing.2 "; DEBUG(TLO.Old.Val->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(TLO.New.Val->dump(&DAG)); + DOUT << "\nReplacing.2 "; DEBUG(TLO.Old.getNode()->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(TLO.New.getNode()->dump(&DAG)); DOUT << '\n'; // Replace all uses. If any nodes become isomorphic to other nodes and @@ -578,22 +578,22 @@ bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) { DAG.ReplaceAllUsesOfValueWith(TLO.Old, TLO.New, &DeadNodes); // Push the new node and any (possibly new) users onto the worklist. - AddToWorkList(TLO.New.Val); - AddUsersToWorkList(TLO.New.Val); + AddToWorkList(TLO.New.getNode()); + AddUsersToWorkList(TLO.New.getNode()); // Finally, if the node is now dead, remove it from the graph. The node // may not be dead if the replacement process recursively simplified to // something else needing this node. - if (TLO.Old.Val->use_empty()) { - removeFromWorkList(TLO.Old.Val); + if (TLO.Old.getNode()->use_empty()) { + removeFromWorkList(TLO.Old.getNode()); // If the operands of this node are only used by the node, they will now // be dead. Make sure to visit them first to delete dead nodes early. - for (unsigned i = 0, e = TLO.Old.Val->getNumOperands(); i != e; ++i) - if (TLO.Old.Val->getOperand(i).Val->hasOneUse()) - AddToWorkList(TLO.Old.Val->getOperand(i).Val); + for (unsigned i = 0, e = TLO.Old.getNode()->getNumOperands(); i != e; ++i) + if (TLO.Old.getNode()->getOperand(i).getNode()->hasOneUse()) + AddToWorkList(TLO.Old.getNode()->getOperand(i).getNode()); - DAG.DeleteNode(TLO.Old.Val); + DAG.DeleteNode(TLO.Old.getNode()); } return true; } @@ -608,7 +608,7 @@ void DAGCombiner::ProcessNode(SDNode *N) { // reduced number of uses, allowing other xforms. if (N->use_empty() && N != &Dummy) { for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) - AddToWorkList(N->getOperand(i).Val); + AddToWorkList(N->getOperand(i).getNode()); DAG.DeleteNode(N); return; @@ -616,7 +616,7 @@ void DAGCombiner::ProcessNode(SDNode *N) { SDValue RV = combine(N); - if (RV.Val == 0) + if (RV.getNode() == 0) return; ++NodesCombined; @@ -625,19 +625,19 @@ void DAGCombiner::ProcessNode(SDNode *N) { // zero, we know that the node must have defined multiple values and // CombineTo was used. Since CombineTo takes care of the worklist // mechanics for us, we have no work to do in this case. - if (RV.Val == N) + if (RV.getNode() == N) return; assert(N->getOpcode() != ISD::DELETED_NODE && - RV.Val->getOpcode() != ISD::DELETED_NODE && + RV.getNode()->getOpcode() != ISD::DELETED_NODE && "Node was deleted but visit returned new node!"); DOUT << "\nReplacing.3 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(RV.Val->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(RV.getNode()->dump(&DAG)); DOUT << '\n'; - if (N->getNumValues() == RV.Val->getNumValues()) - DAG.ReplaceAllUsesWith(N, RV.Val); + if (N->getNumValues() == RV.getNode()->getNumValues()) + DAG.ReplaceAllUsesWith(N, RV.getNode()); else { assert(N->getValueType(0) == RV.getValueType() && N->getNumValues() == 1 && "Type mismatch"); @@ -650,8 +650,8 @@ void DAGCombiner::ProcessNode(SDNode *N) { DAG.DeleteNode(N); // Push the new node and any users onto the worklist - AddToWorkList(RV.Val); - AddUsersToWorkList(RV.Val); + AddToWorkList(RV.getNode()); + AddUsersToWorkList(RV.getNode()); } void DAGCombiner::Run(bool RunningAfterLegalize) { @@ -761,7 +761,7 @@ SDValue DAGCombiner::combine(SDNode *N) { SDValue RV = visit(N); // If nothing happened, try a target-specific DAG combine. - if (RV.Val == 0) { + if (RV.getNode() == 0) { assert(N->getOpcode() != ISD::DELETED_NODE && "Node was deleted but visit returned NULL!"); @@ -778,7 +778,7 @@ SDValue DAGCombiner::combine(SDNode *N) { // If N is a commutative binary node, try commuting it to enable more // sdisel CSE. - if (RV.Val == 0 && + if (RV.getNode() == 0 && SelectionDAG::isCommutativeBinOp(N->getOpcode()) && N->getNumValues() == 1) { SDValue N0 = N->getOperand(0); @@ -815,9 +815,9 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) { // If N has two operands, where one has an input chain equal to the other, // the 'other' chain is redundant. if (N->getNumOperands() == 2) { - if (getInputChainForNode(N->getOperand(0).Val) == N->getOperand(1)) + if (getInputChainForNode(N->getOperand(0).getNode()) == N->getOperand(1)) return N->getOperand(0); - if (getInputChainForNode(N->getOperand(1).Val) == N->getOperand(0)) + if (getInputChainForNode(N->getOperand(1).getNode()) == N->getOperand(0)) return N->getOperand(1); } @@ -847,11 +847,11 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) { case ISD::TokenFactor: if ((CombinerAA || Op.hasOneUse()) && - std::find(TFs.begin(), TFs.end(), Op.Val) == TFs.end()) { + std::find(TFs.begin(), TFs.end(), Op.getNode()) == TFs.end()) { // Queue up for processing. - TFs.push_back(Op.Val); + TFs.push_back(Op.getNode()); // Clean up in case the token factor is removed. - AddToWorkList(Op.Val); + AddToWorkList(Op.getNode()); Changed = true; break; } @@ -859,7 +859,7 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) { default: // Only add if it isn't already in the list. - if (SeenOps.insert(Op.Val)) + if (SeenOps.insert(Op.getNode())) Ops.push_back(Op); else Changed = true; @@ -905,7 +905,7 @@ SDValue combineShlAddConstant(SDValue N0, SDValue N1, SelectionDAG &DAG) { SDValue N00 = N0.getOperand(0); SDValue N01 = N0.getOperand(1); ConstantSDNode *N01C = dyn_cast(N01); - if (N01C && N00.getOpcode() == ISD::ADD && N00.Val->hasOneUse() && + if (N01C && N00.getOpcode() == ISD::ADD && N00.getNode()->hasOneUse() && isa(N00.getOperand(1))) { N0 = DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::SHL, VT, N00.getOperand(0), N01), @@ -975,7 +975,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (add x, undef) -> undef @@ -1001,7 +1001,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) { N0.getOperand(1)); // reassociate add SDValue RADD = ReassociateOps(ISD::ADD, N0, N1); - if (RADD.Val != 0) + if (RADD.getNode() != 0) return RADD; // fold ((0-A) + B) -> B-A if (N0.getOpcode() == ISD::SUB && isa(N0.getOperand(0)) && @@ -1036,23 +1036,23 @@ SDValue DAGCombiner::visitADD(SDNode *N) { } // fold (add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<hasOneUse()) { + if (N0.getOpcode() == ISD::SHL && N0.getNode()->hasOneUse()) { SDValue Result = combineShlAddConstant(N0, N1, DAG); - if (Result.Val) return Result; + if (Result.getNode()) return Result; } - if (N1.getOpcode() == ISD::SHL && N1.Val->hasOneUse()) { + if (N1.getOpcode() == ISD::SHL && N1.getNode()->hasOneUse()) { SDValue Result = combineShlAddConstant(N1, N0, DAG); - if (Result.Val) return Result; + if (Result.getNode()) return Result; } // fold (add (select cc, 0, c), x) -> (select cc, x, (add, x, c)) - if (N0.getOpcode() == ISD::SELECT && N0.Val->hasOneUse()) { + if (N0.getOpcode() == ISD::SELECT && N0.getNode()->hasOneUse()) { SDValue Result = combineSelectAndUse(N, N0, N1, DAG); - if (Result.Val) return Result; + if (Result.getNode()) return Result; } - if (N1.getOpcode() == ISD::SELECT && N1.Val->hasOneUse()) { + if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { SDValue Result = combineSelectAndUse(N, N1, N0, DAG); - if (Result.Val) return Result; + if (Result.getNode()) return Result; } return SDValue(); @@ -1121,14 +1121,14 @@ SDValue DAGCombiner::visitADDE(SDNode *N) { SDValue DAGCombiner::visitSUB(SDNode *N) { SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); - ConstantSDNode *N0C = dyn_cast(N0.Val); - ConstantSDNode *N1C = dyn_cast(N1.Val); + ConstantSDNode *N0C = dyn_cast(N0.getNode()); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); MVT VT = N0.getValueType(); // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (sub x, x) -> 0 @@ -1148,9 +1148,9 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1) return N0.getOperand(0); // fold (sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c)) - if (N1.getOpcode() == ISD::SELECT && N1.Val->hasOneUse()) { + if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { SDValue Result = combineSelectAndUse(N, N1, N0, DAG); - if (Result.Val) return Result; + if (Result.getNode()) return Result; } // If either operand of a sub is undef, the result is undef if (N0.getOpcode() == ISD::UNDEF) @@ -1171,7 +1171,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (mul x, undef) -> 0 @@ -1208,7 +1208,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { if (N1C && N0.getOpcode() == ISD::SHL && isa(N0.getOperand(1))) { SDValue C3 = DAG.getNode(ISD::SHL, VT, N1, N0.getOperand(1)); - AddToWorkList(C3.Val); + AddToWorkList(C3.getNode()); return DAG.getNode(ISD::MUL, VT, N0.getOperand(0), C3); } @@ -1218,19 +1218,19 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { SDValue Sh(0,0), Y(0,0); // Check for both (mul (shl X, C), Y) and (mul Y, (shl X, C)). if (N0.getOpcode() == ISD::SHL && isa(N0.getOperand(1)) && - N0.Val->hasOneUse()) { + N0.getNode()->hasOneUse()) { Sh = N0; Y = N1; } else if (N1.getOpcode() == ISD::SHL && - isa(N1.getOperand(1)) && N1.Val->hasOneUse()) { + isa(N1.getOperand(1)) && N1.getNode()->hasOneUse()) { Sh = N1; Y = N0; } - if (Sh.Val) { + if (Sh.getNode()) { SDValue Mul = DAG.getNode(ISD::MUL, VT, Sh.getOperand(0), Y); return DAG.getNode(ISD::SHL, VT, Mul, Sh.getOperand(1)); } } // fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2) - if (N1C && N0.getOpcode() == ISD::ADD && N0.Val->hasOneUse() && + if (N1C && N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse() && isa(N0.getOperand(1))) { return DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::MUL, VT, N0.getOperand(0), N1), @@ -1239,7 +1239,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { // reassociate mul SDValue RMUL = ReassociateOps(ISD::MUL, N0, N1); - if (RMUL.Val != 0) + if (RMUL.getNode() != 0) return RMUL; return SDValue(); @@ -1248,14 +1248,14 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { SDValue DAGCombiner::visitSDIV(SDNode *N) { SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); - ConstantSDNode *N0C = dyn_cast(N0.Val); - ConstantSDNode *N1C = dyn_cast(N1.Val); + ConstantSDNode *N0C = dyn_cast(N0.getNode()); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); MVT VT = N->getValueType(0); // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (sdiv c1, c2) -> c1/c2 @@ -1288,21 +1288,21 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) { SDValue SGN = DAG.getNode(ISD::SRA, VT, N0, DAG.getConstant(VT.getSizeInBits()-1, TLI.getShiftAmountTy())); - AddToWorkList(SGN.Val); + AddToWorkList(SGN.getNode()); // Add (N0 < 0) ? abs2 - 1 : 0; SDValue SRL = DAG.getNode(ISD::SRL, VT, SGN, DAG.getConstant(VT.getSizeInBits()-lg2, TLI.getShiftAmountTy())); SDValue ADD = DAG.getNode(ISD::ADD, VT, N0, SRL); - AddToWorkList(SRL.Val); - AddToWorkList(ADD.Val); // Divide by pow2 + AddToWorkList(SRL.getNode()); + AddToWorkList(ADD.getNode()); // Divide by pow2 SDValue SRA = DAG.getNode(ISD::SRA, VT, ADD, DAG.getConstant(lg2, TLI.getShiftAmountTy())); // If we're dividing by a positive value, we're done. Otherwise, we must // negate the result. if (pow2 > 0) return SRA; - AddToWorkList(SRA.Val); + AddToWorkList(SRA.getNode()); return DAG.getNode(ISD::SUB, VT, DAG.getConstant(0, VT), SRA); } // if integer divide is expensive and we satisfy the requirements, emit an @@ -1310,7 +1310,7 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) { if (N1C && (N1C->getSignExtended() < -1 || N1C->getSignExtended() > 1) && !TLI.isIntDivCheap()) { SDValue Op = BuildSDIV(N); - if (Op.Val) return Op; + if (Op.getNode()) return Op; } // undef / X -> 0 @@ -1326,14 +1326,14 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) { SDValue DAGCombiner::visitUDIV(SDNode *N) { SDValue N0 = N->getOperand(0); SDValue N1 = N->getOperand(1); - ConstantSDNode *N0C = dyn_cast(N0.Val); - ConstantSDNode *N1C = dyn_cast(N1.Val); + ConstantSDNode *N0C = dyn_cast(N0.getNode()); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); MVT VT = N->getValueType(0); // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (udiv c1, c2) -> c1/c2 @@ -1353,7 +1353,7 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) { DAG.getConstant(SHC->getAPIntValue() .logBase2(), ADDVT)); - AddToWorkList(Add.Val); + AddToWorkList(Add.getNode()); return DAG.getNode(ISD::SRL, VT, N0, Add); } } @@ -1361,7 +1361,7 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) { // fold (udiv x, c) -> alternate if (N1C && !N1C->isNullValue() && !TLI.isIntDivCheap()) { SDValue Op = BuildUDIV(N); - if (Op.Val) return Op; + if (Op.getNode()) return Op; } // undef / X -> 0 @@ -1395,12 +1395,12 @@ SDValue DAGCombiner::visitSREM(SDNode *N) { // X%C to the equivalent of X-X/C*C. if (N1C && !N1C->isNullValue()) { SDValue Div = DAG.getNode(ISD::SDIV, VT, N0, N1); - AddToWorkList(Div.Val); - SDValue OptimizedDiv = combine(Div.Val); - if (OptimizedDiv.Val && OptimizedDiv.Val != Div.Val) { + AddToWorkList(Div.getNode()); + SDValue OptimizedDiv = combine(Div.getNode()); + if (OptimizedDiv.getNode() && OptimizedDiv.getNode() != Div.getNode()) { SDValue Mul = DAG.getNode(ISD::MUL, VT, OptimizedDiv, N1); SDValue Sub = DAG.getNode(ISD::SUB, VT, N0, Mul); - AddToWorkList(Mul.Val); + AddToWorkList(Mul.getNode()); return Sub; } } @@ -1437,7 +1437,7 @@ SDValue DAGCombiner::visitUREM(SDNode *N) { DAG.getNode(ISD::ADD, VT, N1, DAG.getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT)); - AddToWorkList(Add.Val); + AddToWorkList(Add.getNode()); return DAG.getNode(ISD::AND, VT, N0, Add); } } @@ -1447,11 +1447,11 @@ SDValue DAGCombiner::visitUREM(SDNode *N) { // X%C to the equivalent of X-X/C*C. if (N1C && !N1C->isNullValue()) { SDValue Div = DAG.getNode(ISD::UDIV, VT, N0, N1); - SDValue OptimizedDiv = combine(Div.Val); - if (OptimizedDiv.Val && OptimizedDiv.Val != Div.Val) { + SDValue OptimizedDiv = combine(Div.getNode()); + if (OptimizedDiv.getNode() && OptimizedDiv.getNode() != Div.getNode()) { SDValue Mul = DAG.getNode(ISD::MUL, VT, OptimizedDiv, N1); SDValue Sub = DAG.getNode(ISD::SUB, VT, N0, Mul); - AddToWorkList(Mul.Val); + AddToWorkList(Mul.getNode()); return Sub; } } @@ -1540,9 +1540,9 @@ SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, if (LoExists) { SDValue Lo = DAG.getNode(LoOp, N->getValueType(0), N->op_begin(), N->getNumOperands()); - AddToWorkList(Lo.Val); - SDValue LoOpt = combine(Lo.Val); - if (LoOpt.Val && LoOpt.Val != Lo.Val && + AddToWorkList(Lo.getNode()); + SDValue LoOpt = combine(Lo.getNode()); + if (LoOpt.getNode() && LoOpt.getNode() != Lo.getNode() && (!AfterLegalize || TLI.isOperationLegal(LoOpt.getOpcode(), LoOpt.getValueType()))) return CombineTo(N, LoOpt, LoOpt); @@ -1551,9 +1551,9 @@ SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, if (HiExists) { SDValue Hi = DAG.getNode(HiOp, N->getValueType(1), N->op_begin(), N->getNumOperands()); - AddToWorkList(Hi.Val); - SDValue HiOpt = combine(Hi.Val); - if (HiOpt.Val && HiOpt != Hi && + AddToWorkList(Hi.getNode()); + SDValue HiOpt = combine(Hi.getNode()); + if (HiOpt.getNode() && HiOpt != Hi && (!AfterLegalize || TLI.isOperationLegal(HiOpt.getOpcode(), HiOpt.getValueType()))) return CombineTo(N, HiOpt, HiOpt); @@ -1563,28 +1563,28 @@ SDValue DAGCombiner::SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, SDValue DAGCombiner::visitSMUL_LOHI(SDNode *N) { SDValue Res = SimplifyNodeWithTwoResults(N, ISD::MUL, ISD::MULHS); - if (Res.Val) return Res; + if (Res.getNode()) return Res; return SDValue(); } SDValue DAGCombiner::visitUMUL_LOHI(SDNode *N) { SDValue Res = SimplifyNodeWithTwoResults(N, ISD::MUL, ISD::MULHU); - if (Res.Val) return Res; + if (Res.getNode()) return Res; return SDValue(); } SDValue DAGCombiner::visitSDIVREM(SDNode *N) { SDValue Res = SimplifyNodeWithTwoResults(N, ISD::SDIV, ISD::SREM); - if (Res.Val) return Res; + if (Res.getNode()) return Res; return SDValue(); } SDValue DAGCombiner::visitUDIVREM(SDNode *N) { SDValue Res = SimplifyNodeWithTwoResults(N, ISD::UDIV, ISD::UREM); - if (Res.Val) return Res; + if (Res.getNode()) return Res; return SDValue(); } @@ -1607,7 +1607,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) { SDValue ORNode = DAG.getNode(N->getOpcode(), N0.getOperand(0).getValueType(), N0.getOperand(0), N1.getOperand(0)); - AddToWorkList(ORNode.Val); + AddToWorkList(ORNode.getNode()); return DAG.getNode(N0.getOpcode(), VT, ORNode); } @@ -1621,7 +1621,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) { SDValue ORNode = DAG.getNode(N->getOpcode(), N0.getOperand(0).getValueType(), N0.getOperand(0), N1.getOperand(0)); - AddToWorkList(ORNode.Val); + AddToWorkList(ORNode.getNode()); return DAG.getNode(N0.getOpcode(), VT, ORNode, N0.getOperand(1)); } @@ -1640,7 +1640,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (and x, undef) -> 0 @@ -1661,7 +1661,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { return DAG.getConstant(0, VT); // reassociate and SDValue RAND = ReassociateOps(ISD::AND, N0, N1); - if (RAND.Val != 0) + if (RAND.getNode() != 0) return RAND; // fold (and (or x, 0xFFFF), 0xFF) -> 0xFF if (N1C && N0.getOpcode() == ISD::OR) @@ -1683,7 +1683,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // We actually want to replace all uses of the any_extend with the // zero_extend, to avoid duplicating things. This will later cause this // AND to be folded. - CombineTo(N0.Val, Zext); + CombineTo(N0.getNode(), Zext); return SDValue(N, 0); // Return N so it doesn't get rechecked! } } @@ -1697,19 +1697,19 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // fold (X == 0) & (Y == 0) -> (X|Y == 0) if (cast(LR)->isNullValue() && Op1 == ISD::SETEQ) { SDValue ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL); - AddToWorkList(ORNode.Val); + AddToWorkList(ORNode.getNode()); return DAG.getSetCC(VT, ORNode, LR, Op1); } // fold (X == -1) & (Y == -1) -> (X&Y == -1) if (cast(LR)->isAllOnesValue() && Op1 == ISD::SETEQ) { SDValue ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL); - AddToWorkList(ANDNode.Val); + AddToWorkList(ANDNode.getNode()); return DAG.getSetCC(VT, ANDNode, LR, Op1); } // fold (X > -1) & (Y > -1) -> (X|Y > -1) if (cast(LR)->isAllOnesValue() && Op1 == ISD::SETGT) { SDValue ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL); - AddToWorkList(ORNode.Val); + AddToWorkList(ORNode.getNode()); return DAG.getSetCC(VT, ORNode, LR, Op1); } } @@ -1729,7 +1729,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // Simplify: and (op x...), (op y...) -> (op (and x, y)) if (N0.getOpcode() == N1.getOpcode()) { SDValue Tmp = SimplifyBinOpWithSameOpcodeHands(N); - if (Tmp.Val) return Tmp; + if (Tmp.getNode()) return Tmp; } // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1) @@ -1738,7 +1738,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { SimplifyDemandedBits(SDValue(N, 0))) return SDValue(N, 0); // fold (zext_inreg (extload x)) -> (zextload x) - if (ISD::isEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val)) { + if (ISD::isEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode())) { LoadSDNode *LN0 = cast(N0); MVT EVT = LN0->getMemoryVT(); // If we zero all the possible extended bits, then we can turn this into @@ -1754,12 +1754,12 @@ SDValue DAGCombiner::visitAND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); AddToWorkList(N); - CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } } // fold (zext_inreg (sextload x)) -> (zextload x) iff load has one use - if (ISD::isSEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && + if (ISD::isSEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT EVT = LN0->getMemoryVT(); @@ -1776,7 +1776,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); AddToWorkList(N); - CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } } @@ -1813,13 +1813,13 @@ SDValue DAGCombiner::visitAND(SDNode *N) { DAG.getConstant(PtrOff, PtrType)); Alignment = MinAlign(Alignment, PtrOff); } - AddToWorkList(NewPtr.Val); + AddToWorkList(NewPtr.getNode()); SDValue Load = DAG.getExtLoad(ISD::ZEXTLOAD, VT, LN0->getChain(), NewPtr, LN0->getSrcValue(), LN0->getSrcValueOffset(), EVT, LN0->isVolatile(), Alignment); AddToWorkList(N); - CombineTo(N0.Val, Load, Load.getValue(1)); + CombineTo(N0.getNode(), Load, Load.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } } @@ -1839,7 +1839,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (or x, undef) -> -1 @@ -1862,10 +1862,10 @@ SDValue DAGCombiner::visitOR(SDNode *N) { return N1; // reassociate or SDValue ROR = ReassociateOps(ISD::OR, N0, N1); - if (ROR.Val != 0) + if (ROR.getNode() != 0) return ROR; // Canonicalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2) - if (N1C && N0.getOpcode() == ISD::AND && N0.Val->hasOneUse() && + if (N1C && N0.getOpcode() == ISD::AND && N0.getNode()->hasOneUse() && isa(N0.getOperand(1))) { ConstantSDNode *C1 = cast(N0.getOperand(1)); return DAG.getNode(ISD::AND, VT, DAG.getNode(ISD::OR, VT, N0.getOperand(0), @@ -1885,7 +1885,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) { if (cast(LR)->isNullValue() && (Op1 == ISD::SETNE || Op1 == ISD::SETLT)) { SDValue ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL); - AddToWorkList(ORNode.Val); + AddToWorkList(ORNode.getNode()); return DAG.getSetCC(VT, ORNode, LR, Op1); } // fold (X != -1) | (Y != -1) -> (X&Y != -1) @@ -1893,7 +1893,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) { if (cast(LR)->isAllOnesValue() && (Op1 == ISD::SETNE || Op1 == ISD::SETGT)) { SDValue ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL); - AddToWorkList(ANDNode.Val); + AddToWorkList(ANDNode.getNode()); return DAG.getSetCC(VT, ANDNode, LR, Op1); } } @@ -1913,7 +1913,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) { // Simplify: or (op x...), (op y...) -> (op (or x, y)) if (N0.getOpcode() == N1.getOpcode()) { SDValue Tmp = SimplifyBinOpWithSameOpcodeHands(N); - if (Tmp.Val) return Tmp; + if (Tmp.getNode()) return Tmp; } // (X & C1) | (Y & C2) -> (X|Y) & C3 if possible. @@ -1922,7 +1922,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) { N0.getOperand(1).getOpcode() == ISD::Constant && N1.getOperand(1).getOpcode() == ISD::Constant && // Don't increase # computations. - (N0.Val->hasOneUse() || N1.Val->hasOneUse())) { + (N0.getNode()->hasOneUse() || N1.getNode()->hasOneUse())) { // We can only do this xform if we know that bits from X that are set in C2 // but not in C1 are already zero. Likewise for Y. const APInt &LHSMask = @@ -2023,14 +2023,14 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { Rot = DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt); // If there is an AND of either shifted operand, apply it to the result. - if (LHSMask.Val || RHSMask.Val) { + if (LHSMask.getNode() || RHSMask.getNode()) { APInt Mask = APInt::getAllOnesValue(OpSizeInBits); - if (LHSMask.Val) { + if (LHSMask.getNode()) { APInt RHSBits = APInt::getLowBitsSet(OpSizeInBits, LShVal); Mask &= cast(LHSMask)->getAPIntValue() | RHSBits; } - if (RHSMask.Val) { + if (RHSMask.getNode()) { APInt LHSBits = APInt::getHighBitsSet(OpSizeInBits, RShVal); Mask &= cast(RHSMask)->getAPIntValue() | LHSBits; } @@ -2038,12 +2038,12 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { Rot = DAG.getNode(ISD::AND, VT, Rot, DAG.getConstant(Mask, VT)); } - return Rot.Val; + return Rot.getNode(); } // If there is a mask here, and we have a variable shift, we can't be sure // that we're masking out the right stuff. - if (LHSMask.Val || RHSMask.Val) + if (LHSMask.getNode() || RHSMask.getNode()) return 0; // fold (or (shl x, y), (srl x, (sub 32, y))) -> (rotl x, y) @@ -2054,9 +2054,9 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { dyn_cast(RHSShiftAmt.getOperand(0))) { if (SUBC->getAPIntValue() == OpSizeInBits) { if (HasROTL) - return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val; + return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode(); else - return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).Val; + return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode(); } } } @@ -2069,9 +2069,9 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { dyn_cast(LHSShiftAmt.getOperand(0))) { if (SUBC->getAPIntValue() == OpSizeInBits) { if (HasROTL) - return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val; + return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode(); else - return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).Val; + return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode(); } } } @@ -2094,9 +2094,9 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { if (ConstantSDNode *SUBC = cast(RExtOp0.getOperand(0))) { if (SUBC->getAPIntValue() == OpSizeInBits) { if (HasROTL) - return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val; + return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode(); else - return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).Val; + return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode(); } } } else if (LExtOp0.getOpcode() == ISD::SUB && @@ -2108,9 +2108,9 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) { if (ConstantSDNode *SUBC = cast(LExtOp0.getOperand(0))) { if (SUBC->getAPIntValue() == OpSizeInBits) { if (HasROTL) - return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, RHSShiftAmt).Val; + return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, RHSShiftAmt).getNode(); else - return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).Val; + return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode(); } } } @@ -2131,7 +2131,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (xor undef, undef) -> 0. This is a common idiom (misuse). @@ -2153,7 +2153,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { return N0; // reassociate xor SDValue RXOR = ReassociateOps(ISD::XOR, N0, N1); - if (RXOR.Val != 0) + if (RXOR.getNode() != 0) return RXOR; // fold !(x cc y) -> (x !cc y) if (N1C && N1C->getAPIntValue() == 1 && isSetCCEquivalent(N0, LHS, RHS, CC)) { @@ -2169,11 +2169,11 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { } // fold (not (zext (setcc x, y))) -> (zext (not (setcc x, y))) if (N1C && N1C->getAPIntValue() == 1 && N0.getOpcode() == ISD::ZERO_EXTEND && - N0.Val->hasOneUse() && isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){ + N0.getNode()->hasOneUse() && isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){ SDValue V = N0.getOperand(0); V = DAG.getNode(ISD::XOR, V.getValueType(), V, DAG.getConstant(1, V.getValueType())); - AddToWorkList(V.Val); + AddToWorkList(V.getNode()); return DAG.getNode(ISD::ZERO_EXTEND, VT, V); } @@ -2185,7 +2185,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS - AddToWorkList(LHS.Val); AddToWorkList(RHS.Val); + AddToWorkList(LHS.getNode()); AddToWorkList(RHS.getNode()); return DAG.getNode(NewOpcode, VT, LHS, RHS); } } @@ -2197,7 +2197,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS - AddToWorkList(LHS.Val); AddToWorkList(RHS.Val); + AddToWorkList(LHS.getNode()); AddToWorkList(RHS.getNode()); return DAG.getNode(NewOpcode, VT, LHS, RHS); } } @@ -2229,7 +2229,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { // Simplify: xor (op x...), (op y...) -> (op (xor x, y)) if (N0.getOpcode() == N1.getOpcode()) { SDValue Tmp = SimplifyBinOpWithSameOpcodeHands(N); - if (Tmp.Val) return Tmp; + if (Tmp.getNode()) return Tmp; } // Simplify the expression using non-local knowledge. @@ -2243,7 +2243,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) { /// visitShiftByConstant - Handle transforms common to the three shifts, when /// the shift amount is a constant. SDValue DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) { - SDNode *LHS = N->getOperand(0).Val; + SDNode *LHS = N->getOperand(0).getNode(); if (!LHS->hasOneUse()) return SDValue(); // We want to pull some binops through shifts, so that we have (and (shift)) @@ -2278,7 +2278,7 @@ SDValue DAGCombiner::visitShiftByConstant(SDNode *N, unsigned Amt) { // //void foo(int *X, int i) { X[i & 1235] = 1; } //int bar(int *X, int i) { return X[i & 255]; } - SDNode *BinOpLHSVal = LHS->getOperand(0).Val; + SDNode *BinOpLHSVal = LHS->getOperand(0).getNode(); if ((BinOpLHSVal->getOpcode() != ISD::SHL && BinOpLHSVal->getOpcode() != ISD::SRA && BinOpLHSVal->getOpcode() != ISD::SRL) || @@ -2502,7 +2502,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { return DAG.getNode(ISD::UNDEF, VT); SDValue SmallShift = DAG.getNode(ISD::SRL, SmallVT, N0.getOperand(0), N1); - AddToWorkList(SmallShift.Val); + AddToWorkList(SmallShift.getNode()); return DAG.getNode(ISD::ANY_EXTEND, VT, SmallShift); } @@ -2540,7 +2540,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { if (ShAmt) { Op = DAG.getNode(ISD::SRL, VT, Op, DAG.getConstant(ShAmt, TLI.getShiftAmountTy())); - AddToWorkList(Op.Val); + AddToWorkList(Op.getNode()); } return DAG.getNode(ISD::XOR, VT, Op, DAG.getConstant(1, VT)); } @@ -2612,7 +2612,7 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) { SDValue XORNode = DAG.getNode(ISD::XOR, VT0, N0, DAG.getConstant(1, VT0)); if (VT == VT0) return XORNode; - AddToWorkList(XORNode.Val); + AddToWorkList(XORNode.getNode()); if (VT.bitsGT(VT0)) return DAG.getNode(ISD::ZERO_EXTEND, VT, XORNode); return DAG.getNode(ISD::TRUNCATE, VT, XORNode); @@ -2620,13 +2620,13 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) { // fold select C, 0, X -> ~C & X if (VT == VT0 && VT == MVT::i1 && N1C && N1C->isNullValue()) { SDValue XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT)); - AddToWorkList(XORNode.Val); + AddToWorkList(XORNode.getNode()); return DAG.getNode(ISD::AND, VT, XORNode, N2); } // fold select C, X, 1 -> ~C | X if (VT == VT0 && VT == MVT::i1 && N2C && N2C->getAPIntValue() == 1) { SDValue XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT)); - AddToWorkList(XORNode.Val); + AddToWorkList(XORNode.getNode()); return DAG.getNode(ISD::OR, VT, XORNode, N1); } // fold select C, X, 0 -> C & X @@ -2673,9 +2673,9 @@ SDValue DAGCombiner::visitSELECT_CC(SDNode *N) { // Determine if the condition we're dealing with is constant SDValue SCC = SimplifySetCC(TLI.getSetCCResultType(N0), N0, N1, CC, false); - if (SCC.Val) AddToWorkList(SCC.Val); + if (SCC.getNode()) AddToWorkList(SCC.getNode()); - if (ConstantSDNode *SCCC = dyn_cast_or_null(SCC.Val)) { + if (ConstantSDNode *SCCC = dyn_cast_or_null(SCC.getNode())) { if (!SCCC->isNullValue()) return N2; // cond always true -> true val else @@ -2683,7 +2683,7 @@ SDValue DAGCombiner::visitSELECT_CC(SDNode *N) { } // Fold to a simpler select_cc - if (SCC.Val && SCC.getOpcode() == ISD::SETCC) + if (SCC.getNode() && SCC.getOpcode() == ISD::SETCC) return DAG.getNode(ISD::SELECT_CC, N2.getValueType(), SCC.getOperand(0), SCC.getOperand(1), N2, N3, SCC.getOperand(2)); @@ -2711,7 +2711,7 @@ static bool ExtendUsesToFormExtLoad(SDNode *N, SDValue N0, TargetLowering &TLI) { bool HasCopyToRegUses = false; bool isTruncFree = TLI.isTruncateFree(N->getValueType(0), N0.getValueType()); - for (SDNode::use_iterator UI = N0.Val->use_begin(), UE = N0.Val->use_end(); + for (SDNode::use_iterator UI = N0.getNode()->use_begin(), UE = N0.getNode()->use_end(); UI != UE; ++UI) { SDNode *User = *UI; if (User == N) @@ -2755,7 +2755,7 @@ static bool ExtendUsesToFormExtLoad(SDNode *N, SDValue N0, SDNode *User = *UI; for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) { SDValue UseOp = User->getOperand(i); - if (UseOp.Val == N && UseOp.getResNo() == 0) { + if (UseOp.getNode() == N && UseOp.getResNo() == 0) { BothLiveOut = true; break; } @@ -2785,10 +2785,10 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { if (N0.getOpcode() == ISD::TRUNCATE) { // fold (sext (truncate (load x))) -> (sext (smaller load x)) // fold (sext (truncate (srl (load x), c))) -> (sext (smaller load (x+c/n))) - SDValue NarrowLoad = ReduceLoadWidth(N0.Val); - if (NarrowLoad.Val) { - if (NarrowLoad.Val != N0.Val) - CombineTo(N0.Val, NarrowLoad); + SDValue NarrowLoad = ReduceLoadWidth(N0.getNode()); + if (NarrowLoad.getNode()) { + if (NarrowLoad.getNode() != N0.getNode()) + CombineTo(N0.getNode(), NarrowLoad); return DAG.getNode(ISD::SIGN_EXTEND, VT, NarrowLoad); } @@ -2830,7 +2830,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { } // fold (sext (load x)) -> (sext (truncate (sextload x))) - if (ISD::isNON_EXTLoad(N0.Val) && + if (ISD::isNON_EXTLoad(N0.getNode()) && ((!AfterLegalize && !cast(N0)->isVolatile()) || TLI.isLoadXLegal(ISD::SEXTLOAD, N0.getValueType()))) { bool DoXform = true; @@ -2847,7 +2847,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { LN0->getAlignment()); CombineTo(N, ExtLoad); SDValue Trunc = DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad); - CombineTo(N0.Val, Trunc, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), Trunc, ExtLoad.getValue(1)); // Extend SetCC uses if necessary. for (unsigned i = 0, e = SetCCs.size(); i != e; ++i) { SDNode *SetCC = SetCCs[i]; @@ -2869,8 +2869,8 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { // fold (sext (sextload x)) -> (sext (truncate (sextload x))) // fold (sext ( extload x)) -> (sext (truncate (sextload x))) - if ((ISD::isSEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && - ISD::isUNINDEXEDLoad(N0.Val) && N0.hasOneUse()) { + if ((ISD::isSEXTLoad(N0.getNode()) || ISD::isEXTLoad(N0.getNode())) && + ISD::isUNINDEXEDLoad(N0.getNode()) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT EVT = LN0->getMemoryVT(); if ((!AfterLegalize && !LN0->isVolatile()) || @@ -2881,7 +2881,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), + CombineTo(N0.getNode(), DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } @@ -2893,7 +2893,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { SimplifySelectCC(N0.getOperand(0), N0.getOperand(1), DAG.getConstant(~0ULL, VT), DAG.getConstant(0, VT), cast(N0.getOperand(2))->get(), true); - if (SCC.Val) return SCC; + if (SCC.getNode()) return SCC; } // fold (sext x) -> (zext x) if the sign bit is known zero. @@ -2919,10 +2919,10 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { // fold (zext (truncate (load x))) -> (zext (smaller load x)) // fold (zext (truncate (srl (load x), c))) -> (zext (small load (x+c/n))) if (N0.getOpcode() == ISD::TRUNCATE) { - SDValue NarrowLoad = ReduceLoadWidth(N0.Val); - if (NarrowLoad.Val) { - if (NarrowLoad.Val != N0.Val) - CombineTo(N0.Val, NarrowLoad); + SDValue NarrowLoad = ReduceLoadWidth(N0.getNode()); + if (NarrowLoad.getNode()) { + if (NarrowLoad.getNode() != N0.getNode()) + CombineTo(N0.getNode(), NarrowLoad); return DAG.getNode(ISD::ZERO_EXTEND, VT, NarrowLoad); } } @@ -2955,7 +2955,7 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { } // fold (zext (load x)) -> (zext (truncate (zextload x))) - if (ISD::isNON_EXTLoad(N0.Val) && + if (ISD::isNON_EXTLoad(N0.getNode()) && ((!AfterLegalize && !cast(N0)->isVolatile()) || TLI.isLoadXLegal(ISD::ZEXTLOAD, N0.getValueType()))) { bool DoXform = true; @@ -2972,7 +2972,7 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { LN0->getAlignment()); CombineTo(N, ExtLoad); SDValue Trunc = DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad); - CombineTo(N0.Val, Trunc, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), Trunc, ExtLoad.getValue(1)); // Extend SetCC uses if necessary. for (unsigned i = 0, e = SetCCs.size(); i != e; ++i) { SDNode *SetCC = SetCCs[i]; @@ -2994,8 +2994,8 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { // fold (zext (zextload x)) -> (zext (truncate (zextload x))) // fold (zext ( extload x)) -> (zext (truncate (zextload x))) - if ((ISD::isZEXTLoad(N0.Val) || ISD::isEXTLoad(N0.Val)) && - ISD::isUNINDEXEDLoad(N0.Val) && N0.hasOneUse()) { + if ((ISD::isZEXTLoad(N0.getNode()) || ISD::isEXTLoad(N0.getNode())) && + ISD::isUNINDEXEDLoad(N0.getNode()) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT EVT = LN0->getMemoryVT(); if ((!AfterLegalize && !LN0->isVolatile()) || @@ -3006,7 +3006,7 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), + CombineTo(N0.getNode(), DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } @@ -3018,7 +3018,7 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { SimplifySelectCC(N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, VT), DAG.getConstant(0, VT), cast(N0.getOperand(2))->get(), true); - if (SCC.Val) return SCC; + if (SCC.getNode()) return SCC; } return SDValue(); @@ -3042,10 +3042,10 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { // fold (aext (truncate (load x))) -> (aext (smaller load x)) // fold (aext (truncate (srl (load x), c))) -> (aext (small load (x+c/n))) if (N0.getOpcode() == ISD::TRUNCATE) { - SDValue NarrowLoad = ReduceLoadWidth(N0.Val); - if (NarrowLoad.Val) { - if (NarrowLoad.Val != N0.Val) - CombineTo(N0.Val, NarrowLoad); + SDValue NarrowLoad = ReduceLoadWidth(N0.getNode()); + if (NarrowLoad.getNode()) { + if (NarrowLoad.getNode() != N0.getNode()) + CombineTo(N0.getNode(), NarrowLoad); return DAG.getNode(ISD::ANY_EXTEND, VT, NarrowLoad); } } @@ -3076,7 +3076,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { } // fold (aext (load x)) -> (aext (truncate (extload x))) - if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && + if (ISD::isNON_EXTLoad(N0.getNode()) && N0.hasOneUse() && ((!AfterLegalize && !cast(N0)->isVolatile()) || TLI.isLoadXLegal(ISD::EXTLOAD, N0.getValueType()))) { LoadSDNode *LN0 = cast(N0); @@ -3088,7 +3088,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { LN0->getAlignment()); CombineTo(N, ExtLoad); // Redirect any chain users to the new load. - DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), SDValue(ExtLoad.Val, 1)); + DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), SDValue(ExtLoad.getNode(), 1)); // If any node needs the original loaded value, recompute it. if (!LN0->use_empty()) CombineTo(LN0, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), @@ -3100,7 +3100,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { // fold (aext (sextload x)) -> (aext (truncate (sextload x))) // fold (aext ( extload x)) -> (aext (truncate (extload x))) if (N0.getOpcode() == ISD::LOAD && - !ISD::isNON_EXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && + !ISD::isNON_EXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) && N0.hasOneUse()) { LoadSDNode *LN0 = cast(N0); MVT EVT = LN0->getMemoryVT(); @@ -3111,7 +3111,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), + CombineTo(N0.getNode(), DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad), ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } @@ -3122,7 +3122,7 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { SimplifySelectCC(N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, VT), DAG.getConstant(0, VT), cast(N0.getOperand(2))->get(), true); - if (SCC.Val) + if (SCC.getNode()) return SCC; } @@ -3145,14 +3145,14 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) { break; case ISD::SRL: // Only look at single-use SRLs. - if (!V.Val->hasOneUse()) + if (!V.getNode()->hasOneUse()) break; if (ConstantSDNode *RHSC = dyn_cast(V.getOperand(1))) { // See if we can recursively simplify the LHS. unsigned Amt = RHSC->getValue(); APInt NewMask = Mask << Amt; SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask); - if (SimplifyLHS.Val) { + if (SimplifyLHS.getNode()) { return DAG.getNode(ISD::SRL, V.getValueType(), SimplifyLHS, V.getOperand(1)); } @@ -3221,7 +3221,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { unsigned NewAlign = MinAlign(LN0->getAlignment(), PtrOff); SDValue NewPtr = DAG.getNode(ISD::ADD, PtrType, LN0->getBasePtr(), DAG.getConstant(PtrOff, PtrType)); - AddToWorkList(NewPtr.Val); + AddToWorkList(NewPtr.getNode()); SDValue Load = (ExtType == ISD::NON_EXTLOAD) ? DAG.getLoad(VT, LN0->getChain(), NewPtr, LN0->getSrcValue(), LN0->getSrcValueOffset() + PtrOff, @@ -3234,9 +3234,9 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { WorkListRemover DeadNodes(*this); DAG.ReplaceAllUsesOfValueWith(N0.getValue(1), Load.getValue(1), &DeadNodes); - CombineTo(N->getOperand(0).Val, Load); + CombineTo(N->getOperand(0).getNode(), Load); } else - CombineTo(N0.Val, Load, Load.getValue(1)); + CombineTo(N0.getNode(), Load, Load.getValue(1)); if (ShAmt) { if (Opc == ISD::SIGN_EXTEND_INREG) return DAG.getNode(Opc, VT, Load, N->getOperand(1)); @@ -3293,7 +3293,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { // fold (sext_in_reg (load x)) -> (smaller sextload x) // fold (sext_in_reg (srl (load x), c)) -> (smaller sextload (x+c/evtbits)) SDValue NarrowLoad = ReduceLoadWidth(N); - if (NarrowLoad.Val) + if (NarrowLoad.getNode()) return NarrowLoad; // fold (sext_in_reg (srl X, 24), i8) -> sra X, 24 @@ -3311,8 +3311,8 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { } // fold (sext_inreg (extload x)) -> (sextload x) - if (ISD::isEXTLoad(N0.Val) && - ISD::isUNINDEXEDLoad(N0.Val) && + if (ISD::isEXTLoad(N0.getNode()) && + ISD::isUNINDEXEDLoad(N0.getNode()) && EVT == cast(N0)->getMemoryVT() && ((!AfterLegalize && !cast(N0)->isVolatile()) || TLI.isLoadXLegal(ISD::SEXTLOAD, EVT))) { @@ -3323,11 +3323,11 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use - if (ISD::isZEXTLoad(N0.Val) && ISD::isUNINDEXEDLoad(N0.Val) && + if (ISD::isZEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) && N0.hasOneUse() && EVT == cast(N0)->getMemoryVT() && ((!AfterLegalize && !cast(N0)->isVolatile()) || @@ -3339,7 +3339,7 @@ SDValue DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, ExtLoad, ExtLoad.getValue(1)); + CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! } return SDValue(); @@ -3379,7 +3379,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { SDValue Shorter = GetDemandedBits(N0, APInt::getLowBitsSet(N0.getValueSizeInBits(), VT.getSizeInBits())); - if (Shorter.Val) + if (Shorter.getNode()) return DAG.getNode(ISD::TRUNCATE, VT, Shorter); // fold (truncate (load x)) -> (smaller load x) @@ -3390,8 +3390,8 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { static SDNode *getBuildPairElt(SDNode *N, unsigned i) { SDValue Elt = N->getOperand(i); if (Elt.getOpcode() != ISD::MERGE_VALUES) - return Elt.Val; - return Elt.getOperand(Elt.getResNo()).Val; + return Elt.getNode(); + return Elt.getOperand(Elt.getResNo()).getNode(); } /// CombineConsecutiveLoads - build_pair (load, load) -> load @@ -3434,7 +3434,7 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { // on the bitconvert. // First check to see if this is all constant. if (!AfterLegalize && - N0.getOpcode() == ISD::BUILD_VECTOR && N0.Val->hasOneUse() && + N0.getOpcode() == ISD::BUILD_VECTOR && N0.getNode()->hasOneUse() && VT.isVector()) { bool isSimple = true; for (unsigned i = 0, e = N0.getNumOperands(); i != e; ++i) @@ -3449,14 +3449,14 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { assert(!DestEltVT.isVector() && "Element type of vector ValueType must not be vector!"); if (isSimple) { - return ConstantFoldBIT_CONVERTofBUILD_VECTOR(N0.Val, DestEltVT); + return ConstantFoldBIT_CONVERTofBUILD_VECTOR(N0.getNode(), DestEltVT); } } // If the input is a constant, let getNode() fold it. if (isa(N0) || isa(N0)) { SDValue Res = DAG.getNode(ISD::BIT_CONVERT, VT, N0); - if (Res.Val != N) return Res; + if (Res.getNode() != N) return Res; } if (N0.getOpcode() == ISD::BIT_CONVERT) // conv(conv(x,t1),t2) -> conv(x,t2) @@ -3464,7 +3464,7 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { // fold (conv (load x)) -> (load (conv*)x) // If the resultant load doesn't need a higher alignment than the original! - if (ISD::isNormalLoad(N0.Val) && N0.hasOneUse() && + if (ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && // Do not change the width of a volatile load. !cast(N0)->isVolatile() && (!AfterLegalize || TLI.isOperationLegal(ISD::LOAD, VT))) { @@ -3477,7 +3477,7 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { LN0->getSrcValue(), LN0->getSrcValueOffset(), LN0->isVolatile(), OrigAlign); AddToWorkList(N); - CombineTo(N0.Val, DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load), + CombineTo(N0.getNode(), DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load), Load.getValue(1)); return Load; } @@ -3487,9 +3487,9 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { // Fold bitconvert(fabs(x)) -> and(bitconvert(x), ~signbit) // This often reduces constant pool loads. if ((N0.getOpcode() == ISD::FNEG || N0.getOpcode() == ISD::FABS) && - N0.Val->hasOneUse() && VT.isInteger() && !VT.isVector()) { + N0.getNode()->hasOneUse() && VT.isInteger() && !VT.isVector()) { SDValue NewConv = DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0)); - AddToWorkList(NewConv.Val); + AddToWorkList(NewConv.getNode()); APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); if (N0.getOpcode() == ISD::FNEG) @@ -3501,45 +3501,45 @@ SDValue DAGCombiner::visitBIT_CONVERT(SDNode *N) { // Fold bitconvert(fcopysign(cst, x)) -> bitconvert(x)&sign | cst&~sign' // Note that we don't handle copysign(x,cst) because this can always be folded // to an fneg or fabs. - if (N0.getOpcode() == ISD::FCOPYSIGN && N0.Val->hasOneUse() && + if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse() && isa(N0.getOperand(0)) && VT.isInteger() && !VT.isVector()) { unsigned OrigXWidth = N0.getOperand(1).getValueType().getSizeInBits(); SDValue X = DAG.getNode(ISD::BIT_CONVERT, MVT::getIntegerVT(OrigXWidth), N0.getOperand(1)); - AddToWorkList(X.Val); + AddToWorkList(X.getNode()); // If X has a different width than the result/lhs, sext it or truncate it. unsigned VTWidth = VT.getSizeInBits(); if (OrigXWidth < VTWidth) { X = DAG.getNode(ISD::SIGN_EXTEND, VT, X); - AddToWorkList(X.Val); + AddToWorkList(X.getNode()); } else if (OrigXWidth > VTWidth) { // To get the sign bit in the right place, we have to shift it right // before truncating. X = DAG.getNode(ISD::SRL, X.getValueType(), X, DAG.getConstant(OrigXWidth-VTWidth, X.getValueType())); - AddToWorkList(X.Val); + AddToWorkList(X.getNode()); X = DAG.getNode(ISD::TRUNCATE, VT, X); - AddToWorkList(X.Val); + AddToWorkList(X.getNode()); } APInt SignBit = APInt::getSignBit(VT.getSizeInBits()); X = DAG.getNode(ISD::AND, VT, X, DAG.getConstant(SignBit, VT)); - AddToWorkList(X.Val); + AddToWorkList(X.getNode()); SDValue Cst = DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0)); Cst = DAG.getNode(ISD::AND, VT, Cst, DAG.getConstant(~SignBit, VT)); - AddToWorkList(Cst.Val); + AddToWorkList(Cst.getNode()); return DAG.getNode(ISD::OR, VT, X, Cst); } // bitconvert(build_pair(ld, ld)) -> ld iff load locations are consecutive. if (N0.getOpcode() == ISD::BUILD_PAIR) { - SDValue CombineLD = CombineConsecutiveLoads(N0.Val, VT); - if (CombineLD.Val) + SDValue CombineLD = CombineConsecutiveLoads(N0.getNode(), VT); + if (CombineLD.getNode()) return CombineLD; } @@ -3570,7 +3570,7 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT DstEltVT) { SmallVector Ops; for (unsigned i = 0, e = BV->getNumOperands(); i != e; ++i) { Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, DstEltVT, BV->getOperand(i))); - AddToWorkList(Ops.back().Val); + AddToWorkList(Ops.back().getNode()); } MVT VT = MVT::getVectorVT(DstEltVT, BV->getValueType(0).getVectorNumElements()); @@ -3585,7 +3585,7 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT DstEltVT) { // same sizes. assert((SrcEltVT == MVT::f32 || SrcEltVT == MVT::f64) && "Unknown FP VT!"); MVT IntVT = MVT::getIntegerVT(SrcEltVT.getSizeInBits()); - BV = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, IntVT).Val; + BV = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, IntVT).getNode(); SrcEltVT = IntVT; } @@ -3594,7 +3594,7 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT DstEltVT) { if (DstEltVT.isFloatingPoint()) { assert((DstEltVT == MVT::f32 || DstEltVT == MVT::f64) && "Unknown FP VT!"); MVT TmpVT = MVT::getIntegerVT(DstEltVT.getSizeInBits()); - SDNode *Tmp = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, TmpVT).Val; + SDNode *Tmp = ConstantFoldBIT_CONVERTofBUILD_VECTOR(BV, TmpVT).getNode(); // Next, convert to FP elements of the same size. return ConstantFoldBIT_CONVERTofBUILD_VECTOR(Tmp, DstEltVT); @@ -3674,7 +3674,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (fadd c1, c2) -> c1+c2 @@ -3694,7 +3694,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) { // If allowed, fold (fadd (fadd x, c1), c2) -> (fadd x, (fadd c1, c2)) if (UnsafeFPMath && N1CFP && N0.getOpcode() == ISD::FADD && - N0.Val->hasOneUse() && isa(N0.getOperand(1))) + N0.getNode()->hasOneUse() && isa(N0.getOperand(1))) return DAG.getNode(ISD::FADD, VT, N0.getOperand(0), DAG.getNode(ISD::FADD, VT, N0.getOperand(1), N1)); @@ -3711,7 +3711,7 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (fsub c1, c2) -> c1-c2 @@ -3741,7 +3741,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (fmul c1, c2) -> c1*c2 @@ -3771,7 +3771,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) { // If allowed, fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2)) if (UnsafeFPMath && N1CFP && N0.getOpcode() == ISD::FMUL && - N0.Val->hasOneUse() && isa(N0.getOperand(1))) + N0.getNode()->hasOneUse() && isa(N0.getOperand(1))) return DAG.getNode(ISD::FMUL, VT, N0.getOperand(0), DAG.getNode(ISD::FMUL, VT, N0.getOperand(1), N1)); @@ -3788,7 +3788,7 @@ SDValue DAGCombiner::visitFDIV(SDNode *N) { // fold vector ops if (VT.isVector()) { SDValue FoldedVOp = SimplifyVBinOp(N); - if (FoldedVOp.Val) return FoldedVOp; + if (FoldedVOp.getNode()) return FoldedVOp; } // fold (fdiv c1, c2) -> c1/c2 @@ -3955,15 +3955,15 @@ SDValue DAGCombiner::visitFP_ROUND(SDNode *N) { if (N0.getOpcode() == ISD::FP_ROUND) { // This is a value preserving truncation if both round's are. bool IsTrunc = N->getConstantOperandVal(1) == 1 && - N0.Val->getConstantOperandVal(1) == 1; + N0.getNode()->getConstantOperandVal(1) == 1; return DAG.getNode(ISD::FP_ROUND, VT, N0.getOperand(0), DAG.getIntPtrConstant(IsTrunc)); } // fold (fp_round (copysign X, Y)) -> (copysign (fp_round X), Y) - if (N0.getOpcode() == ISD::FCOPYSIGN && N0.Val->hasOneUse()) { + if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse()) { SDValue Tmp = DAG.getNode(ISD::FP_ROUND, VT, N0.getOperand(0), N1); - AddToWorkList(Tmp.Val); + AddToWorkList(Tmp.getNode()); return DAG.getNode(ISD::FCOPYSIGN, VT, Tmp, N0.getOperand(1)); } @@ -4000,7 +4000,7 @@ SDValue DAGCombiner::visitFP_EXTEND(SDNode *N) { // Turn fp_extend(fp_round(X, 1)) -> x since the fp_round doesn't affect the // value of X. - if (N0.getOpcode() == ISD::FP_ROUND && N0.Val->getConstantOperandVal(1) == 1){ + if (N0.getOpcode() == ISD::FP_ROUND && N0.getNode()->getConstantOperandVal(1) == 1){ SDValue In = N0.getOperand(0); if (In.getValueType() == VT) return In; if (VT.bitsLT(In.getValueType())) @@ -4009,7 +4009,7 @@ SDValue DAGCombiner::visitFP_EXTEND(SDNode *N) { } // fold (fpext (load x)) -> (fpext (fptrunc (extload x))) - if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() && + if (ISD::isNON_EXTLoad(N0.getNode()) && N0.hasOneUse() && ((!AfterLegalize && !cast(N0)->isVolatile()) || TLI.isLoadXLegal(ISD::EXTLOAD, N0.getValueType()))) { LoadSDNode *LN0 = cast(N0); @@ -4020,7 +4020,7 @@ SDValue DAGCombiner::visitFP_EXTEND(SDNode *N) { LN0->isVolatile(), LN0->getAlignment()); CombineTo(N, ExtLoad); - CombineTo(N0.Val, DAG.getNode(ISD::FP_ROUND, N0.getValueType(), ExtLoad, + CombineTo(N0.getNode(), DAG.getNode(ISD::FP_ROUND, N0.getValueType(), ExtLoad, DAG.getIntPtrConstant(1)), ExtLoad.getValue(1)); return SDValue(N, 0); // Return N so it doesn't get rechecked! @@ -4037,7 +4037,7 @@ SDValue DAGCombiner::visitFNEG(SDNode *N) { // Transform fneg(bitconvert(x)) -> bitconvert(x^sign) to avoid loading // constant pool values. - if (N0.getOpcode() == ISD::BIT_CONVERT && N0.Val->hasOneUse() && + if (N0.getOpcode() == ISD::BIT_CONVERT && N0.getNode()->hasOneUse() && N0.getOperand(0).getValueType().isInteger() && !N0.getOperand(0).getValueType().isVector()) { SDValue Int = N0.getOperand(0); @@ -4045,7 +4045,7 @@ SDValue DAGCombiner::visitFNEG(SDNode *N) { if (IntVT.isInteger() && !IntVT.isVector()) { Int = DAG.getNode(ISD::XOR, IntVT, Int, DAG.getConstant(IntVT.getIntegerVTSignBit(), IntVT)); - AddToWorkList(Int.Val); + AddToWorkList(Int.getNode()); return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Int); } } @@ -4071,7 +4071,7 @@ SDValue DAGCombiner::visitFABS(SDNode *N) { // Transform fabs(bitconvert(x)) -> bitconvert(x&~sign) to avoid loading // constant pool values. - if (N0.getOpcode() == ISD::BIT_CONVERT && N0.Val->hasOneUse() && + if (N0.getOpcode() == ISD::BIT_CONVERT && N0.getNode()->hasOneUse() && N0.getOperand(0).getValueType().isInteger() && !N0.getOperand(0).getValueType().isVector()) { SDValue Int = N0.getOperand(0); @@ -4079,7 +4079,7 @@ SDValue DAGCombiner::visitFABS(SDNode *N) { if (IntVT.isInteger() && !IntVT.isVector()) { Int = DAG.getNode(ISD::AND, IntVT, Int, DAG.getConstant(~IntVT.getIntegerVTSignBit(), IntVT)); - AddToWorkList(Int.Val); + AddToWorkList(Int.getNode()); return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Int); } } @@ -4117,9 +4117,9 @@ SDValue DAGCombiner::visitBR_CC(SDNode *N) { // Use SimplifySetCC to simplify SETCC's. SDValue Simp = SimplifySetCC(MVT::i1, CondLHS, CondRHS, CC->get(), false); - if (Simp.Val) AddToWorkList(Simp.Val); + if (Simp.getNode()) AddToWorkList(Simp.getNode()); - ConstantSDNode *SCCC = dyn_cast_or_null(Simp.Val); + ConstantSDNode *SCCC = dyn_cast_or_null(Simp.getNode()); // fold br_cc true, dest -> br dest (unconditional branch) if (SCCC && !SCCC->isNullValue()) @@ -4130,7 +4130,7 @@ SDValue DAGCombiner::visitBR_CC(SDNode *N) { return N->getOperand(0); // fold to a simpler setcc - if (Simp.Val && Simp.getOpcode() == ISD::SETCC) + if (Simp.getNode() && Simp.getOpcode() == ISD::SETCC) return DAG.getNode(ISD::BR_CC, MVT::Other, N->getOperand(0), Simp.getOperand(2), Simp.getOperand(0), Simp.getOperand(1), N->getOperand(4)); @@ -4174,7 +4174,7 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { // If the pointer is not an add/sub, or if it doesn't have multiple uses, bail // out. There is no reason to make this a preinc/predec. if ((Ptr.getOpcode() != ISD::ADD && Ptr.getOpcode() != ISD::SUB) || - Ptr.Val->hasOneUse()) + Ptr.getNode()->hasOneUse()) return false; // Ask the target to do addressing mode selection. @@ -4204,14 +4204,14 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { // Check #2. if (!isLoad) { SDValue Val = cast(N)->getValue(); - if (Val == BasePtr || BasePtr.Val->isPredecessorOf(Val.Val)) + if (Val == BasePtr || BasePtr.getNode()->isPredecessorOf(Val.getNode())) return false; } // Now check for #3 and #4. bool RealUse = false; - for (SDNode::use_iterator I = Ptr.Val->use_begin(), - E = Ptr.Val->use_end(); I != E; ++I) { + for (SDNode::use_iterator I = Ptr.getNode()->use_begin(), + E = Ptr.getNode()->use_end(); I != E; ++I) { SDNode *Use = *I; if (Use == N) continue; @@ -4235,7 +4235,7 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { ++PreIndexedNodes; ++NodesCombined; DOUT << "\nReplacing.4 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(Result.Val->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(Result.getNode()->dump(&DAG)); DOUT << '\n'; WorkListRemover DeadNodes(*this); if (isLoad) { @@ -4254,8 +4254,8 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { // Replace the uses of Ptr with uses of the updated base value. DAG.ReplaceAllUsesOfValueWith(Ptr, Result.getValue(isLoad ? 1 : 0), &DeadNodes); - removeFromWorkList(Ptr.Val); - DAG.DeleteNode(Ptr.Val); + removeFromWorkList(Ptr.getNode()); + DAG.DeleteNode(Ptr.getNode()); return true; } @@ -4292,11 +4292,11 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { } else return false; - if (Ptr.Val->hasOneUse()) + if (Ptr.getNode()->hasOneUse()) return false; - for (SDNode::use_iterator I = Ptr.Val->use_begin(), - E = Ptr.Val->use_end(); I != E; ++I) { + for (SDNode::use_iterator I = Ptr.getNode()->use_begin(), + E = Ptr.getNode()->use_end(); I != E; ++I) { SDNode *Op = *I; if (Op == N || (Op->getOpcode() != ISD::ADD && Op->getOpcode() != ISD::SUB)) @@ -4323,10 +4323,10 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { // Check for #1. bool TryNext = false; - for (SDNode::use_iterator II = BasePtr.Val->use_begin(), - EE = BasePtr.Val->use_end(); II != EE; ++II) { + for (SDNode::use_iterator II = BasePtr.getNode()->use_begin(), + EE = BasePtr.getNode()->use_end(); II != EE; ++II) { SDNode *Use = *II; - if (Use == Ptr.Val) + if (Use == Ptr.getNode()) continue; // If all the uses are load / store addresses, then don't do the @@ -4337,9 +4337,9 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { EEE = Use->use_end(); III != EEE; ++III) { SDNode *UseUse = *III; if (!((UseUse->getOpcode() == ISD::LOAD && - cast(UseUse)->getBasePtr().Val == Use) || + cast(UseUse)->getBasePtr().getNode() == Use) || (UseUse->getOpcode() == ISD::STORE && - cast(UseUse)->getBasePtr().Val == Use))) + cast(UseUse)->getBasePtr().getNode() == Use))) RealUse = true; } @@ -4360,7 +4360,7 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { ++PostIndexedNodes; ++NodesCombined; DOUT << "\nReplacing.5 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(Result.Val->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(Result.getNode()->dump(&DAG)); DOUT << '\n'; WorkListRemover DeadNodes(*this); if (isLoad) { @@ -4463,7 +4463,7 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) { // Now we replace use of chain2 with chain1. This makes the second load // isomorphic to the one we are deleting, and thus makes this load live. DOUT << "\nReplacing.6 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith chain: "; DEBUG(Chain.Val->dump(&DAG)); + DOUT << "\nWith chain: "; DEBUG(Chain.getNode()->dump(&DAG)); DOUT << "\n"; WorkListRemover DeadNodes(*this); DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), Chain, &DeadNodes); @@ -4479,7 +4479,7 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) { if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) { SDValue Undef = DAG.getNode(ISD::UNDEF, N->getValueType(0)); DOUT << "\nReplacing.6 "; DEBUG(N->dump(&DAG)); - DOUT << "\nWith: "; DEBUG(Undef.Val->dump(&DAG)); + DOUT << "\nWith: "; DEBUG(Undef.getNode()->dump(&DAG)); DOUT << " and 2 other values\n"; WorkListRemover DeadNodes(*this); DAG.ReplaceAllUsesOfValueWith(SDValue(N, 0), Undef, &DeadNodes); @@ -4500,7 +4500,7 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) { // TODO: Handle TRUNCSTORE/LOADEXT if (LD->getExtensionType() == ISD::NON_EXTLOAD && !LD->isVolatile()) { - if (ISD::isNON_TRUNCStore(Chain.Val)) { + if (ISD::isNON_TRUNCStore(Chain.getNode())) { StoreSDNode *PrevST = cast(Chain); if (PrevST->getBasePtr() == Ptr && PrevST->getValue().getValueType() == N->getValueType(0)) @@ -4684,8 +4684,8 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) { GetDemandedBits(Value, APInt::getLowBitsSet(Value.getValueSizeInBits(), ST->getMemoryVT().getSizeInBits())); - AddToWorkList(Value.Val); - if (Shorter.Val) + AddToWorkList(Value.getNode()); + if (Shorter.getNode()) return DAG.getTruncStore(Chain, Shorter, Ptr, ST->getSrcValue(), ST->getSrcValueOffset(), ST->getMemoryVT(), ST->isVolatile(), ST->getAlignment()); @@ -4715,7 +4715,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) { // If this is an FP_ROUND or TRUNC followed by a store, fold this into a // truncating store. We can do this even if this is already a truncstore. if ((Value.getOpcode() == ISD::FP_ROUND || Value.getOpcode() == ISD::TRUNCATE) - && Value.Val->hasOneUse() && ST->isUnindexed() && + && Value.getNode()->hasOneUse() && ST->isUnindexed() && TLI.isTruncStoreLegal(Value.getOperand(0).getValueType(), ST->getMemoryVT())) { return DAG.getTruncStore(Chain, Value.getOperand(0), Ptr, ST->getSrcValue(), @@ -4735,7 +4735,7 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) { // vector with the inserted element. if (InVec.getOpcode() == ISD::BUILD_VECTOR && isa(EltNo)) { unsigned Elt = cast(EltNo)->getValue(); - SmallVector Ops(InVec.Val->op_begin(), InVec.Val->op_end()); + SmallVector Ops(InVec.getNode()->op_begin(), InVec.getNode()->op_end()); if (Elt < Ops.size()) Ops[Elt] = InVal; return DAG.getNode(ISD::BUILD_VECTOR, InVec.getValueType(), @@ -4773,11 +4773,11 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) { } LoadSDNode *LN0 = NULL; - if (ISD::isNormalLoad(InVec.Val)) + if (ISD::isNormalLoad(InVec.getNode())) LN0 = cast(InVec); else if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR && InVec.getOperand(0).getValueType() == EVT && - ISD::isNormalLoad(InVec.getOperand(0).Val)) { + ISD::isNormalLoad(InVec.getOperand(0).getNode())) { LN0 = cast(InVec.getOperand(0)); } else if (InVec.getOpcode() == ISD::VECTOR_SHUFFLE) { // (vextract (vector_shuffle (load $addr), v2, <1, u, u, u>), 1) @@ -4789,7 +4789,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) { InVec = (Idx < NumElems) ? InVec.getOperand(0) : InVec.getOperand(1); if (InVec.getOpcode() == ISD::BIT_CONVERT) InVec = InVec.getOperand(0); - if (ISD::isNormalLoad(InVec.Val)) { + if (ISD::isNormalLoad(InVec.getNode())) { LN0 = cast(InVec); Elt = (Idx < NumElems) ? Idx : Idx - NumElems; } @@ -4859,9 +4859,9 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { if (ExtractedFromVec == VecIn1 || ExtractedFromVec == VecIn2) continue; - if (VecIn1.Val == 0) { + if (VecIn1.getNode() == 0) { VecIn1 = ExtractedFromVec; - } else if (VecIn2.Val == 0) { + } else if (VecIn2.getNode() == 0) { VecIn2 = ExtractedFromVec; } else { // Too many inputs. @@ -4871,7 +4871,7 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { } // If everything is good, we can make a shuffle operation. - if (VecIn1.Val) { + if (VecIn1.getNode()) { SmallVector BuildVecIndices; for (unsigned i = 0; i != NumInScalars; ++i) { if (N->getOperand(i).getOpcode() == ISD::UNDEF) { @@ -4898,7 +4898,7 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { // Return the new VECTOR_SHUFFLE node. SDValue Ops[5]; Ops[0] = VecIn1; - if (VecIn2.Val) { + if (VecIn2.getNode()) { Ops[1] = VecIn2; } else { // Use an undef build_vector as input for the second operand. @@ -4907,7 +4907,7 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { EltType)); Ops[1] = DAG.getNode(ISD::BUILD_VECTOR, VT, &UnOps[0], UnOps.size()); - AddToWorkList(Ops[1].Val); + AddToWorkList(Ops[1].getNode()); } Ops[2] = DAG.getNode(ISD::BUILD_VECTOR, BuildVecVT, &BuildVecIndices[0], BuildVecIndices.size()); @@ -4989,7 +4989,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { // If it is a splat, check if the argument vector is a build_vector with // all scalar elements the same. if (isSplat) { - SDNode *V = N0.Val; + SDNode *V = N0.getNode(); // If this is a bit convert that changes the element type of the vector but // not the number of vector elements, look through it. Be careful not to @@ -4998,7 +4998,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { SDValue ConvInput = V->getOperand(0); if (ConvInput.getValueType().isVector() && ConvInput.getValueType().getVectorNumElements() == NumElts) - V = ConvInput.Val; + V = ConvInput.getNode(); } if (V->getOpcode() == ISD::BUILD_VECTOR) { @@ -5013,7 +5013,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { } } // Splat of , return - if (!Base.Val) + if (!Base.getNode()) return N0; for (unsigned i = 0; i != NumElems; ++i) { if (V->getOperand(i) != Base) { @@ -5047,7 +5047,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { } ShufMask = DAG.getNode(ISD::BUILD_VECTOR, ShufMask.getValueType(), &MappedOps[0], MappedOps.size()); - AddToWorkList(ShufMask.Val); + AddToWorkList(ShufMask.getNode()); return DAG.getNode(ISD::VECTOR_SHUFFLE, N->getValueType(0), N0, DAG.getNode(ISD::UNDEF, N->getValueType(0)), @@ -5093,7 +5093,7 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) { std::vector Ops; LHS = DAG.getNode(ISD::BIT_CONVERT, VT, LHS); Ops.push_back(LHS); - AddToWorkList(LHS.Val); + AddToWorkList(LHS.getNode()); std::vector ZeroOps(NumElts, DAG.getConstant(0, EVT)); Ops.push_back(DAG.getNode(ISD::BUILD_VECTOR, VT, &ZeroOps[0], ZeroOps.size())); @@ -5123,7 +5123,7 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) { SDValue LHS = N->getOperand(0); SDValue RHS = N->getOperand(1); SDValue Shuffle = XformToShuffleWithZero(N); - if (Shuffle.Val) return Shuffle; + if (Shuffle.getNode()) return Shuffle; // If the LHS and RHS are BUILD_VECTOR nodes, see if we can constant fold // this operation. @@ -5145,13 +5145,13 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) { if (N->getOpcode() == ISD::SDIV || N->getOpcode() == ISD::UDIV || N->getOpcode() == ISD::FDIV) { if ((RHSOp.getOpcode() == ISD::Constant && - cast(RHSOp.Val)->isNullValue()) || + cast(RHSOp.getNode())->isNullValue()) || (RHSOp.getOpcode() == ISD::ConstantFP && - cast(RHSOp.Val)->getValueAPF().isZero())) + cast(RHSOp.getNode())->getValueAPF().isZero())) break; } Ops.push_back(DAG.getNode(N->getOpcode(), EltType, LHSOp, RHSOp)); - AddToWorkList(Ops.back().Val); + AddToWorkList(Ops.back().getNode()); assert((Ops.back().getOpcode() == ISD::UNDEF || Ops.back().getOpcode() == ISD::Constant || Ops.back().getOpcode() == ISD::ConstantFP) && @@ -5175,14 +5175,14 @@ SDValue DAGCombiner::SimplifySelect(SDValue N0, SDValue N1, SDValue N2){ // If we got a simplified select_cc node back from SimplifySelectCC, then // break it down into a new SETCC node, and a new SELECT node, and then return // the SELECT node, since we were called with a SELECT node. - if (SCC.Val) { + if (SCC.getNode()) { // Check to see if we got a select_cc back (to turn into setcc/select). // Otherwise, just return whatever node we got back, like fabs. if (SCC.getOpcode() == ISD::SELECT_CC) { SDValue SETCC = DAG.getNode(ISD::SETCC, N0.getValueType(), SCC.getOperand(0), SCC.getOperand(1), SCC.getOperand(4)); - AddToWorkList(SETCC.Val); + AddToWorkList(SETCC.getNode()); return DAG.getNode(ISD::SELECT, SCC.getValueType(), SCC.getOperand(2), SCC.getOperand(3), SETCC); } @@ -5226,8 +5226,8 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS, if (TheSelect->getOpcode() == ISD::SELECT) { // Check that the condition doesn't reach either load. If so, folding // this will induce a cycle into the DAG. - if (!LLD->isPredecessorOf(TheSelect->getOperand(0).Val) && - !RLD->isPredecessorOf(TheSelect->getOperand(0).Val)) { + if (!LLD->isPredecessorOf(TheSelect->getOperand(0).getNode()) && + !RLD->isPredecessorOf(TheSelect->getOperand(0).getNode())) { Addr = DAG.getNode(ISD::SELECT, LLD->getBasePtr().getValueType(), TheSelect->getOperand(0), LLD->getBasePtr(), RLD->getBasePtr()); @@ -5235,10 +5235,10 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS, } else { // Check that the condition doesn't reach either load. If so, folding // this will induce a cycle into the DAG. - if (!LLD->isPredecessorOf(TheSelect->getOperand(0).Val) && - !RLD->isPredecessorOf(TheSelect->getOperand(0).Val) && - !LLD->isPredecessorOf(TheSelect->getOperand(1).Val) && - !RLD->isPredecessorOf(TheSelect->getOperand(1).Val)) { + if (!LLD->isPredecessorOf(TheSelect->getOperand(0).getNode()) && + !RLD->isPredecessorOf(TheSelect->getOperand(0).getNode()) && + !LLD->isPredecessorOf(TheSelect->getOperand(1).getNode()) && + !RLD->isPredecessorOf(TheSelect->getOperand(1).getNode())) { Addr = DAG.getNode(ISD::SELECT_CC, LLD->getBasePtr().getValueType(), TheSelect->getOperand(0), TheSelect->getOperand(1), @@ -5247,7 +5247,7 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS, } } - if (Addr.Val) { + if (Addr.getNode()) { SDValue Load; if (LLD->getExtensionType() == ISD::NON_EXTLOAD) Load = DAG.getLoad(TheSelect->getValueType(0), LLD->getChain(), @@ -5269,8 +5269,8 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS, // Users of the old loads now use the new load's chain. We know the // old-load value is dead now. - CombineTo(LHS.Val, Load.getValue(0), Load.getValue(1)); - CombineTo(RHS.Val, Load.getValue(0), Load.getValue(1)); + CombineTo(LHS.getNode(), Load.getValue(0), Load.getValue(1)); + CombineTo(RHS.getNode(), Load.getValue(0), Load.getValue(1)); return true; } } @@ -5285,14 +5285,14 @@ SDValue DAGCombiner::SimplifySelectCC(SDValue N0, SDValue N1, ISD::CondCode CC, bool NotExtCompare) { MVT VT = N2.getValueType(); - ConstantSDNode *N1C = dyn_cast(N1.Val); - ConstantSDNode *N2C = dyn_cast(N2.Val); - ConstantSDNode *N3C = dyn_cast(N3.Val); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); + ConstantSDNode *N2C = dyn_cast(N2.getNode()); + ConstantSDNode *N3C = dyn_cast(N3.getNode()); // Determine if the condition we're dealing with is constant SDValue SCC = SimplifySetCC(TLI.getSetCCResultType(N0), N0, N1, CC, false); - if (SCC.Val) AddToWorkList(SCC.Val); - ConstantSDNode *SCCC = dyn_cast_or_null(SCC.Val); + if (SCC.getNode()) AddToWorkList(SCC.getNode()); + ConstantSDNode *SCCC = dyn_cast_or_null(SCC.getNode()); // fold select_cc true, x, y -> x if (SCCC && !SCCC->isNullValue()) @@ -5336,20 +5336,20 @@ SDValue DAGCombiner::SimplifySelectCC(SDValue N0, SDValue N1, ShCtV = XType.getSizeInBits()-ShCtV-1; SDValue ShCt = DAG.getConstant(ShCtV, TLI.getShiftAmountTy()); SDValue Shift = DAG.getNode(ISD::SRL, XType, N0, ShCt); - AddToWorkList(Shift.Val); + AddToWorkList(Shift.getNode()); if (XType.bitsGT(AType)) { Shift = DAG.getNode(ISD::TRUNCATE, AType, Shift); - AddToWorkList(Shift.Val); + AddToWorkList(Shift.getNode()); } return DAG.getNode(ISD::AND, AType, Shift, N2); } SDValue Shift = DAG.getNode(ISD::SRA, XType, N0, DAG.getConstant(XType.getSizeInBits()-1, TLI.getShiftAmountTy())); - AddToWorkList(Shift.Val); + AddToWorkList(Shift.getNode()); if (XType.bitsGT(AType)) { Shift = DAG.getNode(ISD::TRUNCATE, AType, Shift); - AddToWorkList(Shift.Val); + AddToWorkList(Shift.getNode()); } return DAG.getNode(ISD::AND, AType, Shift, N2); } @@ -5379,8 +5379,8 @@ SDValue DAGCombiner::SimplifySelectCC(SDValue N0, SDValue N1, SCC = DAG.getSetCC(MVT::i1, N0, N1, CC); Temp = DAG.getNode(ISD::ZERO_EXTEND, N2.getValueType(), SCC); } - AddToWorkList(SCC.Val); - AddToWorkList(Temp.Val); + AddToWorkList(SCC.getNode()); + AddToWorkList(Temp.getNode()); if (N2C->getAPIntValue() == 1) return Temp; @@ -5442,8 +5442,8 @@ SDValue DAGCombiner::SimplifySelectCC(SDValue N0, SDValue N1, DAG.getConstant(XType.getSizeInBits()-1, TLI.getShiftAmountTy())); SDValue Add = DAG.getNode(ISD::ADD, XType, N0, Shift); - AddToWorkList(Shift.Val); - AddToWorkList(Add.Val); + AddToWorkList(Shift.getNode()); + AddToWorkList(Add.getNode()); return DAG.getNode(ISD::XOR, XType, Add, Shift); } // Check to see if this is an integer abs. select_cc setgt X, -1, X, -X -> @@ -5457,8 +5457,8 @@ SDValue DAGCombiner::SimplifySelectCC(SDValue N0, SDValue N1, DAG.getConstant(XType.getSizeInBits()-1, TLI.getShiftAmountTy())); SDValue Add = DAG.getNode(ISD::ADD, XType, N0, Shift); - AddToWorkList(Shift.Val); - AddToWorkList(Add.Val); + AddToWorkList(Shift.getNode()); + AddToWorkList(Add.getNode()); return DAG.getNode(ISD::XOR, XType, Add, Shift); } } @@ -5612,8 +5612,8 @@ void DAGCombiner::GatherAllAliases(SDNode *N, SDValue OriginalChain, Chains.pop_back(); // Don't bother if we've been before. - if (Visited.find(Chain.Val) != Visited.end()) continue; - Visited.insert(Chain.Val); + if (Visited.find(Chain.getNode()) != Visited.end()) continue; + Visited.insert(Chain.getNode()); switch (Chain.getOpcode()) { case ISD::EntryToken: @@ -5627,7 +5627,7 @@ void DAGCombiner::GatherAllAliases(SDNode *N, SDValue OriginalChain, int64_t OpSize; const Value *OpSrcValue; int OpSrcValueOffset; - bool IsOpLoad = FindAliasInfo(Chain.Val, OpPtr, OpSize, + bool IsOpLoad = FindAliasInfo(Chain.getNode(), OpPtr, OpSize, OpSrcValue, OpSrcValueOffset); // If chain is alias then stop here. @@ -5639,7 +5639,7 @@ void DAGCombiner::GatherAllAliases(SDNode *N, SDValue OriginalChain, // Look further up the chain. Chains.push_back(Chain.getOperand(0)); // Clean up old chain. - AddToWorkList(Chain.Val); + AddToWorkList(Chain.getNode()); } break; } @@ -5652,7 +5652,7 @@ void DAGCombiner::GatherAllAliases(SDNode *N, SDValue OriginalChain, for (unsigned n = Chain.getNumOperands(); n;) Chains.push_back(Chain.getOperand(--n)); // Eliminate the token factor if we can. - AddToWorkList(Chain.Val); + AddToWorkList(Chain.getNode()); break; default: @@ -5684,7 +5684,7 @@ SDValue DAGCombiner::FindBetterChain(SDNode *N, SDValue OldChain) { &Aliases[0], Aliases.size()); // Make sure the old chain gets cleaned up. - if (NewChain != OldChain) AddToWorkList(OldChain.Val); + if (NewChain != OldChain) AddToWorkList(OldChain.getNode()); return NewChain; } diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 91c65e8fbe..8b20052bf0 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -260,7 +260,7 @@ SDNode *SelectionDAGLegalize::isShuffleLegal(MVT VT, SDValue Mask) const { break; } } - return TLI.isShuffleMaskLegal(Mask, VT) ? Mask.Val : 0; + return TLI.isShuffleMaskLegal(Mask, VT) ? Mask.getNode() : 0; } SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag) @@ -350,7 +350,7 @@ static SDNode *FindCallStartFromCallEnd(SDNode *Node) { assert(Node->getOperand(0).getValueType() == MVT::Other && "Node doesn't have a token chain argument!"); - return FindCallStartFromCallEnd(Node->getOperand(0).Val); + return FindCallStartFromCallEnd(Node->getOperand(0).getNode()); } /// LegalizeAllNodesNotLeadingTo - Recursively walk the uses of N, looking to @@ -387,7 +387,7 @@ bool SelectionDAGLegalize::LegalizeAllNodesNotLeadingTo(SDNode *N, SDNode *Dest, bool OperandsLeadToDest = false; for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) OperandsLeadToDest |= // If an operand leads to Dest, so do we. - LegalizeAllNodesNotLeadingTo(N->getOperand(i).Val, Dest, NodesLeadingTo); + LegalizeAllNodesNotLeadingTo(N->getOperand(i).getNode(), Dest, NodesLeadingTo); if (OperandsLeadToDest) { NodesLeadingTo.insert(N); @@ -667,7 +667,7 @@ SDValue SelectionDAGLegalize::UnrollVectorOp(SDValue Op) { MVT VT = Op.getValueType(); assert(isTypeLegal(VT) && "Caller should expand or promote operands that are not legal!"); - assert(Op.Val->getNumValues() == 1 && + assert(Op.getNode()->getNumValues() == 1 && "Can't unroll a vector with multiple results!"); unsigned NE = VT.getVectorNumElements(); MVT EltVT = VT.getVectorElementType(); @@ -733,7 +733,7 @@ PerformInsertVectorEltInMemory(SDValue Vec, SDValue Val, SDValue Idx) { MVT PtrVT = TLI.getPointerTy(); SDValue StackPtr = DAG.CreateStackTemporary(VT); - int SPFI = cast(StackPtr.Val)->getIndex(); + int SPFI = cast(StackPtr.getNode())->getIndex(); // Store the vector. SDValue Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr, @@ -764,7 +764,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { assert(isTypeLegal(Op.getValueType()) && "Caller should expand or promote operands that are not legal!"); - SDNode *Node = Op.Val; + SDNode *Node = Op.getNode(); // If this operation defines any values that cannot be represented in a // register on this target, make sure to expand or promote them. @@ -839,7 +839,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Op, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; // FALLTHROUGH if the target doesn't want to lower this op after all. case TargetLowering::Legal: break; @@ -850,7 +850,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // The only option for these nodes is to custom lower them. If the target // does not custom lower them, then return zero. Tmp1 = TLI.LowerOperation(Op, DAG); - if (Tmp1.Val) + if (Tmp1.getNode()) Result = Tmp1; else Result = DAG.getConstant(0, TLI.getPointerTy()); @@ -861,7 +861,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Legal: Result = DAG.getConstant(0, VT); @@ -881,7 +881,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Legal: { SDValue Ops[] = { DAG.getConstant(0, VT), Tmp1 }; @@ -890,9 +890,9 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } } } - if (Result.Val->getNumValues() == 1) break; + if (Result.getNode()->getNumValues() == 1) break; - assert(Result.Val->getNumValues() == 2 && + assert(Result.getNode()->getNumValues() == 2 && "Cannot return more than two values!"); // Since we produced two values, make sure to remember that we @@ -915,7 +915,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Legal: { SDValue Ops[] = { DAG.getConstant(0, VT), Tmp2 }; @@ -924,9 +924,9 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } } } - if (Result.Val->getNumValues() == 1) break; + if (Result.getNode()->getNumValues() == 1) break; - assert(Result.Val->getNumValues() == 2 && + assert(Result.getNode()->getNumValues() == 2 && "Cannot return more than two values!"); // Since we produced two values, make sure to remember that we @@ -943,7 +943,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "This action is not supported at all!"); case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Legal: // Target does not know, how to lower this, lower to noop @@ -1012,13 +1012,13 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (TLI.getOperationAction(Node->getOpcode(), MVT::Other) == TargetLowering::Custom) { Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) Result = Tmp3; + if (Tmp3.getNode()) Result = Tmp3; } - if (Result.Val->getNumValues() == 1) break; + if (Result.getNode()->getNumValues() == 1) break; // Must have return value and chain result. - assert(Result.Val->getNumValues() == 2 && + assert(Result.getNode()->getNumValues() == 2 && "Cannot return more than two values!"); // Since loads produce two values, make sure to remember that we @@ -1261,7 +1261,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = TLI.LowerOperation(Result, DAG); break; case TargetLowering::Expand: - Result = SDValue(TLI.ReplaceNodeResults(Op.Val, DAG),0); + Result = SDValue(TLI.ReplaceNodeResults(Op.getNode(), DAG),0); break; case TargetLowering::Legal: break; @@ -1280,7 +1280,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (opAction == TargetLowering::Custom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) + if (Tmp1.getNode()) Result = Tmp1; } break; @@ -1298,7 +1298,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Result = Tmp3; break; } @@ -1344,27 +1344,27 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case ISD::CALL: // The only option for this is to custom lower it. Tmp3 = TLI.LowerOperation(Result.getValue(0), DAG); - assert(Tmp3.Val && "Target didn't custom lower this node!"); + assert(Tmp3.getNode() && "Target didn't custom lower this node!"); // A call within a calling sequence must be legalized to something // other than the normal CALLSEQ_END. Violating this gets Legalize // into an infinite loop. assert ((!IsLegalizingCall || Node->getOpcode() != ISD::CALL || - Tmp3.Val->getOpcode() != ISD::CALLSEQ_END) && + Tmp3.getNode()->getOpcode() != ISD::CALLSEQ_END) && "Nested CALLSEQ_START..CALLSEQ_END not supported."); // The number of incoming and outgoing values should match; unless the final // outgoing value is a flag. - assert((Tmp3.Val->getNumValues() == Result.Val->getNumValues() || - (Tmp3.Val->getNumValues() == Result.Val->getNumValues() + 1 && - Tmp3.Val->getValueType(Tmp3.Val->getNumValues() - 1) == + assert((Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() || + (Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() + 1 && + Tmp3.getNode()->getValueType(Tmp3.getNode()->getNumValues() - 1) == MVT::Flag)) && "Lowering call/formal_arguments produced unexpected # results!"); // Since CALL/FORMAL_ARGUMENTS nodes produce multiple values, make sure to // remember that we legalized all of them, so it doesn't get relegalized. - for (unsigned i = 0, e = Tmp3.Val->getNumValues(); i != e; ++i) { - if (Tmp3.Val->getValueType(i) == MVT::Flag) + for (unsigned i = 0, e = Tmp3.getNode()->getNumValues(); i != e; ++i) { + if (Tmp3.getNode()->getValueType(i) == MVT::Flag) continue; Tmp1 = LegalizeOp(Tmp3.getValue(i)); if (Op.getResNo() == i) @@ -1394,13 +1394,13 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "This action is not supported yet!"); case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Result = Tmp3; break; } // FALLTHROUGH case TargetLowering::Expand: - Result = ExpandBUILD_VECTOR(Result.Val); + Result = ExpandBUILD_VECTOR(Result.getNode()); break; } break; @@ -1425,7 +1425,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp4 = TLI.LowerOperation(Result, DAG); - if (Tmp4.Val) { + if (Tmp4.getNode()) { Result = Tmp4; break; } @@ -1485,7 +1485,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Result = Tmp3; break; } @@ -1509,7 +1509,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Result = Tmp3; break; } @@ -1550,7 +1550,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // Convert the shuffle mask to the right # elements. Tmp3 = SDValue(isShuffleLegal(OVT, Node->getOperand(2)), 0); - assert(Tmp3.Val && "Shuffle not legal?"); + assert(Tmp3.getNode() && "Shuffle not legal?"); Result = DAG.getNode(ISD::VECTOR_SHUFFLE, NVT, Tmp1, Tmp2, Tmp3); Result = DAG.getNode(ISD::BIT_CONVERT, OVT, Result); break; @@ -1580,7 +1580,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // are inserted *before* the CALLSEQ_START. {SmallPtrSet NodesLeadingTo; for (unsigned i = 0, e = CallEnd->getNumOperands(); i != e; ++i) - LegalizeAllNodesNotLeadingTo(CallEnd->getOperand(i).Val, Node, + LegalizeAllNodesNotLeadingTo(CallEnd->getOperand(i).getNode(), Node, NodesLeadingTo); } @@ -1624,7 +1624,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case ISD::CALLSEQ_END: // If the CALLSEQ_START node hasn't been legalized first, legalize it. This // will cause this node to be legalized as well as handling libcalls right. - if (LastCALLSEQ_END.Val != Node) { + if (LastCALLSEQ_END.getNode() != Node) { LegalizeOp(SDValue(FindCallStartFromCallEnd(Node), 0)); DenseMap::iterator I = LegalizedNodes.find(Op); assert(I != LegalizedNodes.end() && @@ -1708,7 +1708,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Tmp1, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Tmp1 = LegalizeOp(Tmp3); Tmp2 = LegalizeOp(Tmp3.getValue(1)); } @@ -1797,7 +1797,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Expand: { SDValue Chain = Result.getOperand(0); @@ -1866,7 +1866,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Expand: // Expand brcond's setcc into its constituent parts and create a BR_CC @@ -1899,7 +1899,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // If we didn't get both a LHS and RHS back from LegalizeSetCCOperands, // the LHS is a legal SETCC itself. In this case, we need to compare // the result against zero to select between true and false values. - if (Tmp3.Val == 0) { + if (Tmp3.getNode() == 0) { Tmp3 = DAG.getConstant(0, Tmp2.getValueType()); Tmp4 = DAG.getCondCode(ISD::SETNE); } @@ -1912,7 +1912,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp4 = TLI.LowerOperation(Result, DAG); - if (Tmp4.Val) Result = Tmp4; + if (Tmp4.getNode()) Result = Tmp4; break; } break; @@ -1937,7 +1937,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { unsigned ABIAlignment = TLI.getTargetData()-> getABITypeAlignment(LD->getMemoryVT().getTypeForMVT()); if (LD->getAlignment() < ABIAlignment){ - Result = ExpandUnalignedLoad(cast(Result.Val), DAG, + Result = ExpandUnalignedLoad(cast(Result.getNode()), DAG, TLI); Tmp3 = Result.getOperand(0); Tmp4 = Result.getOperand(1); @@ -1948,7 +1948,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Tmp3, DAG); - if (Tmp1.Val) { + if (Tmp1.getNode()) { Tmp3 = LegalizeOp(Tmp1); Tmp4 = LegalizeOp(Tmp1.getValue(1)); } @@ -2105,7 +2105,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (isCustom) { Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Tmp1 = LegalizeOp(Tmp3); Tmp2 = LegalizeOp(Tmp3.getValue(1)); } @@ -2116,7 +2116,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { unsigned ABIAlignment = TLI.getTargetData()-> getABITypeAlignment(LD->getMemoryVT().getTypeForMVT()); if (LD->getAlignment() < ABIAlignment){ - Result = ExpandUnalignedLoad(cast(Result.Val), DAG, + Result = ExpandUnalignedLoad(cast(Result.getNode()), DAG, TLI); Tmp1 = Result.getOperand(0); Tmp2 = Result.getOperand(1); @@ -2244,13 +2244,13 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (TLI.isBigEndian()) std::swap(Lo, Hi); - if (Hi.Val) + if (Hi.getNode()) Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3); else Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3); Result = LegalizeOp(Result); } else { - SDNode *InVal = Tmp2.Val; + SDNode *InVal = Tmp2.getNode(); int InIx = Tmp2.getResNo(); unsigned NumElems = InVal->getValueType(InIx).getVectorNumElements(); MVT EVT = InVal->getValueType(InIx).getVectorElementType(); @@ -2310,7 +2310,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { ExpandOp(Node->getOperand(i), Lo, Hi); NewValues.push_back(Lo); NewValues.push_back(Node->getOperand(i+1)); - if (Hi.Val) { + if (Hi.getNode()) { NewValues.push_back(Hi); NewValues.push_back(Node->getOperand(i+1)); } @@ -2335,7 +2335,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; } } @@ -2411,13 +2411,13 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { unsigned ABIAlignment = TLI.getTargetData()-> getABITypeAlignment(ST->getMemoryVT().getTypeForMVT()); if (ST->getAlignment() < ABIAlignment) - Result = ExpandUnalignedStore(cast(Result.Val), DAG, + Result = ExpandUnalignedStore(cast(Result.getNode()), DAG, TLI); } break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Promote: assert(VT.isVector() && "Unknown legal promote case!"); @@ -2446,7 +2446,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // the product of the element size in bytes, and the number of elements // in the high half of the vector. if (ST->getValue().getValueType().isVector()) { - SDNode *InVal = ST->getValue().Val; + SDNode *InVal = ST->getValue().getNode(); int InIx = ST->getValue().getResNo(); MVT InVT = InVal->getValueType(InIx); unsigned NumElems = InVT.getVectorNumElements(); @@ -2473,12 +2473,12 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; } else { SplitVectorOp(ST->getValue(), Lo, Hi); - IncrementSize = Lo.Val->getValueType(0).getVectorNumElements() * + IncrementSize = Lo.getNode()->getValueType(0).getVectorNumElements() * EVT.getSizeInBits()/8; } } else { ExpandOp(ST->getValue(), Lo, Hi); - IncrementSize = Hi.Val ? Hi.getValueType().getSizeInBits()/8 : 0; + IncrementSize = Hi.getNode() ? Hi.getValueType().getSizeInBits()/8 : 0; if (TLI.isBigEndian()) std::swap(Lo, Hi); @@ -2487,7 +2487,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(), SVOffset, isVolatile, Alignment); - if (Hi.Val == NULL) { + if (Hi.getNode() == NULL) { // Must be int <-> float one-to-one expansion. Result = Lo; break; @@ -2598,7 +2598,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { unsigned ABIAlignment = TLI.getTargetData()-> getABITypeAlignment(ST->getMemoryVT().getTypeForMVT()); if (ST->getAlignment() < ABIAlignment) - Result = ExpandUnalignedStore(cast(Result.Val), DAG, + Result = ExpandUnalignedStore(cast(Result.getNode()), DAG, TLI); } break; @@ -2632,7 +2632,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp3 = TLI.LowerOperation(Result, DAG); - if (Tmp3.Val) { + if (Tmp3.getNode()) { Tmp1 = LegalizeOp(Tmp3); Tmp2 = LegalizeOp(Tmp3.getValue(1)); } @@ -2667,7 +2667,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Expand: // Expand to CopyToReg if the target set @@ -2730,7 +2730,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; } case TargetLowering::Expand: @@ -2784,7 +2784,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // If we didn't get both a LHS and RHS back from LegalizeSetCCOperands, // the LHS is a legal SETCC itself. In this case, we need to compare // the result against zero to select between true and false values. - if (Tmp2.Val == 0) { + if (Tmp2.getNode() == 0) { Tmp2 = DAG.getConstant(0, Tmp1.getValueType()); CC = DAG.getCondCode(ISD::SETNE); } @@ -2796,7 +2796,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; } break; @@ -2810,7 +2810,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // If we had to Expand the SetCC operands into a SELECT node, then it may // not always be possible to return a true LHS & RHS. In this case, just // return the value we legalized, returned in the LHS - if (Tmp2.Val == 0) { + if (Tmp2.getNode() == 0) { Result = Tmp1; break; } @@ -2824,7 +2824,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Tmp3); if (isCustom) { Tmp4 = TLI.LowerOperation(Result, DAG); - if (Tmp4.Val) Result = Tmp4; + if (Tmp4.getNode()) Result = Tmp4; } break; case TargetLowering::Promote: { @@ -2882,7 +2882,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; } break; @@ -2906,7 +2906,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) { + if (Tmp1.getNode()) { SDValue Tmp2, RetVal(0, 0); for (unsigned i = 0, e = Node->getNumValues(); i != e; ++i) { Tmp2 = LegalizeOp(Tmp1.getValue(i)); @@ -2914,7 +2914,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (i == Op.getResNo()) RetVal = Tmp2; } - assert(RetVal.Val && "Illegal result number"); + assert(RetVal.getNode() && "Illegal result number"); return RetVal; } break; @@ -2974,7 +2974,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) { + if (Tmp1.getNode()) { Result = Tmp1; break; } @@ -3004,28 +3004,28 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { OpToUse = ISD::UMUL_LOHI; } if (OpToUse) { - Result = SDValue(DAG.getNode(OpToUse, VTs, Tmp1, Tmp2).Val, 0); + Result = SDValue(DAG.getNode(OpToUse, VTs, Tmp1, Tmp2).getNode(), 0); break; } } if (Node->getOpcode() == ISD::MULHS && TLI.isOperationLegal(ISD::SMUL_LOHI, VT)) { - Result = SDValue(DAG.getNode(ISD::SMUL_LOHI, VTs, Tmp1, Tmp2).Val, 1); + Result = SDValue(DAG.getNode(ISD::SMUL_LOHI, VTs, Tmp1, Tmp2).getNode(), 1); break; } if (Node->getOpcode() == ISD::MULHU && TLI.isOperationLegal(ISD::UMUL_LOHI, VT)) { - Result = SDValue(DAG.getNode(ISD::UMUL_LOHI, VTs, Tmp1, Tmp2).Val, 1); + Result = SDValue(DAG.getNode(ISD::UMUL_LOHI, VTs, Tmp1, Tmp2).getNode(), 1); break; } if (Node->getOpcode() == ISD::SDIV && TLI.isOperationLegal(ISD::SDIVREM, VT)) { - Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).Val, 0); + Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).getNode(), 0); break; } if (Node->getOpcode() == ISD::UDIV && TLI.isOperationLegal(ISD::UDIVREM, VT)) { - Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).Val, 0); + Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).getNode(), 0); break; } @@ -3113,7 +3113,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "Operation not supported"); case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Legal: break; case TargetLowering::Expand: { @@ -3216,7 +3216,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Expand: { @@ -3228,12 +3228,12 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { SDVTList VTs = DAG.getVTList(VT, VT); if (Node->getOpcode() == ISD::SREM && TLI.isOperationLegal(ISD::SDIVREM, VT)) { - Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).Val, 1); + Result = SDValue(DAG.getNode(ISD::SDIVREM, VTs, Tmp1, Tmp2).getNode(), 1); break; } if (Node->getOpcode() == ISD::UREM && TLI.isOperationLegal(ISD::UDIVREM, VT)) { - Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).Val, 1); + Result = SDValue(DAG.getNode(ISD::UDIVREM, VTs, Tmp1, Tmp2).getNode(), 1); break; } @@ -3288,7 +3288,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (isCustom) { Tmp2 = TLI.LowerOperation(Result, DAG); - if (Tmp2.Val) { + if (Tmp2.getNode()) { Result = LegalizeOp(Tmp2); Tmp1 = LegalizeOp(Tmp2.getValue(1)); } @@ -3332,7 +3332,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Node->getOperand(3), Node->getOperand(4)); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Expand: @@ -3359,7 +3359,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2, Node->getOperand(2)); if (isCustom) { Tmp1 = TLI.LowerOperation(Tmp1, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Expand: @@ -3379,7 +3379,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { case TargetLowering::Legal: break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; } break; @@ -3397,7 +3397,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; break; case TargetLowering::Promote: assert(0 && "Do not know how to promote ROTL/ROTR"); @@ -3444,7 +3444,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)) == TargetLowering::Custom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) { + if (Tmp1.getNode()) { Result = Tmp1; } } @@ -3505,7 +3505,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Tmp1); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Expand: @@ -3609,7 +3609,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { } else if (Op.getOperand(0).getValueType().isVector()) { // The input has to be a vector type, we have to either scalarize it, pack // it, or convert it based on whether the input vector type is legal. - SDNode *InVal = Node->getOperand(0).Val; + SDNode *InVal = Node->getOperand(0).getNode(); int InIx = Node->getOperand(0).getResNo(); unsigned NumElems = InVal->getValueType(InIx).getVectorNumElements(); MVT EVT = InVal->getValueType(InIx).getVectorElementType(); @@ -3690,7 +3690,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Tmp1); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Promote: @@ -3832,7 +3832,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { if (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)) == TargetLowering::Custom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case Promote: @@ -3904,7 +3904,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Result = DAG.UpdateNodeOperands(Result, Ops, 6); // The only option for this node is to custom lower it. Result = TLI.LowerOperation(Result, DAG); - assert(Result.Val && "Should always custom lower!"); + assert(Result.getNode() && "Should always custom lower!"); // Since trampoline produces two values, make sure to remember that we // legalized both of them. @@ -3920,7 +3920,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { default: assert(0 && "This action not supported for this op yet!"); case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Legal: // If this operation is not supported, lower it to constant 1 @@ -3939,7 +3939,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { break; case TargetLowering::Custom: Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) break; + if (Result.getNode()) break; // Fall Thru case TargetLowering::Expand: // If this operation is not supported, lower it to 'abort()' call @@ -3984,7 +3984,7 @@ SDValue SelectionDAGLegalize::PromoteOp(SDValue Op) { SDValue Tmp1, Tmp2, Tmp3; SDValue Result; - SDNode *Node = Op.Val; + SDNode *Node = Op.getNode(); DenseMap::iterator I = PromotedNodes.find(Op); if (I != PromotedNodes.end()) return I->second; @@ -4461,7 +4461,7 @@ SDValue SelectionDAGLegalize::PromoteOp(SDValue Op) { break; } - assert(Result.Val && "Didn't set a result!"); + assert(Result.getNode() && "Didn't set a result!"); // Make sure the result is itself legal. Result = LegalizeOp(Result); @@ -4491,7 +4491,7 @@ SDValue SelectionDAGLegalize::ExpandEXTRACT_VECTOR_ELT(SDValue Op) { Vec = LegalizeOp(Vec); Op = DAG.UpdateNodeOperands(Op, Vec, Idx); SDValue Tmp3 = TLI.LowerOperation(Op, DAG); - if (Tmp3.Val) + if (Tmp3.getNode()) return Tmp3; break; } @@ -4697,14 +4697,14 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDValue &LHS, SDValue Dummy; SDValue Ops[2] = { LHS, RHS }; - Tmp1 = ExpandLibCall(LC1, DAG.getMergeValues(Ops, 2).Val, + Tmp1 = ExpandLibCall(LC1, DAG.getMergeValues(Ops, 2).getNode(), false /*sign irrelevant*/, Dummy); Tmp2 = DAG.getConstant(0, MVT::i32); CC = DAG.getCondCode(TLI.getCmpLibcallCC(LC1)); if (LC2 != RTLIB::UNKNOWN_LIBCALL) { Tmp1 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(Tmp1), Tmp1, Tmp2, CC); - LHS = ExpandLibCall(LC2, DAG.getMergeValues(Ops, 2).Val, + LHS = ExpandLibCall(LC2, DAG.getMergeValues(Ops, 2).getNode(), false /*sign irrelevant*/, Dummy); Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(LHS), LHS, Tmp2, DAG.getCondCode(TLI.getCmpLibcallCC(LC2))); @@ -4791,16 +4791,16 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDValue &LHS, TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, false, true, NULL); Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, LowCC, false, DagCombineInfo); - if (!Tmp1.Val) + if (!Tmp1.getNode()) Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, LowCC); Tmp2 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode, false, DagCombineInfo); - if (!Tmp2.Val) + if (!Tmp2.getNode()) Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi,CC); - ConstantSDNode *Tmp1C = dyn_cast(Tmp1.Val); - ConstantSDNode *Tmp2C = dyn_cast(Tmp2.Val); + ConstantSDNode *Tmp1C = dyn_cast(Tmp1.getNode()); + ConstantSDNode *Tmp2C = dyn_cast(Tmp2.getNode()); if ((Tmp1C && Tmp1C->isNullValue()) || (Tmp2C && Tmp2C->isNullValue() && (CCCode == ISD::SETLE || CCCode == ISD::SETGE || @@ -4816,7 +4816,7 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDValue &LHS, } else { Result = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ, false, DagCombineInfo); - if (!Result.Val) + if (!Result.getNode()) Result=DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ); Result = LegalizeOp(DAG.getNode(ISD::SELECT, Tmp1.getValueType(), @@ -4958,7 +4958,7 @@ SDValue SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) { PseudoSourceValue::getConstantPool(), 0); } - if (SplatValue.Val) { // Splat of one value? + if (SplatValue.getNode()) { // Splat of one value? // Build the shuffle constant vector: <0, 0, 0, 0> MVT MaskVT = MVT::getIntVectorWithNumElements(NumElems); SDValue Zero = DAG.getConstant(0, MaskVT.getVectorElementType()); @@ -5095,7 +5095,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDValue Op,SDValue Amt, unsigned NVTBits = NVT.getSizeInBits(); // Handle the case when Amt is an immediate. - if (ConstantSDNode *CN = dyn_cast(Amt.Val)) { + if (ConstantSDNode *CN = dyn_cast(Amt.getNode())) { unsigned Cst = CN->getValue(); // Expand the incoming operand to be shifted, so that we have its parts SDValue InL, InH; @@ -5292,14 +5292,14 @@ LegalizeINT_TO_FP(SDValue Result, bool isSigned, MVT DestTy, SDValue Op) { // FALLTHROUGH case TargetLowering::Legal: Tmp1 = LegalizeOp(Op); - if (Result.Val) + if (Result.getNode()) Result = DAG.UpdateNodeOperands(Result, Tmp1); else Result = DAG.getNode(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, DestTy, Tmp1); if (isCustom) { Tmp1 = TLI.LowerOperation(Result, DAG); - if (Tmp1.Val) Result = Tmp1; + if (Tmp1.getNode()) Result = Tmp1; } break; case TargetLowering::Expand: @@ -5322,7 +5322,7 @@ LegalizeINT_TO_FP(SDValue Result, bool isSigned, MVT DestTy, SDValue Op) { Tmp1 = DAG.getZeroExtendInReg(Tmp1, Op.getValueType()); } - if (Result.Val) + if (Result.getNode()) Result = DAG.UpdateNodeOperands(Result, Tmp1); else Result = DAG.getNode(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, @@ -5427,7 +5427,7 @@ ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source) { case TargetLowering::Custom: { SDValue NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, DestTy, Source), DAG); - if (NV.Val) + if (NV.getNode()) return LegalizeOp(NV); break; // The target decided this was legal after all } @@ -5448,8 +5448,8 @@ ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source) { Source = DAG.getNode(ISD::SINT_TO_FP, DestTy, Source); SDValue HiPart; - SDValue Result = ExpandLibCall(LC, Source.Val, isSigned, HiPart); - if (Result.getValueType() != DestTy && HiPart.Val) + SDValue Result = ExpandLibCall(LC, Source.getNode(), isSigned, HiPart); + if (Result.getValueType() != DestTy && HiPart.getNode()) Result = DAG.getNode(ISD::BUILD_PAIR, DestTy, Result, HiPart); return Result; } @@ -5665,8 +5665,8 @@ SDValue SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDValue LegalOp, // the target lowering hooks to expand it. Just keep the low part of the // expanded operation, we know that we're truncating anyway. if (getTypeAction(NewOutTy) == Expand) { - Operation = SDValue(TLI.ReplaceNodeResults(Operation.Val, DAG), 0); - assert(Operation.Val && "Didn't return anything"); + Operation = SDValue(TLI.ReplaceNodeResults(Operation.getNode(), DAG), 0); + assert(Operation.getNode() && "Didn't return anything"); } // Truncate the result of the extended FP_TO_*INT operation to the desired @@ -5794,7 +5794,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op) { void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ MVT VT = Op.getValueType(); MVT NVT = TLI.getTypeToTransformTo(VT); - SDNode *Node = Op.Val; + SDNode *Node = Op.getNode(); assert(getTypeAction(VT) == Expand && "Not an expanded type!"); assert(((NVT.isInteger() && NVT.bitsLT(VT)) || VT.isFloatingPoint() || VT.isVector()) && "Cannot expand to FP value or to larger int value!"); @@ -5820,9 +5820,9 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ Src = DAG.getNode(ISD::BUILD_PAIR, VT, SrcLo, SrcHi); SDValue Result = TLI.LowerOperation( DAG.getNode(ISD::FP_ROUND_INREG, VT, Src, Op.getOperand(1)), DAG); - assert(Result.Val->getOpcode() == ISD::BUILD_PAIR); - Lo = Result.Val->getOperand(0); - Hi = Result.Val->getOperand(1); + assert(Result.getNode()->getOpcode() == ISD::BUILD_PAIR); + Lo = Result.getNode()->getOperand(0); + Hi = Result.getNode()->getOperand(1); break; } // fall through @@ -6145,7 +6145,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ } // Turn this into a load/store pair by default. - if (Tmp.Val == 0) + if (Tmp.getNode() == 0) Tmp = EmitStackConvert(Node->getOperand(0), VT, VT); ExpandOp(Tmp, Lo, Hi); @@ -6157,7 +6157,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ TargetLowering::Custom && "Must custom expand ReadCycleCounter"); SDValue Tmp = TLI.LowerOperation(Op, DAG); - assert(Tmp.Val && "Node must be custom expanded!"); + assert(Tmp.getNode() && "Node must be custom expanded!"); ExpandOp(Tmp.getValue(0), Lo, Hi); AddLegalizedOperand(SDValue(Node, 1), // Remember we legalized the chain. LegalizeOp(Tmp.getValue(1))); @@ -6170,7 +6170,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ case ISD::ATOMIC_CMP_SWAP_32: case ISD::ATOMIC_CMP_SWAP_64: { SDValue Tmp = TLI.LowerOperation(Op, DAG); - assert(Tmp.Val && "Node must be custom expanded!"); + assert(Tmp.getNode() && "Node must be custom expanded!"); ExpandOp(Tmp.getValue(0), Lo, Hi); AddLegalizedOperand(SDValue(Node, 1), // Remember we legalized the chain. LegalizeOp(Tmp.getValue(1))); @@ -6194,7 +6194,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ // Now that the custom expander is done, expand the result, which is still // VT. - if (Op.Val) { + if (Op.getNode()) { ExpandOp(Op, Lo, Hi); break; } @@ -6219,7 +6219,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_UINT, VT, Op), DAG); // Now that the custom expander is done, expand the result. - if (Op.Val) { + if (Op.getNode()) { ExpandOp(Op, Lo, Hi); break; } @@ -6238,7 +6238,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Custom) { SDValue Op = DAG.getNode(ISD::SHL, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); - if (Op.Val) { + if (Op.getNode()) { // Now that the custom expander is done, expand the result, which is // still VT. ExpandOp(Op, Lo, Hi); @@ -6288,7 +6288,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Custom) { SDValue Op = DAG.getNode(ISD::SRA, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); - if (Op.Val) { + if (Op.getNode()) { // Now that the custom expander is done, expand the result, which is // still VT. ExpandOp(Op, Lo, Hi); @@ -6320,7 +6320,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Custom) { SDValue Op = DAG.getNode(ISD::SRL, VT, Node->getOperand(0), ShiftAmt); Op = TLI.LowerOperation(Op, DAG); - if (Op.Val) { + if (Op.getNode()) { // Now that the custom expander is done, expand the result, which is // still VT. ExpandOp(Op, Lo, Hi); @@ -6352,7 +6352,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (TLI.getOperationAction(Node->getOpcode(), VT) == TargetLowering::Custom) { SDValue Result = TLI.LowerOperation(Op, DAG); - if (Result.Val) { + if (Result.getNode()) { ExpandOp(Result, Lo, Hi); break; } @@ -6425,7 +6425,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ // If the target wants to custom expand this, let them. if (TLI.getOperationAction(ISD::MUL, VT) == TargetLowering::Custom) { SDValue New = TLI.LowerOperation(Op, DAG); - if (New.Val) { + if (New.getNode()) { ExpandOp(New, Lo, Hi); break; } @@ -6450,7 +6450,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (HasUMUL_LOHI) { // We can emit a umul_lohi. Lo = DAG.getNode(ISD::UMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL); - Hi = SDValue(Lo.Val, 1); + Hi = SDValue(Lo.getNode(), 1); break; } if (HasMULHU) { @@ -6465,7 +6465,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ if (HasSMUL_LOHI) { // We can emit a smul_lohi. Lo = DAG.getNode(ISD::SMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL); - Hi = SDValue(Lo.Val, 1); + Hi = SDValue(Lo.getNode(), 1); break; } if (HasMULHS) { @@ -6678,7 +6678,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ ? DAG.getNode(ISD::SIGN_EXTEND_INREG, Tmp.getValueType(), Tmp, DAG.getValueType(SrcVT)) : DAG.getZeroExtendInReg(Tmp, SrcVT); - Node = DAG.UpdateNodeOperands(Op, Tmp).Val; + Node = DAG.UpdateNodeOperands(Op, Tmp).getNode(); SrcVT = Node->getOperand(0).getValueType(); } @@ -6739,7 +6739,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ // is a type that requires multi-step expansion. if (getTypeAction(NVT) != Expand && NVT != MVT::isVoid) { Lo = LegalizeOp(Lo); - if (Hi.Val) + if (Hi.getNode()) // Don't legalize the high part if it is expanded to a single node. Hi = LegalizeOp(Hi); } @@ -6755,7 +6755,7 @@ void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){ void SelectionDAGLegalize::SplitVectorOp(SDValue Op, SDValue &Lo, SDValue &Hi) { assert(Op.getValueType().isVector() && "Cannot split non-vector type!"); - SDNode *Node = Op.Val; + SDNode *Node = Op.getNode(); unsigned NumElements = Op.getValueType().getVectorNumElements(); assert(NumElements > 1 && "Cannot split a single element vector!"); @@ -7033,7 +7033,7 @@ void SelectionDAGLegalize::SplitVectorOp(SDValue Op, SDValue &Lo, unsigned LdAlign = TLI.getTargetData()->getPrefTypeAlignment( Op.getValueType().getTypeForMVT()); SDValue Ptr = DAG.CreateStackTemporary(InOp.getValueType(), LdAlign); - int FI = cast(Ptr.Val)->getIndex(); + int FI = cast(Ptr.getNode())->getIndex(); SDValue St = DAG.getStore(DAG.getEntryNode(), InOp, Ptr, @@ -7061,7 +7061,7 @@ void SelectionDAGLegalize::SplitVectorOp(SDValue Op, SDValue &Lo, /// scalar (e.g. f32) value. SDValue SelectionDAGLegalize::ScalarizeVectorOp(SDValue Op) { assert(Op.getValueType().isVector() && "Bad ScalarizeVectorOp invocation!"); - SDNode *Node = Op.Val; + SDNode *Node = Op.getNode(); MVT NewVT = Op.getValueType().getVectorElementType(); assert(Op.getValueType().getVectorNumElements() == 1); diff --git a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 64d7c3c0b5..45ae85c854 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -76,7 +76,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { } // If R is null, the sub-method took care of registering the result. - if (R.Val) + if (R.getNode()) SetSoftenedFloat(SDValue(N, ResNo), R); } @@ -311,11 +311,11 @@ bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. Check to see if any // operands are new, and if so, mark them. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. @@ -438,7 +438,7 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) { // If SoftenSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -472,7 +472,7 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) { // If SoftenSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -489,7 +489,7 @@ SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) { SoftenSetCCOperands(NewLHS, NewRHS, CCCode); // If SoftenSetCCOperands returned a scalar, use it. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { assert(NewLHS.getValueType() == N->getValueType(0) && "Unexpected setcc expansion!"); return NewLHS; @@ -577,7 +577,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) { } // If Lo/Hi is null, the sub-method took care of registering results etc. - if (Lo.Val) + if (Lo.getNode()) SetExpandedFloat(SDValue(N, ResNo), Lo, Hi); } @@ -603,7 +603,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo, RTLIB::ADD_PPCF128), N->getValueType(0), Ops, 2, false); - assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); + assert(Call.getNode()->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); Lo = Call.getOperand(0); Hi = Call.getOperand(1); } @@ -630,7 +630,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo, RTLIB::DIV_PPCF128), N->getValueType(0), Ops, 2, false); - assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); + assert(Call.getNode()->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); Lo = Call.getOperand(0); Hi = Call.getOperand(1); } @@ -644,7 +644,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo, RTLIB::MUL_PPCF128), N->getValueType(0), Ops, 2, false); - assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); + assert(Call.getNode()->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); Lo = Call.getOperand(0); Hi = Call.getOperand(1); } @@ -672,7 +672,7 @@ void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo, RTLIB::SUB_PPCF128), N->getValueType(0), Ops, 2, false); - assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); + assert(Call.getNode()->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); Lo = Call.getOperand(0); Hi = Call.getOperand(1); } @@ -734,7 +734,7 @@ void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!"); Hi = MakeLibCall(LC, VT, &Src, 1, true); - assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); + assert(Hi.getNode()->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!"); Lo = Hi.getOperand(0); Hi = Hi.getOperand(1); } @@ -790,7 +790,7 @@ bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) { == TargetLowering::Custom) Res = TLI.LowerOperation(SDValue(N, OpNo), DAG); - if (Res.Val == 0) { + if (Res.getNode() == 0) { switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -816,10 +816,10 @@ bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. Check to see if any // operands are new, and if so, mark them. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of expansion and allows us to visit // any new operands to N. @@ -869,7 +869,7 @@ SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) { // If ExpandSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -910,7 +910,7 @@ SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) { // If ExpandSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -927,7 +927,7 @@ SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) { FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode); // If ExpandSetCCOperands returned a scalar, use it. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { assert(NewLHS.getValueType() == N->getValueType(0) && "Unexpected setcc expansion!"); return NewLHS; diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 1dc933cc7e..d7698b087e 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -99,7 +99,7 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) { } // If Result is null, the sub-method took care of registering the result. - if (Result.Val) + if (Result.getNode()) SetPromotedInteger(SDValue(N, ResNo), Result); } @@ -167,7 +167,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BIT_CONVERT(SDNode *N) { // Otherwise, lower the bit-convert to a store/load from the stack, then // promote the load. SDValue Op = CreateStackStoreLoad(InOp, N->getValueType(0)); - return PromoteIntRes_LOAD(cast(Op.Val)); + return PromoteIntRes_LOAD(cast(Op.getNode())); } SDValue DAGTypeLegalizer::PromoteIntRes_BSWAP(SDNode *N) { @@ -494,7 +494,7 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) { == TargetLowering::Custom) Res = TLI.LowerOperation(SDValue(N, OpNo), DAG); - if (Res.Val == 0) { + if (Res.getNode() == 0) { switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -529,9 +529,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. @@ -885,7 +885,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) { } // If Lo/Hi is null, the sub-method took care of registering results etc. - if (Lo.Val) + if (Lo.getNode()) SetExpandedInteger(SDValue(N, ResNo), Lo, Hi); } @@ -1395,7 +1395,7 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N, if (HasUMUL_LOHI) { // We can emit a umul_lohi. Lo = DAG.getNode(ISD::UMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL); - Hi = SDValue(Lo.Val, 1); + Hi = SDValue(Lo.getNode(), 1); return; } if (HasMULHU) { @@ -1410,7 +1410,7 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N, if (HasSMUL_LOHI) { // We can emit a smul_lohi. Lo = DAG.getNode(ISD::SMUL_LOHI, DAG.getVTList(NVT, NVT), LL, RL); - Hi = SDValue(Lo.Val, 1); + Hi = SDValue(Lo.getNode(), 1); return; } if (HasMULHS) { @@ -1706,7 +1706,7 @@ bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) { == TargetLowering::Custom) Res = TLI.LowerOperation(SDValue(N, OpNo), DAG); - if (Res.Val == 0) { + if (Res.getNode() == 0) { switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -1732,10 +1732,10 @@ bool DAGTypeLegalizer::ExpandIntegerOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. Check to see if any // operands are new, and if so, mark them. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of expansion and allows us to visit // any new operands to N. @@ -1814,16 +1814,16 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue Tmp1, Tmp2; Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, LowCC, false, DagCombineInfo); - if (!Tmp1.Val) + if (!Tmp1.getNode()) Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, LowCC); Tmp2 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode, false, DagCombineInfo); - if (!Tmp2.Val) + if (!Tmp2.getNode()) Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, DAG.getCondCode(CCCode)); - ConstantSDNode *Tmp1C = dyn_cast(Tmp1.Val); - ConstantSDNode *Tmp2C = dyn_cast(Tmp2.Val); + ConstantSDNode *Tmp1C = dyn_cast(Tmp1.getNode()); + ConstantSDNode *Tmp2C = dyn_cast(Tmp2.getNode()); if ((Tmp1C && Tmp1C->isNullValue()) || (Tmp2C && Tmp2C->isNullValue() && (CCCode == ISD::SETLE || CCCode == ISD::SETGE || @@ -1841,7 +1841,7 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS, NewLHS = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ, false, DagCombineInfo); - if (!NewLHS.Val) + if (!NewLHS.getNode()) NewLHS = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ); NewLHS = DAG.getNode(ISD::SELECT, Tmp1.getValueType(), @@ -1856,7 +1856,7 @@ SDValue DAGTypeLegalizer::ExpandIntOp_BR_CC(SDNode *N) { // If ExpandSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -1874,7 +1874,7 @@ SDValue DAGTypeLegalizer::ExpandIntOp_SELECT_CC(SDNode *N) { // If ExpandSetCCOperands returned a scalar, we need to compare the result // against zero to select between true and false values. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { NewRHS = DAG.getConstant(0, NewLHS.getValueType()); CCCode = ISD::SETNE; } @@ -1891,7 +1891,7 @@ SDValue DAGTypeLegalizer::ExpandIntOp_SETCC(SDNode *N) { IntegerExpandSetCCOperands(NewLHS, NewRHS, CCCode); // If ExpandSetCCOperands returned a scalar, use it. - if (NewRHS.Val == 0) { + if (NewRHS.getNode() == 0) { assert(NewLHS.getValueType() == N->getValueType(0) && "Unexpected setcc expansion!"); return NewLHS; diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp index 746c73e28b..d913ce611c 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp @@ -92,7 +92,7 @@ ScanOperands: bool NeedsRevisit = false; unsigned i; for (i = 0; i != NumOperands; ++i) { - if (IgnoreNodeResults(N->getOperand(i).Val)) + if (IgnoreNodeResults(N->getOperand(i).getNode())) continue; MVT OpVT = N->getOperand(i).getValueType(); @@ -194,7 +194,7 @@ NodeDone: // Check that all operand types are legal. for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i) - if (!IgnoreNodeResults(I->getOperand(i).Val) && + if (!IgnoreNodeResults(I->getOperand(i).getNode()) && !isTypeLegal(I->getOperand(i).getValueType())) { cerr << "Operand type " << i << " illegal!\n"; Failed = true; @@ -221,7 +221,8 @@ NodeDone: /// AnalyzeNewNode - The specified node is the root of a subtree of potentially /// new nodes. Correct any processed operands (this may change the node) and /// calculate the NodeId. -void DAGTypeLegalizer::AnalyzeNewNode(SDNode *&N) { +void DAGTypeLegalizer::AnalyzeNewNode(SDValue &Val) { + SDNode * const N(Val.getNode()); // If this was an existing node that is already done, we're done. if (N->getNodeId() != NewNode) return; @@ -246,12 +247,12 @@ void DAGTypeLegalizer::AnalyzeNewNode(SDNode *&N) { SDValue OrigOp = N->getOperand(i); SDValue Op = OrigOp; - if (Op.Val->getNodeId() == Processed) + if (Op.getNode()->getNodeId() == Processed) RemapNode(Op); - if (Op.Val->getNodeId() == NewNode) - AnalyzeNewNode(Op.Val); - else if (Op.Val->getNodeId() == Processed) + if (Op.getNode()->getNodeId() == NewNode) + AnalyzeNewNode(Op); + else if (Op.getNode()->getNodeId() == Processed) ++NumProcessed; if (!NewOps.empty()) { @@ -267,11 +268,14 @@ void DAGTypeLegalizer::AnalyzeNewNode(SDNode *&N) { // Some operands changed - update the node. if (!NewOps.empty()) - N = DAG.UpdateNodeOperands(SDValue(N, 0), &NewOps[0], NewOps.size()).Val; - - N->setNodeId(N->getNumOperands()-NumProcessed); - if (N->getNodeId() == ReadyToProcess) - Worklist.push_back(N); + Val.setNode(DAG.UpdateNodeOperands(SDValue(N, 0), + &NewOps[0], + NewOps.size()).getNode()); + + SDNode * const Nu(Val.getNode()); + Nu->setNodeId(Nu->getNumOperands()-NumProcessed); + if (Nu->getNodeId() == ReadyToProcess) + Worklist.push_back(Nu); } namespace { @@ -313,8 +317,8 @@ void DAGTypeLegalizer::ReplaceValueWith(SDValue From, SDValue To) { if (From == To) return; // If expansion produced new nodes, make sure they are properly marked. - ExpungeNode(From.Val); - AnalyzeNewNode(To.Val); // Expunges To. + ExpungeNode(From.getNode()); + AnalyzeNewNode(To); // Expunges To. // Anything that used the old node should now use the new one. Note that this // can potentially cause recursive merging. @@ -333,7 +337,10 @@ void DAGTypeLegalizer::ReplaceNodeWith(SDNode *From, SDNode *To) { // If expansion produced new nodes, make sure they are properly marked. ExpungeNode(From); - AnalyzeNewNode(To); // Expunges To. + + SDValue ToNode(To, 0); + AnalyzeNewNode(ToNode); // Expunges To. + To = ToNode.getNode(); assert(From->getNumValues() == To->getNumValues() && "Node results don't match"); @@ -394,39 +401,39 @@ void DAGTypeLegalizer::ExpungeNode(SDNode *N) { for (DenseMap::iterator I = PromotedIntegers.begin(), E = PromotedIntegers.end(); I != E; ++I) { - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second); } for (DenseMap::iterator I = SoftenedFloats.begin(), E = SoftenedFloats.end(); I != E; ++I) { - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second); } for (DenseMap::iterator I = ScalarizedVectors.begin(), E = ScalarizedVectors.end(); I != E; ++I) { - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second); } for (DenseMap >::iterator I = ExpandedIntegers.begin(), E = ExpandedIntegers.end(); I != E; ++I){ - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second.first); RemapNode(I->second.second); } for (DenseMap >::iterator I = ExpandedFloats.begin(), E = ExpandedFloats.end(); I != E; ++I) { - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second.first); RemapNode(I->second.second); } for (DenseMap >::iterator I = SplitVectors.begin(), E = SplitVectors.end(); I != E; ++I) { - assert(I->first.Val != N); + assert(I->first.getNode() != N); RemapNode(I->second.first); RemapNode(I->second.second); } @@ -440,26 +447,26 @@ void DAGTypeLegalizer::ExpungeNode(SDNode *N) { } void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) { - AnalyzeNewNode(Result.Val); + AnalyzeNewNode(Result); SDValue &OpEntry = PromotedIntegers[Op]; - assert(OpEntry.Val == 0 && "Node is already promoted!"); + assert(OpEntry.getNode() == 0 && "Node is already promoted!"); OpEntry = Result; } void DAGTypeLegalizer::SetSoftenedFloat(SDValue Op, SDValue Result) { - AnalyzeNewNode(Result.Val); + AnalyzeNewNode(Result); SDValue &OpEntry = SoftenedFloats[Op]; - assert(OpEntry.Val == 0 && "Node is already converted to integer!"); + assert(OpEntry.getNode() == 0 && "Node is already converted to integer!"); OpEntry = Result; } void DAGTypeLegalizer::SetScalarizedVector(SDValue Op, SDValue Result) { - AnalyzeNewNode(Result.Val); + AnalyzeNewNode(Result); SDValue &OpEntry = ScalarizedVectors[Op]; - assert(OpEntry.Val == 0 && "Node is already scalarized!"); + assert(OpEntry.getNode() == 0 && "Node is already scalarized!"); OpEntry = Result; } @@ -468,7 +475,7 @@ void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo, std::pair &Entry = ExpandedIntegers[Op]; RemapNode(Entry.first); RemapNode(Entry.second); - assert(Entry.first.Val && "Operand isn't expanded"); + assert(Entry.first.getNode() && "Operand isn't expanded"); Lo = Entry.first; Hi = Entry.second; } @@ -476,12 +483,12 @@ void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo, void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi) { // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. - AnalyzeNewNode(Lo.Val); - AnalyzeNewNode(Hi.Val); + AnalyzeNewNode(Lo); + AnalyzeNewNode(Hi); // Remember that this is the result of the node. std::pair &Entry = ExpandedIntegers[Op]; - assert(Entry.first.Val == 0 && "Node already expanded"); + assert(Entry.first.getNode() == 0 && "Node already expanded"); Entry.first = Lo; Entry.second = Hi; } @@ -491,7 +498,7 @@ void DAGTypeLegalizer::GetExpandedFloat(SDValue Op, SDValue &Lo, std::pair &Entry = ExpandedFloats[Op]; RemapNode(Entry.first); RemapNode(Entry.second); - assert(Entry.first.Val && "Operand isn't expanded"); + assert(Entry.first.getNode() && "Operand isn't expanded"); Lo = Entry.first; Hi = Entry.second; } @@ -499,12 +506,12 @@ void DAGTypeLegalizer::GetExpandedFloat(SDValue Op, SDValue &Lo, void DAGTypeLegalizer::SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi) { // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. - AnalyzeNewNode(Lo.Val); - AnalyzeNewNode(Hi.Val); + AnalyzeNewNode(Lo); + AnalyzeNewNode(Hi); // Remember that this is the result of the node. std::pair &Entry = ExpandedFloats[Op]; - assert(Entry.first.Val == 0 && "Node already expanded"); + assert(Entry.first.getNode() == 0 && "Node already expanded"); Entry.first = Lo; Entry.second = Hi; } @@ -514,7 +521,7 @@ void DAGTypeLegalizer::GetSplitVector(SDValue Op, SDValue &Lo, std::pair &Entry = SplitVectors[Op]; RemapNode(Entry.first); RemapNode(Entry.second); - assert(Entry.first.Val && "Operand isn't split"); + assert(Entry.first.getNode() && "Operand isn't split"); Lo = Entry.first; Hi = Entry.second; } @@ -522,12 +529,12 @@ void DAGTypeLegalizer::GetSplitVector(SDValue Op, SDValue &Lo, void DAGTypeLegalizer::SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi) { // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant. - AnalyzeNewNode(Lo.Val); - AnalyzeNewNode(Hi.Val); + AnalyzeNewNode(Lo); + AnalyzeNewNode(Hi); // Remember that this is the result of the node. std::pair &Entry = SplitVectors[Op]; - assert(Entry.first.Val == 0 && "Node already split"); + assert(Entry.first.getNode() == 0 && "Node already split"); Entry.first = Lo; Entry.second = Hi; } diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h index 809d5ad184..d8cbf78e46 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -157,7 +157,8 @@ public: /// for the specified node, adding it to the worklist if ready. void ReanalyzeNode(SDNode *N) { N->setNodeId(NewNode); - AnalyzeNewNode(N); + SDValue V(N, 0); + AnalyzeNewNode(V); // FIXME: ignore the change? } void NoteDeletion(SDNode *Old, SDNode *New) { @@ -168,7 +169,7 @@ public: } private: - void AnalyzeNewNode(SDNode *&N); + void AnalyzeNewNode(SDValue &Val); void ReplaceValueWith(SDValue From, SDValue To); void ReplaceNodeWith(SDNode *From, SDNode *To); @@ -197,7 +198,7 @@ private: SDValue GetPromotedInteger(SDValue Op) { SDValue &PromotedOp = PromotedIntegers[Op]; RemapNode(PromotedOp); - assert(PromotedOp.Val && "Operand wasn't promoted?"); + assert(PromotedOp.getNode() && "Operand wasn't promoted?"); return PromotedOp; } void SetPromotedInteger(SDValue Op, SDValue Result); @@ -324,7 +325,7 @@ private: SDValue GetSoftenedFloat(SDValue Op) { SDValue &SoftenedOp = SoftenedFloats[Op]; RemapNode(SoftenedOp); - assert(SoftenedOp.Val && "Operand wasn't converted to integer?"); + assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?"); return SoftenedOp; } void SetSoftenedFloat(SDValue Op, SDValue Result); @@ -403,7 +404,7 @@ private: SDValue GetScalarizedVector(SDValue Op) { SDValue &ScalarizedOp = ScalarizedVectors[Op]; RemapNode(ScalarizedOp); - assert(ScalarizedOp.Val && "Operand wasn't scalarized?"); + assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?"); return ScalarizedOp; } void SetScalarizedVector(SDValue Op, SDValue Result); diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp index 59b8ab8201..7409af8349 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp @@ -75,7 +75,7 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo, // Lower the bit-convert to a store/load from the stack, then expand the load. SDValue Op = CreateStackStoreLoad(InOp, N->getValueType(0)); - ExpandRes_NormalLoad(Op.Val, Lo, Hi); + ExpandRes_NormalLoad(Op.getNode(), Lo, Hi); } void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index d0d1e3954f..6bfc6c6bb6 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -88,7 +88,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { } // If R is null, the sub-method took care of registering the result. - if (R.Val) + if (R.getNode()) SetScalarizedVector(SDValue(N, ResNo), R); } @@ -184,7 +184,7 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { cerr << "\n"); SDValue Res = SDValue(); - if (Res.Val == 0) { + if (Res.getNode() == 0) { switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -206,11 +206,11 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. Check to see if any // operands are new, and if so, mark them. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. @@ -332,7 +332,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { } // If Lo/Hi is null, the sub-method took care of registering results etc. - if (Lo.Val) + if (Lo.getNode()) SetSplitVector(SDValue(N, ResNo), Lo, Hi); } @@ -475,7 +475,7 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue Load = DAG.getLoad(VecVT, Store, StackPtr, NULL, 0); // Split it. - SplitVecRes_LOAD(cast(Load.Val), Lo, Hi); + SplitVecRes_LOAD(cast(Load.getNode()), Lo, Hi); } void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, @@ -595,7 +595,7 @@ bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) { DEBUG(cerr << "Split node operand: "; N->dump(&DAG); cerr << "\n"); SDValue Res = SDValue(); - if (Res.Val == 0) { + if (Res.getNode() == 0) { switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -615,11 +615,11 @@ bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) { } // If the result is null, the sub-method took care of registering results etc. - if (!Res.Val) return false; + if (!Res.getNode()) return false; // If the result is N, the sub-method updated N in place. Check to see if any // operands are new, and if so, mark them. - if (Res.Val == N) { + if (Res.getNode() == N) { // Mark N as new and remark N and its operands. This allows us to correctly // revisit N if it needs another step of promotion and allows us to visit // any new operands to N. diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index faffce5a8f..0c287b8b93 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -122,7 +122,7 @@ void ScheduleDAG::BuildSchedUnits() { if (N->getNumOperands() && N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Flag) { do { - N = N->getOperand(N->getNumOperands()-1).Val; + N = N->getOperand(N->getNumOperands()-1).getNode(); NodeSUnit->FlaggedNodes.push_back(N); assert(N->getNodeId() == -1 && "Node already inserted!"); N->setNodeId(NodeSUnit->NodeNum); @@ -192,7 +192,7 @@ void ScheduleDAG::BuildSchedUnits() { SU->hasPhysRegDefs = true; for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { - SDNode *OpN = N->getOperand(i).Val; + SDNode *OpN = N->getOperand(i).getNode(); if (isPassiveNode(OpN)) continue; // Not scheduled. SUnit *OpSU = &SUnits[OpN->getNodeId()]; assert(OpSU && "Node has no SUnit!"); @@ -373,7 +373,7 @@ unsigned ScheduleDAG::CountResults(SDNode *Node) { /// actual operands that will go into the resulting MachineInstr. unsigned ScheduleDAG::CountOperands(SDNode *Node) { unsigned N = ComputeMemOperandsEnd(Node); - while (N && isa(Node->getOperand(N - 1).Val)) + while (N && isa(Node->getOperand(N - 1).getNode())) --N; // Ignore MEMOPERAND nodes return N; } @@ -429,7 +429,7 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, SDNode *User = *UI; bool Match = true; if (User->getOpcode() == ISD::CopyToReg && - User->getOperand(2).Val == Node && + User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == ResNo) { unsigned DestReg = cast(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(DestReg)) { @@ -440,7 +440,7 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, } else { for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) { SDValue Op = User->getOperand(i); - if (Op.Val != Node || Op.getResNo() != ResNo) + if (Op.getNode() != Node || Op.getResNo() != ResNo) continue; MVT VT = Node->getValueType(Op.getResNo()); if (VT != MVT::Other && VT != MVT::Flag) @@ -489,7 +489,7 @@ unsigned ScheduleDAG::getDstOfOnlyCopyToRegUse(SDNode *Node, SDNode *User = *Node->use_begin(); if (User->getOpcode() == ISD::CopyToReg && - User->getOperand(2).Val == Node && + User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == ResNo) { unsigned Reg = cast(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(Reg)) @@ -513,7 +513,7 @@ void ScheduleDAG::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI, UI != E; ++UI) { SDNode *User = *UI; if (User->getOpcode() == ISD::CopyToReg && - User->getOperand(2).Val == Node && + User->getOperand(2).getNode() == Node && User->getOperand(2).getResNo() == i) { unsigned Reg = cast(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(Reg)) { @@ -547,7 +547,7 @@ unsigned ScheduleDAG::getVR(SDValue Op, if (Op.isMachineOpcode() && Op.getMachineOpcode() == TargetInstrInfo::IMPLICIT_DEF) { // Add an IMPLICIT_DEF instruction before every use. - unsigned VReg = getDstOfOnlyCopyToRegUse(Op.Val, Op.getResNo()); + unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); // IMPLICIT_DEF can produce any type of result so its TargetInstrDesc // does not include operand register class info. if (!VReg) { @@ -600,7 +600,7 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDValue Op, if (RC && VRC != RC) { cerr << "Register class of operand and regclass of use don't agree!\n"; cerr << "Operand = " << IIOpNum << "\n"; - cerr << "Op->Val = "; Op.Val->dump(&DAG); cerr << "\n"; + cerr << "Op->Val = "; Op.getNode()->dump(&DAG); cerr << "\n"; cerr << "MI = "; MI->print(cerr); cerr << "VReg = " << VReg << "\n"; cerr << "VReg RegClass size = " << VRC->getSize() @@ -712,7 +712,7 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node, UI != E; ++UI) { SDNode *User = *UI; if (User->getOpcode() == ISD::CopyToReg && - User->getOperand(2).Val == Node) { + User->getOperand(2).getNode() == Node) { unsigned DestReg = cast(User->getOperand(1))->getReg(); if (TargetRegisterInfo::isVirtualRegister(DestReg)) { VRBase = DestReg; diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 338035a487..b9dcc25dc7 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -224,7 +224,7 @@ void ScheduleDAGRRList::CommuteNodesToReducePressure() { if (TID.getOperandConstraint(j+NumRes, TOI::TIED_TO) == -1) continue; - SDNode *OpN = SU->Node->getOperand(j).Val; + SDNode *OpN = SU->Node->getOperand(j).getNode(); SUnit *OpSU = isPassiveNode(OpN) ? NULL : &SUnits[OpN->getNodeId()]; if (OpSU && OperandSeen.count(OpSU) == 1) { // Ok, so SU is not the last use of OpSU, but SU is two-address so @@ -233,7 +233,7 @@ void ScheduleDAGRRList::CommuteNodesToReducePressure() { bool DoCommute = true; for (unsigned k = 0; k < NumOps; ++k) { if (k != j) { - OpN = SU->Node->getOperand(k).Val; + OpN = SU->Node->getOperand(k).getNode(); OpSU = isPassiveNode(OpN) ? NULL : &SUnits[OpN->getNodeId()]; if (OpSU && OperandSeen.count(OpSU) == 1) { DoCommute = false; @@ -641,7 +641,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) { } for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { const SDValue &Op = N->getOperand(i); - MVT VT = Op.Val->getValueType(Op.getResNo()); + MVT VT = Op.getNode()->getValueType(Op.getResNo()); if (VT == MVT::Flag) return NULL; } @@ -930,7 +930,7 @@ void ScheduleDAGRRList::ListScheduleBottomUp() { unsigned CurCycle = 0; // Add root to Available queue. if (!SUnits.empty()) { - SUnit *RootSU = &SUnits[DAG.getRoot().Val->getNodeId()]; + SUnit *RootSU = &SUnits[DAG.getRoot().getNode()->getNodeId()]; assert(RootSU->Succs.empty() && "Graph root shouldn't have successors!"); RootSU->isAvailable = true; AvailableQueue->push(RootSU); @@ -1668,7 +1668,7 @@ BURegReductionPriorityQueue::canClobber(const SUnit *SU, const SUnit *Op) { unsigned NumOps = TID.getNumOperands() - NumRes; for (unsigned i = 0; i != NumOps; ++i) { if (TID.getOperandConstraint(i+NumRes, TOI::TIED_TO) != -1) { - SDNode *DU = SU->Node->getOperand(i).Val; + SDNode *DU = SU->Node->getOperand(i).getNode(); if (DU->getNodeId() != -1 && Op->OrigNode == &(*SUnits)[DU->getNodeId()]) return true; @@ -1742,7 +1742,7 @@ void BURegReductionPriorityQueue::AddPseudoTwoAddrDeps() { unsigned NumOps = TID.getNumOperands() - NumRes; for (unsigned j = 0; j != NumOps; ++j) { if (TID.getOperandConstraint(j+NumRes, TOI::TIED_TO) != -1) { - SDNode *DU = SU->Node->getOperand(j).Val; + SDNode *DU = SU->Node->getOperand(j).getNode(); if (DU->getNodeId() == -1) continue; const SUnit *DUSU = &(*SUnits)[DU->getNodeId()]; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 45026dca41..48a37722f9 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -96,7 +96,7 @@ bool ConstantFPSDNode::isValueValidForType(MVT VT, bool ISD::isBuildVectorAllOnes(const SDNode *N) { // Look through a bit convert. if (N->getOpcode() == ISD::BIT_CONVERT) - N = N->getOperand(0).Val; + N = N->getOperand(0).getNode(); if (N->getOpcode() != ISD::BUILD_VECTOR) return false; @@ -137,7 +137,7 @@ bool ISD::isBuildVectorAllOnes(const SDNode *N) { bool ISD::isBuildVectorAllZeros(const SDNode *N) { // Look through a bit convert. if (N->getOpcode() == ISD::BIT_CONVERT) - N = N->getOperand(0).Val; + N = N->getOperand(0).getNode(); if (N->getOpcode() != ISD::BUILD_VECTOR) return false; @@ -326,7 +326,7 @@ static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { static void AddNodeIDOperands(FoldingSetNodeID &ID, const SDValue *Ops, unsigned NumOps) { for (; NumOps; --NumOps, ++Ops) { - ID.AddPointer(Ops->Val); + ID.AddPointer(Ops->getNode()); ID.AddInteger(Ops->getResNo()); } } @@ -1230,9 +1230,9 @@ SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, break; } - if (ConstantSDNode *N2C = dyn_cast(N2.Val)) { + if (ConstantSDNode *N2C = dyn_cast(N2.getNode())) { const APInt &C2 = N2C->getAPIntValue(); - if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { + if (ConstantSDNode *N1C = dyn_cast(N1.getNode())) { const APInt &C1 = N1C->getAPIntValue(); switch (Cond) { @@ -1250,8 +1250,8 @@ SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, } } } - if (ConstantFPSDNode *N1C = dyn_cast(N1.Val)) { - if (ConstantFPSDNode *N2C = dyn_cast(N2.Val)) { + if (ConstantFPSDNode *N1C = dyn_cast(N1.getNode())) { + if (ConstantFPSDNode *N2C = dyn_cast(N2.getNode())) { // No compile time operations on this type yet. if (N1C->getValueType(0) == MVT::ppcf128) return SDValue(); @@ -1572,7 +1572,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, return; } case ISD::LOAD: { - if (ISD::isZEXTLoad(Op.Val)) { + if (ISD::isZEXTLoad(Op.getNode())) { LoadSDNode *LD = cast(Op); MVT VT = LD->getMemoryVT(); unsigned MemBits = VT.getSizeInBits(); @@ -2024,7 +2024,7 @@ SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { if (V.getOpcode() == ISD::BUILD_VECTOR) return V.getOperand(Index); if (V.getOpcode() == ISD::VECTOR_SHUFFLE) - return getShuffleScalarElt(V.Val, Index); + return getShuffleScalarElt(V.getNode(), Index); return SDValue(); } @@ -2050,7 +2050,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { // Constant fold unary operations with an integer constant operand. - if (ConstantSDNode *C = dyn_cast(Operand.Val)) { + if (ConstantSDNode *C = dyn_cast(Operand.getNode())) { const APInt &Val = C->getAPIntValue(); unsigned BitWidth = VT.getSizeInBits(); switch (Opcode) { @@ -2091,7 +2091,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { } // Constant fold unary operations with a floating point constant operand. - if (ConstantFPSDNode *C = dyn_cast(Operand.Val)) { + if (ConstantFPSDNode *C = dyn_cast(Operand.getNode())) { APFloat V = C->getValueAPF(); // make copy if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { switch (Opcode) { @@ -2130,7 +2130,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { } } - unsigned OpOpcode = Operand.Val->getOpcode(); + unsigned OpOpcode = Operand.getNode()->getOpcode(); switch (Opcode) { case ISD::TokenFactor: case ISD::CONCAT_VECTORS: @@ -2150,7 +2150,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { assert(Operand.getValueType().bitsLT(VT) && "Invalid sext node, dst < src!"); if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) - return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); + return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); break; case ISD::ZERO_EXTEND: assert(VT.isInteger() && Operand.getValueType().isInteger() && @@ -2159,7 +2159,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { assert(Operand.getValueType().bitsLT(VT) && "Invalid zext node, dst < src!"); if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) - return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); + return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); break; case ISD::ANY_EXTEND: assert(VT.isInteger() && Operand.getValueType().isInteger() && @@ -2169,7 +2169,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { && "Invalid anyext node, dst < src!"); if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) - return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); + return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); break; case ISD::TRUNCATE: assert(VT.isInteger() && Operand.getValueType().isInteger() && @@ -2178,16 +2178,16 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { assert(Operand.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"); if (OpOpcode == ISD::TRUNCATE) - return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); + return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ANY_EXTEND) { // If the source is smaller than the dest, we still need an extend. - if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) - return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); - else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) - return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); + if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) + return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); + else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) + return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); else - return Operand.Val->getOperand(0); + return Operand.getNode()->getOperand(0); } break; case ISD::BIT_CONVERT: @@ -2215,14 +2215,14 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { break; case ISD::FNEG: if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) - return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), - Operand.Val->getOperand(0)); + return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), + Operand.getNode()->getOperand(0)); if (OpOpcode == ISD::FNEG) // --X -> X - return Operand.Val->getOperand(0); + return Operand.getNode()->getOperand(0); break; case ISD::FABS: if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) - return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); + return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); break; } @@ -2252,8 +2252,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue N1, SDValue N2) { - ConstantSDNode *N1C = dyn_cast(N1.Val); - ConstantSDNode *N2C = dyn_cast(N2.Val); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); + ConstantSDNode *N2C = dyn_cast(N2.getNode()); switch (Opcode) { default: break; case ISD::TokenFactor: @@ -2268,8 +2268,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, // one big BUILD_VECTOR. if (N1.getOpcode() == ISD::BUILD_VECTOR && N2.getOpcode() == ISD::BUILD_VECTOR) { - SmallVector Elts(N1.Val->op_begin(), N1.Val->op_end()); - Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); + SmallVector Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); + Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); } break; @@ -2471,8 +2471,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, } // Constant fold FP operations. - ConstantFPSDNode *N1CFP = dyn_cast(N1.Val); - ConstantFPSDNode *N2CFP = dyn_cast(N2.Val); + ConstantFPSDNode *N1CFP = dyn_cast(N1.getNode()); + ConstantFPSDNode *N2CFP = dyn_cast(N2.getNode()); if (N1CFP) { if (!N2CFP && isCommutativeBinOp(Opcode)) { // Cannonicalize constant to RHS if commutative @@ -2615,8 +2615,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue N1, SDValue N2, SDValue N3) { // Perform various simplifications. - ConstantSDNode *N1C = dyn_cast(N1.Val); - ConstantSDNode *N2C = dyn_cast(N2.Val); + ConstantSDNode *N1C = dyn_cast(N1.getNode()); + ConstantSDNode *N2C = dyn_cast(N2.getNode()); switch (Opcode) { case ISD::CONCAT_VECTORS: // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to @@ -2624,16 +2624,16 @@ SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, if (N1.getOpcode() == ISD::BUILD_VECTOR && N2.getOpcode() == ISD::BUILD_VECTOR && N3.getOpcode() == ISD::BUILD_VECTOR) { - SmallVector Elts(N1.Val->op_begin(), N1.Val->op_end()); - Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); - Elts.insert(Elts.end(), N3.Val->op_begin(), N3.Val->op_end()); + SmallVector Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); + Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); + Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); } break; case ISD::SETCC: { // Use FoldSetCC to simplify SETCC's. SDValue Simp = FoldSetCC(VT, N1, N2, cast(N3)->get()); - if (Simp.Val) return Simp; + if (Simp.getNode()) return Simp; break; } case ISD::SELECT: @@ -3049,7 +3049,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, SDValue Result = getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); - if (Result.Val) + if (Result.getNode()) return Result; } @@ -3059,7 +3059,7 @@ SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, AlwaysInline, DstSV, DstSVOff, SrcSV, SrcSVOff); - if (Result.Val) + if (Result.getNode()) return Result; // If we really need inline code and the target declined to provide it, @@ -3103,7 +3103,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, SDValue Result = getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); - if (Result.Val) + if (Result.getNode()) return Result; } @@ -3112,7 +3112,7 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, SDValue Result = TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, DstSV, DstSVOff, SrcSV, SrcSVOff); - if (Result.Val) + if (Result.getNode()) return Result; // Emit a library call. @@ -3146,7 +3146,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, SDValue Result = getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, DstSV, DstSVOff); - if (Result.Val) + if (Result.getNode()) return Result; } @@ -3155,7 +3155,7 @@ SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, SDValue Result = TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, DstSV, DstSVOff); - if (Result.Val) + if (Result.getNode()) return Result; // Emit a library call. @@ -3737,7 +3737,7 @@ SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { /// input node is returned. As a degenerate case, if you specify the same /// input operands as the node already has, the input node is returned. SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { - SDNode *N = InN.Val; + SDNode *N = InN.getNode(); assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); // Check to see if there is no change. @@ -3756,7 +3756,7 @@ SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { N->OperandList[0].getVal()->removeUser(0, N); N->OperandList[0] = Op; N->OperandList[0].setUser(N); - Op.Val->addUser(0, N); + Op.getNode()->addUser(0, N); // If this gets put into a CSE map, add it. if (InsertPos) CSEMap.InsertNode(N, InsertPos); @@ -3765,7 +3765,7 @@ SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { SDValue SelectionDAG:: UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { - SDNode *N = InN.Val; + SDNode *N = InN.getNode(); assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); // Check to see if there is no change. @@ -3786,13 +3786,13 @@ UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { N->OperandList[0].getVal()->removeUser(0, N); N->OperandList[0] = Op1; N->OperandList[0].setUser(N); - Op1.Val->addUser(0, N); + Op1.getNode()->addUser(0, N); } if (N->OperandList[1] != Op2) { N->OperandList[1].getVal()->removeUser(1, N); N->OperandList[1] = Op2; N->OperandList[1].setUser(N); - Op2.Val->addUser(1, N); + Op2.getNode()->addUser(1, N); } // If this gets put into a CSE map, add it. @@ -3822,7 +3822,7 @@ UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue SelectionDAG:: UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { - SDNode *N = InN.Val; + SDNode *N = InN.getNode(); assert(N->getNumOperands() == NumOps && "Update with wrong number of operands"); @@ -3853,7 +3853,7 @@ UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { N->OperandList[i].getVal()->removeUser(i, N); N->OperandList[i] = Ops[i]; N->OperandList[i].setUser(N); - Ops[i].Val->addUser(i, N); + Ops[i].getNode()->addUser(i, N); } } @@ -4134,70 +4134,70 @@ SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, /// node of the specified opcode and operands, it returns that node instead of /// the current one. SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { - return getNode(~Opcode, VT).Val; + return getNode(~Opcode, VT).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { - return getNode(~Opcode, VT, Op1).Val; + return getNode(~Opcode, VT, Op1).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1, SDValue Op2) { - return getNode(~Opcode, VT, Op1, Op2).Val; + return getNode(~Opcode, VT, Op1, Op2).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1, SDValue Op2, SDValue Op3) { - return getNode(~Opcode, VT, Op1, Op2, Op3).Val; + return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, const SDValue *Ops, unsigned NumOps) { - return getNode(~Opcode, VT, Ops, NumOps).Val; + return getNode(~Opcode, VT, Ops, NumOps).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { const MVT *VTs = getNodeValueTypes(VT1, VT2); SDValue Op; - return getNode(~Opcode, VTs, 2, &Op, 0).Val; + return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, SDValue Op1) { const MVT *VTs = getNodeValueTypes(VT1, VT2); - return getNode(~Opcode, VTs, 2, &Op1, 1).Val; + return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, SDValue Op1, SDValue Op2) { const MVT *VTs = getNodeValueTypes(VT1, VT2); SDValue Ops[] = { Op1, Op2 }; - return getNode(~Opcode, VTs, 2, Ops, 2).Val; + return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) { const MVT *VTs = getNodeValueTypes(VT1, VT2); SDValue Ops[] = { Op1, Op2, Op3 }; - return getNode(~Opcode, VTs, 2, Ops, 3).Val; + return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, const SDValue *Ops, unsigned NumOps) { const MVT *VTs = getNodeValueTypes(VT1, VT2); - return getNode(~Opcode, VTs, 2, Ops, NumOps).Val; + return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, SDValue Op1, SDValue Op2) { const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); SDValue Ops[] = { Op1, Op2 }; - return getNode(~Opcode, VTs, 3, Ops, 2).Val; + return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) { const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); SDValue Ops[] = { Op1, Op2, Op3 }; - return getNode(~Opcode, VTs, 3, Ops, 3).Val; + return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, const SDValue *Ops, unsigned NumOps) { const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); - return getNode(~Opcode, VTs, 3, Ops, NumOps).Val; + return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, MVT VT4, @@ -4208,14 +4208,14 @@ SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, VTList.push_back(VT3); VTList.push_back(VT4); const MVT *VTs = getNodeValueTypes(VTList); - return getNode(~Opcode, VTs, 4, Ops, NumOps).Val; + return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); } SDNode *SelectionDAG::getTargetNode(unsigned Opcode, const std::vector &ResultTys, const SDValue *Ops, unsigned NumOps) { const MVT *VTs = getNodeValueTypes(ResultTys); return getNode(~Opcode, VTs, ResultTys.size(), - Ops, NumOps).Val; + Ops, NumOps).getNode(); } /// getNodeIfExists - Get the specified node if it's already available, or @@ -4240,10 +4240,10 @@ SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, /// void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, DAGUpdateListener *UpdateListener) { - SDNode *From = FromN.Val; + SDNode *From = FromN.getNode(); assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && "Cannot replace with this method!"); - assert(From != To.Val && "Cannot replace uses of with self"); + assert(From != To.getNode() && "Cannot replace uses of with self"); while (!From->use_empty()) { SDNode::use_iterator UI = From->use_begin(); @@ -4258,7 +4258,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, From->removeUser(operandNum, U); *I = To; I->setUser(U); - To.Val->addUser(operandNum, U); + To.getNode()->addUser(operandNum, U); } // Now that we have modified U, add it back to the CSE maps. If it already @@ -4305,7 +4305,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, I != E; ++I, ++operandNum) if (I->getVal() == From) { From->removeUser(operandNum, U); - I->getVal() = To; + I->getSDValue().setNode(To); To->addUser(operandNum, U); } @@ -4351,7 +4351,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, From->removeUser(operandNum, U); *I = ToOp; I->setUser(U); - ToOp.Val->addUser(operandNum, U); + ToOp.getNode()->addUser(operandNum, U); } // Now that we have modified U, add it back to the CSE maps. If it already @@ -4372,7 +4372,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, } /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving -/// uses of other values produced by From.Val alone. The Deleted vector is +/// uses of other values produced by From.getVal() alone. The Deleted vector is /// handled the same way as for ReplaceAllUsesWith. void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, DAGUpdateListener *UpdateListener){ @@ -4380,14 +4380,14 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, if (From == To) return; // Handle the simple, trivial, case efficiently. - if (From.Val->getNumValues() == 1) { + if (From.getNode()->getNumValues() == 1) { ReplaceAllUsesWith(From, To, UpdateListener); return; } - // Get all of the users of From.Val. We want these in a nice, + // Get all of the users of From.getNode(). We want these in a nice, // deterministically ordered and uniqued set, so we use a SmallSetVector. - SmallSetVector Users(From.Val->use_begin(), From.Val->use_end()); + SmallSetVector Users(From.getNode()->use_begin(), From.getNode()->use_end()); while (!Users.empty()) { // We know that this user uses some value of From. If it is the right @@ -4410,10 +4410,10 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, // Update all operands that match "From" in case there are multiple uses. for (; Op != E; ++Op) { if (*Op == From) { - From.Val->removeUser(Op-User->op_begin(), User); + From.getNode()->removeUser(Op-User->op_begin(), User); *Op = To; Op->setUser(User); - To.Val->addUser(Op-User->op_begin(), User); + To.getNode()->addUser(Op-User->op_begin(), User); } } @@ -4437,7 +4437,7 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, } /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving -/// uses of other values produced by From.Val alone. The same value may +/// uses of other values produced by From.getVal() alone. The same value may /// appear in both the From and To list. The Deleted vector is /// handled the same way as for ReplaceAllUsesWith. void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, @@ -4450,8 +4450,8 @@ void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, SmallVector, 16> Users; for (unsigned i = 0; i != Num; ++i) - for (SDNode::use_iterator UI = From[i].Val->use_begin(), - E = From[i].Val->use_end(); UI != E; ++UI) + for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), + E = From[i].getNode()->use_end(); UI != E; ++UI) Users.push_back(std::make_pair(*UI, i)); while (!Users.empty()) { @@ -4476,10 +4476,10 @@ void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, // Update all operands that match "From" in case there are multiple uses. for (; Op != E; ++Op) { if (*Op == From[i]) { - From[i].Val->removeUser(Op-User->op_begin(), User); + From[i].getNode()->removeUser(Op-User->op_begin(), User); *Op = To[i]; Op->setUser(User); - To[i].Val->addUser(Op-User->op_begin(), User); + To[i].getNode()->addUser(Op-User->op_begin(), User); } } @@ -4617,7 +4617,7 @@ MachineMemOperand MemSDNode::getMemOperand() const { // Check if the memory reference references a frame index const FrameIndexSDNode *FI = - dyn_cast(getBasePtr().Val); + dyn_cast(getBasePtr().getNode()); if (!getSrcValue() && FI) return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), Flags, 0, Size, getAlignment()); @@ -4746,7 +4746,7 @@ static void findPredecessor(SDNode *N, const SDNode *P, bool &found, return; for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { - SDNode *Op = N->getOperand(i).Val; + SDNode *Op = N->getOperand(i).getNode(); if (Op == P) { found = true; return; @@ -5115,13 +5115,13 @@ void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { OS << " "; for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { if (i) OS << ", "; - OS << (void*)getOperand(i).Val; + OS << (void*)getOperand(i).getNode(); if (unsigned RN = getOperand(i).getResNo()) OS << ":" << RN; } if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { - SDNode *Mask = getOperand(2).Val; + SDNode *Mask = getOperand(2).getNode(); OS << "<"; for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { if (i) OS << ","; @@ -5262,11 +5262,11 @@ void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) - if (N->getOperand(i).Val->hasOneUse()) - DumpNodes(N->getOperand(i).Val, indent+2, G); + if (N->getOperand(i).getNode()->hasOneUse()) + DumpNodes(N->getOperand(i).getNode(), indent+2, G); else cerr << "\n" << std::string(indent+2, ' ') - << (void*)N->getOperand(i).Val << ": "; + << (void*)N->getOperand(i).getNode() << ": "; cerr << "\n" << std::string(indent, ' '); @@ -5279,11 +5279,11 @@ void SelectionDAG::dump() const { for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) { const SDNode *N = I; - if (!N->hasOneUse() && N != getRoot().Val) + if (!N->hasOneUse() && N != getRoot().getNode()) DumpNodes(N, 2, this); } - if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); + if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); cerr << "\n\n"; } diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 3f7754ba9b..f2246cac2c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -784,8 +784,8 @@ public: if (Root.getOpcode() != ISD::EntryToken) { unsigned i = 0, e = PendingExports.size(); for (; i != e; ++i) { - assert(PendingExports[i].Val->getNumOperands() > 1); - if (PendingExports[i].Val->getOperand(0) == Root) + assert(PendingExports[i].getNode()->getNumOperands() > 1); + if (PendingExports[i].getNode()->getOperand(0) == Root) break; // Don't add the root if we already indirectly depend on it. } @@ -824,7 +824,7 @@ public: void setValue(const Value *V, SDValue NewN) { SDValue &N = NodeMap[V]; - assert(N.Val == 0 && "Already set a value for this node!"); + assert(N.getNode() == 0 && "Already set a value for this node!"); N = NewN; } @@ -1286,7 +1286,7 @@ static void getCopyToParts(SelectionDAG &DAG, SDValue SelectionDAGLowering::getValue(const Value *V) { SDValue &N = NodeMap[V]; - if (N.Val) return N; + if (N.getNode()) return N; if (Constant *C = const_cast(dyn_cast(V))) { MVT VT = TLI.getValueType(V->getType(), true); @@ -1310,7 +1310,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) { if (ConstantExpr *CE = dyn_cast(C)) { visit(CE->getOpcode(), *CE); SDValue N1 = NodeMap[V]; - assert(N1.Val && "visit didn't populate the ValueMap!"); + assert(N1.getNode() && "visit didn't populate the ValueMap!"); return N1; } @@ -1318,7 +1318,7 @@ SDValue SelectionDAGLowering::getValue(const Value *V) { SmallVector Constants; for (User::const_op_iterator OI = C->op_begin(), OE = C->op_end(); OI != OE; ++OI) { - SDNode *Val = getValue(*OI).Val; + SDNode *Val = getValue(*OI).getNode(); for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i) Constants.push_back(SDValue(Val, i)); } @@ -1428,7 +1428,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { else if (F->paramHasAttr(0, ParamAttr::ZExt)) ExtendKind = ISD::ZERO_EXTEND; - getCopyToParts(DAG, SDValue(RetOp.Val, RetOp.getResNo() + j), + getCopyToParts(DAG, SDValue(RetOp.getNode(), RetOp.getResNo() + j), &Parts[0], NumParts, PartVT, ExtendKind); for (unsigned i = 0; i < NumParts; ++i) { @@ -2855,15 +2855,15 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) { // Copy the beginning value(s) from the original aggregate. for (; i != LinearIndex; ++i) Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) : - SDValue(Agg.Val, Agg.getResNo() + i); + SDValue(Agg.getNode(), Agg.getResNo() + i); // Copy values from the inserted value(s). for (; i != LinearIndex + NumValValues; ++i) Values[i] = FromUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) : - SDValue(Val.Val, Val.getResNo() + i - LinearIndex); + SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex); // Copy remaining value(s) from the original aggregate. for (; i != NumAggValues; ++i) Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) : - SDValue(Agg.Val, Agg.getResNo() + i); + SDValue(Agg.getNode(), Agg.getResNo() + i); setValue(&I, DAG.getMergeValues(DAG.getVTList(&AggValueVTs[0], NumAggValues), &Values[0], NumAggValues)); @@ -2888,8 +2888,8 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) { // Copy out the selected value(s). for (unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++i) Values[i - LinearIndex] = - OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.Val->getValueType(Agg.getResNo() + i)) : - SDValue(Agg.Val, Agg.getResNo() + i); + OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.getNode()->getValueType(Agg.getResNo() + i)) : + SDValue(Agg.getNode(), Agg.getResNo() + i); setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValValueVTs[0], NumValValues), &Values[0], NumValValues)); @@ -3084,7 +3084,7 @@ void SelectionDAGLowering::visitStore(StoreInst &I) { bool isVolatile = I.isVolatile(); unsigned Alignment = I.getAlignment(); for (unsigned i = 0; i != NumValues; ++i) - Chains[i] = DAG.getStore(Root, SDValue(Src.Val, Src.getResNo() + i), + Chains[i] = DAG.getStore(Root, SDValue(Src.getNode(), Src.getResNo() + i), DAG.getNode(ISD::ADD, PtrVT, Ptr, DAG.getConstant(Offsets[i], PtrVT)), PtrV, Offsets[i], @@ -3154,7 +3154,7 @@ void SelectionDAGLowering::visitTargetIntrinsic(CallInst &I, &Ops[0], Ops.size()); if (HasChain) { - SDValue Chain = Result.getValue(Result.Val->getNumValues()-1); + SDValue Chain = Result.getValue(Result.getNode()->getNumValues()-1); if (OnlyLoad) PendingLoads.push_back(Chain); else @@ -3621,7 +3621,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Value *Alloca = I.getOperand(1); Constant *TypeMap = cast(I.getOperand(2)); - FrameIndexSDNode *FI = cast(getValue(Alloca).Val); + FrameIndexSDNode *FI = cast(getValue(Alloca).getNode()); GFI->addStackRoot(FI->getIndex(), TypeMap); } return 0; @@ -4751,7 +4751,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { // Finish up input operands. AsmNodeOperands[0] = Chain; - if (Flag.Val) AsmNodeOperands.push_back(Flag); + if (Flag.getNode()) AsmNodeOperands.push_back(Flag); Chain = DAG.getNode(ISD::INLINEASM, DAG.getNodeValueTypes(MVT::Other, MVT::Flag), 2, @@ -4770,7 +4770,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { // bit_convert. if (const StructType *ResSTy = dyn_cast(CS.getType())) { for (unsigned i = 0, e = ResSTy->getNumElements(); i != e; ++i) { - if (Val.Val->getValueType(i).isVector()) + if (Val.getNode()->getValueType(i).isVector()) Val = DAG.getNode(ISD::BIT_CONVERT, TLI.getValueType(ResSTy->getElementType(i)), Val); } @@ -4963,7 +4963,7 @@ void TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, // Create the node. SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS, DAG.getVTList(&RetVals[0], RetVals.size()), - &Ops[0], Ops.size()).Val; + &Ops[0], Ops.size()).getNode(); // Prelower FORMAL_ARGUMENTS. This isn't required for functionality, but // allows exposing the loads that may be part of the argument access to the @@ -4972,18 +4972,18 @@ void TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, // The number of results should match up, except that the lowered one may have // an extra flag result. - assert((Result->getNumValues() == TmpRes.Val->getNumValues() || - (Result->getNumValues()+1 == TmpRes.Val->getNumValues() && + assert((Result->getNumValues() == TmpRes.getNode()->getNumValues() || + (Result->getNumValues()+1 == TmpRes.getNode()->getNumValues() && TmpRes.getValue(Result->getNumValues()).getValueType() == MVT::Flag)) && "Lowering produced unexpected number of results!"); // The FORMAL_ARGUMENTS node itself is likely no longer needed. - if (Result != TmpRes.Val && Result->use_empty()) { + if (Result != TmpRes.getNode() && Result->use_empty()) { HandleSDNode Dummy(DAG.getRoot()); DAG.RemoveDeadNode(Result); } - Result = TmpRes.Val; + Result = TmpRes.getNode(); unsigned NumArgRegs = Result->getNumValues() - 1; DAG.setRoot(SDValue(Result, NumArgRegs)); @@ -5044,7 +5044,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, Value != NumValues; ++Value) { MVT VT = ValueVTs[Value]; const Type *ArgTy = VT.getTypeForMVT(); - SDValue Op = SDValue(Args[i].Node.Val, Args[i].Node.getResNo() + Value); + SDValue Op = SDValue(Args[i].Node.getNode(), Args[i].Node.getResNo() + Value); ISD::ArgFlagsTy Flags; unsigned OriginalAlignment = getTargetData()->getABITypeAlignment(ArgTy); @@ -5333,7 +5333,7 @@ static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, // Find RET node. if (Terminator.getOpcode() == ISD::RET) { - Ret = Terminator.Val; + Ret = Terminator.getNode(); } // Fix tail call attribute of CALL nodes. @@ -5355,8 +5355,8 @@ static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, // Not eligible. Mark CALL node as non tail call. SmallVector Ops; unsigned idx=0; - for(SDNode::op_iterator I =OpCall.Val->op_begin(), - E = OpCall.Val->op_end(); I != E; I++, idx++) { + for(SDNode::op_iterator I =OpCall.getNode()->op_begin(), + E = OpCall.getNode()->op_end(); I != E; I++, idx++) { if (idx!=3) Ops.push_back(*I); else @@ -5369,8 +5369,8 @@ static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, SmallVector Ops; SDValue Chain = OpCall.getOperand(0), InFlag; unsigned idx=0; - for(SDNode::op_iterator I = OpCall.Val->op_begin(), - E = OpCall.Val->op_end(); I != E; I++, idx++) { + for(SDNode::op_iterator I = OpCall.getNode()->op_begin(), + E = OpCall.getNode()->op_end(); I != E; I++, idx++) { SDValue Arg = *I; if (idx > 4 && (idx % 2)) { bool isByVal = cast(OpCall.getOperand(idx+1))-> @@ -5557,7 +5557,7 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() { SmallPtrSet VisitedNodes; SmallVector Worklist; - Worklist.push_back(CurDAG->getRoot().Val); + Worklist.push_back(CurDAG->getRoot().getNode()); APInt Mask; APInt KnownZero; @@ -5574,7 +5574,7 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() { // Otherwise, add all chain operands to the worklist. for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) if (N->getOperand(i).getValueType() == MVT::Other) - Worklist.push_back(N->getOperand(i).Val); + Worklist.push_back(N->getOperand(i).getNode()); // If this is a CopyToReg with a vreg dest, process it. if (N->getOpcode() != ISD::CopyToReg) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp index 990308f1db..fba1b261e8 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp @@ -109,8 +109,8 @@ namespace llvm { static void addCustomGraphFeatures(SelectionDAG *G, GraphWriter &GW) { GW.emitSimpleNode(0, "plaintext=circle", "GraphRoot"); - if (G->getRoot().Val) - GW.emitEdge(0, -1, G->getRoot().Val, G->getRoot().getResNo(), + if (G->getRoot().getNode()) + GW.emitEdge(0, -1, G->getRoot().getNode(), G->getRoot().getResNo(), "color=blue,style=dashed"); } }; @@ -356,7 +356,7 @@ namespace llvm { static void addCustomGraphFeatures(ScheduleDAG *G, GraphWriter &GW) { GW.emitSimpleNode(0, "plaintext=circle", "GraphRoot"); - const SDNode *N = G->DAG.getRoot().Val; + const SDNode *N = G->DAG.getRoot().getNode(); if (N && N->getNodeId() != -1) GW.emitEdge(0, -1, &G->SUnits[N->getNodeId()], -1, "color=blue,style=dashed"); diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 872e0b5c4f..6a2f91fc66 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -674,7 +674,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, KnownZero = KnownOne = APInt(BitWidth, 0); // Other users may use these bits. - if (!Op.Val->hasOneUse()) { + if (!Op.getNode()->hasOneUse()) { if (Depth != 0) { // If not at the root, Just compute the KnownZero/KnownOne bits to // simplify things downstream. @@ -1131,7 +1131,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, // If the input is only used by this truncate, see if we can shrink it based // on the known demanded bits. - if (Op.getOperand(0).Val->hasOneUse()) { + if (Op.getOperand(0).getNode()->hasOneUse()) { SDValue In = Op.getOperand(0); unsigned InBitWidth = In.getValueSizeInBits(); switch (In.getOpcode()) { @@ -1259,9 +1259,9 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, case ISD::SETTRUE2: return DAG.getConstant(1, VT); } - if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { + if (ConstantSDNode *N1C = dyn_cast(N1.getNode())) { const APInt &C1 = N1C->getAPIntValue(); - if (isa(N0.Val)) { + if (isa(N0.getNode())) { return DAG.FoldSetCC(VT, N0, N1, Cond); } else { // If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an @@ -1356,7 +1356,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, DAG.getConstant(Imm, Op0Ty)); } if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(ZextOp.Val); + DCI.AddToWorklist(ZextOp.getNode()); // Otherwise, make this a use of a zext. return DAG.getSetCC(VT, ZextOp, DAG.getConstant(C1 & APInt::getLowBitsSet( @@ -1493,16 +1493,16 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } } } - } else if (isa(N0.Val)) { + } else if (isa(N0.getNode())) { // Ensure that the constant occurs on the RHS. return DAG.getSetCC(VT, N1, N0, ISD::getSetCCSwappedOperands(Cond)); } - if (isa(N0.Val)) { + if (isa(N0.getNode())) { // Constant fold or commute setcc. SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond); - if (O.Val) return O; - } else if (ConstantFPSDNode *CFP = dyn_cast(N1.Val)) { + if (O.getNode()) return O; + } else if (ConstantFPSDNode *CFP = dyn_cast(N1.getNode())) { // If the RHS of an FP comparison is a constant, simplify it away in // some cases. if (CFP->getValueAPF().isNaN()) { @@ -1564,7 +1564,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, if (ConstantSDNode *RHSC = dyn_cast(N1)) { if (ConstantSDNode *LHSR = dyn_cast(N0.getOperand(1))) { // Turn (X+C1) == C2 --> X == C2-C1 - if (N0.getOpcode() == ISD::ADD && N0.Val->hasOneUse()) { + if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) { return DAG.getSetCC(VT, N0.getOperand(0), DAG.getConstant(RHSC->getValue()-LHSR->getValue(), N0.getValueType()), Cond); @@ -1585,7 +1585,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, // Turn (C1-X) == C2 --> X == C1-C2 if (ConstantSDNode *SUBC = dyn_cast(N0.getOperand(0))) { - if (N0.getOpcode() == ISD::SUB && N0.Val->hasOneUse()) { + if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) { return DAG.getSetCC(VT, N0.getOperand(1), DAG.getConstant(SUBC->getAPIntValue() - @@ -1604,14 +1604,14 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, if (DAG.isCommutativeBinOp(N0.getOpcode())) return DAG.getSetCC(VT, N0.getOperand(0), DAG.getConstant(0, N0.getValueType()), Cond); - else if (N0.Val->hasOneUse()) { + else if (N0.getNode()->hasOneUse()) { assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!"); // (Z-X) == X --> Z == X<<1 SDValue SH = DAG.getNode(ISD::SHL, N1.getValueType(), N1, DAG.getConstant(1, getShiftAmountTy())); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(SH.Val); + DCI.AddToWorklist(SH.getNode()); return DAG.getSetCC(VT, N0.getOperand(0), SH, Cond); } } @@ -1627,13 +1627,13 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, if (DAG.isCommutativeBinOp(N1.getOpcode())) { return DAG.getSetCC(VT, N1.getOperand(0), DAG.getConstant(0, N1.getValueType()), Cond); - } else if (N1.Val->hasOneUse()) { + } else if (N1.getNode()->hasOneUse()) { assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); // X == (Z-X) --> X<<1 == Z SDValue SH = DAG.getNode(ISD::SHL, N1.getValueType(), N0, DAG.getConstant(1, getShiftAmountTy())); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(SH.Val); + DCI.AddToWorklist(SH.getNode()); return DAG.getSetCC(VT, SH, N1.getOperand(0), Cond); } } @@ -1649,7 +1649,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, N1); N0 = DAG.getNode(ISD::XOR, MVT::i1, Temp, DAG.getConstant(1, MVT::i1)); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(Temp.Val); + DCI.AddToWorklist(Temp.getNode()); break; case ISD::SETNE: // X != Y --> (X^Y) N0 = DAG.getNode(ISD::XOR, MVT::i1, N0, N1); @@ -1659,21 +1659,21 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1)); N0 = DAG.getNode(ISD::AND, MVT::i1, N1, Temp); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(Temp.Val); + DCI.AddToWorklist(Temp.getNode()); break; case ISD::SETLT: // X X == 1 & Y == 0 --> Y^1 & X case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X Temp = DAG.getNode(ISD::XOR, MVT::i1, N1, DAG.getConstant(1, MVT::i1)); N0 = DAG.getNode(ISD::AND, MVT::i1, N0, Temp); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(Temp.Val); + DCI.AddToWorklist(Temp.getNode()); break; case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1)); N0 = DAG.getNode(ISD::OR, MVT::i1, N1, Temp); if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(Temp.Val); + DCI.AddToWorklist(Temp.getNode()); break; case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X @@ -1683,7 +1683,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } if (VT != MVT::i1) { if (!DCI.isCalledByLegalizer()) - DCI.AddToWorklist(N0.Val); + DCI.AddToWorklist(N0.getNode()); // FIXME: If running after legalize, we probably can't do this. N0 = DAG.getNode(ISD::ZERO_EXTEND, VT, N0); } @@ -1708,13 +1708,13 @@ bool TargetLowering::isGAPlusOffset(SDNode *N, GlobalValue* &GA, if (N->getOpcode() == ISD::ADD) { SDValue N1 = N->getOperand(0); SDValue N2 = N->getOperand(1); - if (isGAPlusOffset(N1.Val, GA, Offset)) { + if (isGAPlusOffset(N1.getNode(), GA, Offset)) { ConstantSDNode *V = dyn_cast(N2); if (V) { Offset += V->getSignExtended(); return true; } - } else if (isGAPlusOffset(N2.Val, GA, Offset)) { + } else if (isGAPlusOffset(N2.getNode(), GA, Offset)) { ConstantSDNode *V = dyn_cast(N1); if (V) { Offset += V->getSignExtended(); @@ -1732,7 +1732,7 @@ bool TargetLowering::isGAPlusOffset(SDNode *N, GlobalValue* &GA, bool TargetLowering::isConsecutiveLoad(SDNode *LD, SDNode *Base, unsigned Bytes, int Dist, const MachineFrameInfo *MFI) const { - if (LD->getOperand(0).Val != Base->getOperand(0).Val) + if (LD->getOperand(0).getNode() != Base->getOperand(0).getNode()) return false; MVT VT = LD->getValueType(0); if (VT.getSizeInBits() / 8 != Bytes) @@ -1755,8 +1755,8 @@ bool TargetLowering::isConsecutiveLoad(SDNode *LD, SDNode *Base, GlobalValue *GV2 = NULL; int64_t Offset1 = 0; int64_t Offset2 = 0; - bool isGA1 = isGAPlusOffset(Loc.Val, GV1, Offset1); - bool isGA2 = isGAPlusOffset(BaseLoc.Val, GV2, Offset2); + bool isGA1 = isGAPlusOffset(Loc.getNode(), GV1, Offset1); + bool isGA2 = isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); if (isGA1 && isGA2 && GV1 == GV2) return Offset1 == (Offset2 + Dist*Bytes); return false; @@ -1979,7 +1979,7 @@ static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, // For example, on X86 we might have an 'rI' constraint. If the operand // is an integer in the range [0..31] we want to use I (saving a load // of a register), otherwise we must use 'r'. - if (CType == TargetLowering::C_Other && Op.Val) { + if (CType == TargetLowering::C_Other && Op.getNode()) { assert(OpInfo.Codes[i].size() == 1 && "Unhandled multi-letter 'other' constraint"); std::vector ResultOps; @@ -2273,34 +2273,34 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, else if (isOperationLegal(ISD::SMUL_LOHI, VT)) Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, DAG.getVTList(VT, VT), N->getOperand(0), - DAG.getConstant(magics.m, VT)).Val, 1); + DAG.getConstant(magics.m, VT)).getNode(), 1); else return SDValue(); // No mulhs or equvialent // If d > 0 and m < 0, add the numerator if (d > 0 && magics.m < 0) { Q = DAG.getNode(ISD::ADD, VT, Q, N->getOperand(0)); if (Created) - Created->push_back(Q.Val); + Created->push_back(Q.getNode()); } // If d < 0 and m > 0, subtract the numerator. if (d < 0 && magics.m > 0) { Q = DAG.getNode(ISD::SUB, VT, Q, N->getOperand(0)); if (Created) - Created->push_back(Q.Val); + Created->push_back(Q.getNode()); } // Shift right algebraic if shift value is nonzero if (magics.s > 0) { Q = DAG.getNode(ISD::SRA, VT, Q, DAG.getConstant(magics.s, getShiftAmountTy())); if (Created) - Created->push_back(Q.Val); + Created->push_back(Q.getNode()); } // Extract the sign bit and add it to the quotient SDValue T = DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(VT.getSizeInBits()-1, getShiftAmountTy())); if (Created) - Created->push_back(T.Val); + Created->push_back(T.getNode()); return DAG.getNode(ISD::ADD, VT, Q, T); } @@ -2327,11 +2327,11 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG, else if (isOperationLegal(ISD::UMUL_LOHI, VT)) Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, DAG.getVTList(VT, VT), N->getOperand(0), - DAG.getConstant(magics.m, VT)).Val, 1); + DAG.getConstant(magics.m, VT)).getNode(), 1); else return SDValue(); // No mulhu or equvialent if (Created) - Created->push_back(Q.Val); + Created->push_back(Q.getNode()); if (magics.a == 0) { return DAG.getNode(ISD::SRL, VT, Q, @@ -2339,14 +2339,14 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG, } else { SDValue NPQ = DAG.getNode(ISD::SUB, VT, N->getOperand(0), Q); if (Created) - Created->push_back(NPQ.Val); + Created->push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::SRL, VT, NPQ, DAG.getConstant(1, getShiftAmountTy())); if (Created) - Created->push_back(NPQ.Val); + Created->push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::ADD, VT, NPQ, Q); if (Created) - Created->push_back(NPQ.Val); + Created->push_back(NPQ.getNode()); return DAG.getNode(ISD::SRL, VT, NPQ, DAG.getConstant(magics.s-1, getShiftAmountTy())); } -- cgit v1.2.3