From 2d90ac7ca6117d3b160dde8a4f322c1079a6ffce Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Thu, 4 May 2006 18:05:43 +0000
Subject: Rename MO_VirtualRegister -> MO_Register.  Clean up immediate
 handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/MachineInstr.cpp             | 4 ++--
 lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

(limited to 'lib/CodeGen')

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index b1fb52a13a..f2a604cf6d 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -138,7 +138,7 @@ static void print(const MachineOperand &MO, std::ostream &OS,
   if (TM) MRI = TM->getRegisterInfo();
 
   switch (MO.getType()) {
-  case MachineOperand::MO_VirtualRegister:
+  case MachineOperand::MO_Register:
     OutputReg(OS, MO.getReg(), MRI);
     break;
   case MachineOperand::MO_Immediate:
@@ -235,7 +235,7 @@ std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
 
 std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
   switch (MO.getType()) {
-  case MachineOperand::MO_VirtualRegister:
+  case MachineOperand::MO_Register:
     OutputReg(OS, MO.getReg());
     break;
   case MachineOperand::MO_Immediate:
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 2b7b877cb1..cf1227964a 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -104,7 +104,7 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op,
     }
   } else if (ConstantSDNode *C =
              dyn_cast<ConstantSDNode>(Op)) {
-    MI->addZeroExtImm64Operand(C->getValue());
+    MI->addImmOperand(C->getValue());
   } else if (RegisterSDNode*R =
              dyn_cast<RegisterSDNode>(Op)) {
     MI->addRegOperand(R->getReg(), MachineOperand::Use);
@@ -303,7 +303,7 @@ void ScheduleDAG::EmitNode(SDNode *Node,
         unsigned Flags = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
         unsigned NumVals = Flags >> 3;
         
-        MI->addZeroExtImm64Operand(Flags);
+        MI->addImmOperand(Flags);
         ++i;  // Skip the ID value.
         
         switch (Flags & 7) {
@@ -323,7 +323,7 @@ void ScheduleDAG::EmitNode(SDNode *Node,
         case 3: { // Immediate.
           assert(NumVals == 1 && "Unknown immediate value!");
           uint64_t Val = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
-          MI->addZeroExtImm64Operand(Val);
+          MI->addImmOperand(Val);
           ++i;
           break;
         }
-- 
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