From 63307c335aa08b0d6a75f81d64d79af7e90eb78b Mon Sep 17 00:00:00 2001 From: Mon P Wang Date: Mon, 5 May 2008 19:05:59 +0000 Subject: Added addition atomic instrinsics and, or, xor, min, and max. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'include/llvm/Target') diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 5f8c1c2ae4..0b8dda8f97 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -1340,12 +1340,15 @@ private: /// by the system, this holds the same type (e.g. i32 -> i32). MVT::ValueType TransformToType[MVT::LAST_VALUETYPE]; + // Defines the capacity of the TargetLowering::OpActions table + static const int OpActionsCapacity = 173; + /// OpActions - For each operation and each value type, keep a LegalizeAction /// that indicates how instruction selection should deal with the operation. /// Most operations are Legal (aka, supported natively by the target), but /// operations that are not should be described. Note that operations on /// non-legal value types are not described here. - uint64_t OpActions[156]; + uint64_t OpActions[OpActionsCapacity]; /// LoadXActions - For each load of load extension type and each value type, /// keep a LegalizeAction that indicates how instruction selection should deal @@ -1378,7 +1381,7 @@ private: /// TargetDAGCombineArray - Targets can specify ISD nodes that they would /// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(), /// which sets a bit in this array. - unsigned char TargetDAGCombineArray[160/(sizeof(unsigned char)*8)]; + unsigned char TargetDAGCombineArray[168/(sizeof(unsigned char)*8)]; /// PromoteToType - For operations that must be promoted to a specific type, /// this holds the destination type. This map should be sparse, so don't hold -- cgit v1.2.3