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path: root/lib/CodeGen/PostRASchedulerList.cpp
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* - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng2010-05-211-2/+2
| | | | | | | | | | | that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dbg_value workaround and associated command line optionJim Grosbach2010-05-201-20/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104254 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable preserving debug information through post-RA schedulingJim Grosbach2010-05-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104175 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 column and trailing whitespace cleanupJim Grosbach2010-05-141-24/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103806 91177308-0d34-0410-b5e6-96231b3b80d8
* add cmd line option to leave dbgvalues in during post-RA sceduling. UsefulJim Grosbach2010-05-141-5/+14
| | | | | | while debugging what's mishandled about them in the post-RA pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103805 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-011-2/+2
| | | | | | | changes before doing phi lowering for switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
* As a temporary workaround for post-RA not handling DebugValue instructions,Bob Wilson2010-04-171-0/+11
| | | | | | | | just remove them all. Radar 7873207 (working around the root problem of Radar 7759363). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101604 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a #include.Dan Gohman2010-04-121-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101043 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some more places where dbg_value affected codegen.Dale Johannesen2010-03-051-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97765 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-051-13/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92594 91177308-0d34-0410-b5e6-96231b3b80d8
* <rdar://problem/7453528>. Track only physical registers that are valid for ↵David Goodwin2009-12-091-1/+2
| | | | | | the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90970 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't hang on to pointers or references after vector::push_back.Jakob Stoklund Olesen2009-12-031-6/+3
| | | | | | | The MO reference to a MachineOperand can be invalidated by MachineInstr::addOperand. Don't even use it for debugging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90381 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some old experimental code that is no longer needed. Remove ↵David Goodwin2009-11-201-112/+33
| | | | | | additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89471 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow target to specify regclass for which antideps will only be broken ↵David Goodwin2009-11-131-3/+3
| | | | | | along the critical path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename registers to break output dependencies in addition to anti-dependencies.David Goodwin2009-11-121-3/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87015 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed to address code review. No functional changes.David Goodwin2009-11-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow targets to specify register classes whose member registers should not ↵David Goodwin2009-11-101-2/+3
| | | | | | be renamed to break anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
* Break anti-dependencies using free registers in a round-robin manner to ↵David Goodwin2009-11-051-2/+4
| | | | | | avoid introducing new anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86098 91177308-0d34-0410-b5e6-96231b3b80d8
* Do a scheduling pass ignoring anti-dependencies to identify candidate ↵David Goodwin2009-11-031-37/+112
| | | | | | registers that should be renamed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85939 91177308-0d34-0410-b5e6-96231b3b80d8
* Make -print-machineinstrs more readable.Dan Gohman2009-10-311-2/+2
| | | | | | | | | | | | | | | - Be consistent when referring to MachineBasicBlocks: BB#0. - Be consistent when referring to virtual registers: %reg1024. - Be consistent when referring to unknown physical registers: %physreg10. - Be consistent when referring to known physical registers: %RAX - Be consistent when referring to register 0: %reg0 - Be consistent when printing alignments: align=16 - Print jump table contents. - Don't print host addresses, in general. - and various other cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
* Make AntiDepReg.h internal.David Goodwin2009-10-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85412 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the aggressive anti-dep breaker to process the same region multiple ↵David Goodwin2009-10-261-6/+13
| | | | | | times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85166 91177308-0d34-0410-b5e6-96231b3b80d8
* Define virtual destructor in *.cpp file.David Goodwin2009-10-261-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85146 91177308-0d34-0410-b5e6-96231b3b80d8
* Add aggressive anti-dependence breaker. Currently it is not the default for ↵David Goodwin2009-10-261-3/+5
| | | | | | any target. Enable with -break-anti-dependencies=all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85145 91177308-0d34-0410-b5e6-96231b3b80d8
* Break anti-dependence breaking out into its own class.David Goodwin2009-10-261-542/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | | VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-2/+2
| | | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the target to select the level of anti-dependence breaking that should ↵David Goodwin2009-10-221-5/+16
| | | | | | be performed by the post-RA scheduler. The default is none. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.Dan Gohman2009-10-211-489/+319
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
* Respect src register allocation requirements when breaking ↵David Goodwin2009-10-201-17/+20
| | | | | | anti-dependencies. Remove some dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84691 91177308-0d34-0410-b5e6-96231b3b80d8
* Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.David Goodwin2009-10-201-310/+477
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
* Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng2009-10-161-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
* If post-alloc scheduler is not enabled, it should return false, not true.Evan Cheng2009-10-161-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84248 91177308-0d34-0410-b5e6-96231b3b80d8
* Add debugging output.David Goodwin2009-10-131-2/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84011 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a missing initialization of PostRAScheduler's AA member.Dan Gohman2009-10-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83695 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-5/+13
| | | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a use-after-free in post-ra-scheduling.Benjamin Kramer2009-10-021-1/+3
| | | | | | | | MI->addOperand invalidates references to it's operands, avoid touching the operand after a new one was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83249 91177308-0d34-0410-b5e6-96231b3b80d8
* All callee-saved registers are live-out of a return block.David Goodwin2009-10-011-18/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83223 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove neonfp attribute and instead set default based on CPU string. Add ↵David Goodwin2009-10-011-1/+1
| | | | | | -arm-use-neon-fp to override the default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83218 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore the -post-RA-scheduler flag as an override for the target ↵David Goodwin2009-10-011-5/+17
| | | | | | specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MachineFrameInfo.getPristineRegs() to determine which callee-saved ↵David Goodwin2009-10-011-47/+30
| | | | | | registers are available for anti-dependency breaking. Some cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83208 91177308-0d34-0410-b5e6-96231b3b80d8
* Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not changeEvan Cheng2009-10-011-18/+55
| | | | | | | operands of instructions with these properties while breaking anti-dep. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83198 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix integer overflow in instruction scheduling. This can happen if we haveReid Kleckner2009-09-301-4/+4
| | | | | | | | | | | basic blocks that are so long that their size overflows a short. Also assert that overflow does not happen in the future, as requested by Evan. This fixes PR4401. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove -post-RA-schedule flag and add a TargetSubtarget method to enable ↵David Goodwin2009-09-301-0/+6
| | | | | | post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
* Use KILL instead of IMPLICIT_DEF in LowerSubregs pass.Jakob Stoklund Olesen2009-09-281-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83007 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in kill flag updating for post-register-allocation scheduling. When ↵David Goodwin2009-09-231-5/+48
| | | | | | the kill flag of a superreg needs to be cleared because there are one or more subregs live, we instead add implicit-defs of those subregs and leave the kill flag on the superreg. This allows us to end the live-range of the superreg without ending the live-ranges of the subregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82629 91177308-0d34-0410-b5e6-96231b3b80d8
* Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ↵Evan Cheng2009-09-181-2/+2
| | | | | | | | | sdisel will use to properly complete phi nodes. Not functionality change yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
* It's a bool, so treat it like one. Fixes a MSVC warning.Benjamin Kramer2009-09-061-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81112 91177308-0d34-0410-b5e6-96231b3b80d8
* Create our own block initializer for kill fixups as the scheduling one ↵David Goodwin2009-09-031-33/+63
| | | | | | wasn't doing the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80958 91177308-0d34-0410-b5e6-96231b3b80d8
* Add hidden flags to allow binary search of post-RA scheduling errors.David Goodwin2009-09-011-0/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80702 91177308-0d34-0410-b5e6-96231b3b80d8
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