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* Teach liveintervalanalysis about virtual registers which are defined by ↵Evan Cheng2010-05-051-14/+37
| | | | | | | | | | | reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 80 %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0 . . . 120 %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103102 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach PHI elimination to remove REG_SEQUENCE instructions and update ↵Evan Cheng2010-05-041-0/+24
| | | | | | | | | | | | | | references of the source operands with references of the destination with subreg indices. e.g. %reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ... %reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6 => %reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ... PHI elimination now does more than phi elimination. It is really a de-SSA pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103039 91177308-0d34-0410-b5e6-96231b3b80d8
* Print basic block numbers in live interval debug output. Since the rest of theBob Wilson2010-05-031-1/+2
| | | | | | | | | debug output is showing machine instructions, the IR-level basic block names aren't very meaningful, and because multiple machine basic blocks may be derived from one IR-level BB, they're also not unique. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102960 91177308-0d34-0410-b5e6-96231b3b80d8
* - Really preserve dbg_value instructions when the register is spilled.Evan Cheng2010-04-281-2/+3
| | | | | | | - Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102565 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-enable 102323 with fix: do not update dbg_value's with incorrect frame ↵Evan Cheng2010-04-261-20/+17
| | | | | | indices when the live interval are being re-materialized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102361 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporary disable spiller modifying dbg_value. It's breaking build.Evan Cheng2010-04-261-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102327 91177308-0d34-0410-b5e6-96231b3b80d8
* - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo ↵Evan Cheng2010-04-261-3/+17
| | | | | | | | | and rename it to emitFrameIndexDebugValue. - Teach spiller to modify DBG_VALUE instructions to reference spill slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102323 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman2010-04-131-1/+1
| | | | | | | | | MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101147 91177308-0d34-0410-b5e6-96231b3b80d8
* rename llvm::llvm_report_error -> llvm::report_fatal_errorChris Lattner2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce SpecificBumpPtrAllocator, a wrapper for BumpPtrAllocator which allowsBenjamin Kramer2010-03-301-6/+1
| | | | | | | | only a single type of object to be allocated. Use it to make VNInfo destruction typesafe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99919 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r99881 with some fixes: only call destructor in releaseMemory!Torok Edwin2010-03-301-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99883 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 99881, it brooke smooshlab's llvm-gcc-i386-darwin9.Torok Edwin2010-03-301-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99882 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce another Reset() method in BumpPtrAllocator that calls a destructorTorok Edwin2010-03-301-1/+6
| | | | | | | | | | | on all objects it has allocated, if they are all of the same size and alignment. Use this to destruct all VNInfos allocated in LiveIntervalAnalysis (PR6653). valnos is not reliable for this purpose, as seen in r99400 (which still leaked, and sometimes caused double frees). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99881 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid being influenced by the presence of dbg_value instructions.Evan Cheng2010-03-301-4/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99879 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert Edwin's change that is breaking MultiSource/Applications/ClamAV/clamscan.Bob Wilson2010-03-241-3/+1
| | | | | | | | | --- Reverse-merging r99400 into '.': D test/CodeGen/Generic/2010-03-24-liveintervalleak.ll U lib/CodeGen/LiveIntervalAnalysis.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99419 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix memory leak in liveintervals: the destructor for VNInfos must be called,Torok Edwin2010-03-241-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | otherwise the SmallVector it contains doesn't free its memory. In most cases LiveIntervalAnalysis could get away by not calling the destructor, because VNInfos are bumpptr-allocated, and smallvectors usually don't grow. However when the SmallVector does grow it always leaks. This is the valgrind shown leak from the original testcase: ==8206== 18,304 bytes in 151 blocks are definitely lost in loss record 164 of 164 ==8206== at 0x4A079C7: operator new(unsigned long) (vg_replace_malloc.c:220) ==8206== by 0x4DB7A7E: llvm::SmallVectorBase::grow_pod(unsigned long, unsigned long) (in /home/edwin/clam/git/builds/defaul t/libclamav/.libs/libclamav.so.6.1.0) ==8206== by 0x4F90382: llvm::VNInfo::addKill(llvm::SlotIndex) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libcl amav.so.6.1.0) ==8206== by 0x5126B5C: llvm::LiveIntervals::handleVirtualRegisterDef(llvm::MachineBasicBlock*, llvm::ilist_iterator<llvm::M achineInstr>, llvm::SlotIndex, llvm::MachineOperand&, unsigned int, llvm::LiveInterval&) (in /home/edwin/clam/git/builds/defau lt/libclamav/.libs/libclamav.so.6.1.0) ==8206== by 0x512725E: llvm::LiveIntervals::handleRegisterDef(llvm::MachineBasicBlock*, llvm::ilist_iterator<llvm::MachineI nstr>, llvm::SlotIndex, llvm::MachineOperand&, unsigned int) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav .so.6.1.0) ==8206== by 0x51278A8: llvm::LiveIntervals::computeIntervals() (in /home/edwin/clam/git/builds/default/libclamav/.libs/libc lamav.so.6.1.0) ==8206== by 0x5127CB4: llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&) (in /home/edwin/clam/git/builds/de fault/libclamav/.libs/libclamav.so.6.1.0) ==8206== by 0x4DAE935: llvm::FPPassManager::runOnFunction(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclama v/.libs/libclamav.so.6.1.0) ==8206== by 0x4DAEB10: llvm::FunctionPassManagerImpl::run(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclama v/.libs/libclamav.so.6.1.0) ==8206== by 0x4DAED3D: llvm::FunctionPassManager::run(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclamav/.l ibs/libclamav.so.6.1.0) ==8206== by 0x4D8BE8E: llvm::JIT::runJITOnFunctionUnlocked(llvm::Function*, llvm::MutexGuard const&) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav.so.6.1.0) ==8206== by 0x4D8CA72: llvm::JIT::getPointerToFunction(llvm::Function*) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav.so.6.1.0) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99400 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix liveintervals handling of dbg_value instructions.Evan Cheng2010-03-161-9/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98686 91177308-0d34-0410-b5e6-96231b3b80d8
* The check for coalescing a virtual register to a physical register, e.g.Evan Cheng2010-03-111-3/+3
| | | | | | | | | | cl = EXTRACT_SUBREG reg1024, 1, is overly conservative. It should check for overlaps of vr's live interval with the super registers of the physical register (ECX in this case) and let JoinIntervals() handle checking the coalescing feasibility against the physical register (cl in this case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98251 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in DEBUG_VALUE handling Devang ran into.Dale Johannesen2010-03-101-6/+3
| | | | | | | | I'll get this loop right yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98155 91177308-0d34-0410-b5e6-96231b3b80d8
* Use methods to determine if a LiveInterval is spillable.Jakob Stoklund Olesen2010-03-011-18/+26
| | | | | | Don't accidentally produce unspillable intervals for deeply nested loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97496 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep track of phi join registers explicitly in LiveVariables.Jakob Stoklund Olesen2010-02-231-52/+34
| | | | | | | | Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply defined registers. That doesn't work if the phi join is implicitly defined in all but one of the predecessors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96994 91177308-0d34-0410-b5e6-96231b3b80d8
* Always normalize spill weights, also for intervals created by spilling.Jakob Stoklund Olesen2010-02-181-0/+9
| | | | | | | | | | | | | | Moderate the weight given to very small intervals. The spill weight given to new intervals created when spilling was not normalized in the same way as the original spill weights calculated by CalcSpillWeights. That meant that restored registers would tend to hang around because they had a much higher spill weight that unspilled registers. This improves the runtime of a few tests by up to 10%, and there are no significant regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
* When I rewrote this loop per Chris' preference IDale Johannesen2010-02-101-0/+3
| | | | | | | | changed its behavior. Oops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95811 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite loop to suit Chris' preference.Dale Johannesen2010-02-101-16/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95749 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip DBG_VALUE many places in live intervals andDale Johannesen2010-02-101-21/+31
| | | | | | | | | | | register coalescing. This fixes many crashes and places where debug info affects codegen (when dbg.value is lowered to machine instructions, which it isn't yet in TOT). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95739 91177308-0d34-0410-b5e6-96231b3b80d8
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-17/+11
| | | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
* Run codegen dce pass for all targets at all optimization levels. Previously it'sEvan Cheng2010-02-061-0/+3
| | | | | | | | | | | only run for x86 with fastisel. I've found it being very effective in eliminating some obvious dead code as result of formal parameter lowering especially when tail call optimization eliminated the need for some of the loads from fixed frame objects. It also shrinks a number of the tests. A couple of tests no longer make sense and are now eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore DEBUG_VALUE when building live intervals;Dale Johannesen2010-01-221-4/+8
| | | | | | | | | this makes the code work transparently the same whether they're there or not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94240 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-041-47/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92529 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed slot index ranges for MachineBasicBlocks to be exclusive of endpoint.Lang Hames2009-12-221-9/+6
| | | | | | | This fixes an in-place update bug where code inserted at the end of basic blocks may not be covered by existing intervals which were live across the entire block. It is also consistent with the way ranges are specified for live intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91859 91177308-0d34-0410-b5e6-96231b3b80d8
* Reuse lowered phi nodes.Jakob Stoklund Olesen2009-12-161-26/+25
| | | | | | | | | | | | | | Tail duplication produces lots of identical phi nodes in different basic blocks. Teach PHIElimination to reuse the join registers when lowering a phi node that is identical to an already lowered node. This saves virtual registers, and more importantly it avoids creating copies the the coalescer doesn't know how to eliminate. Teach LiveIntervalAnalysis about the phi joins with multiple uses. This patch significantly reduces code size produced by -pre-regalloc-taildup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91549 91177308-0d34-0410-b5e6-96231b3b80d8
* Coalesce insert_subreg undef, x first to avoid phase ordering issue.Evan Cheng2009-12-111-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91103 91177308-0d34-0410-b5e6-96231b3b80d8
* Also attempt trivial coalescing for live intervals that end in a copy.Jakob Stoklund Olesen2009-12-101-30/+57
| | | | | | | | | | | | | | | The coalescer is supposed to clean these up, but when setting up parameters for a function call, there may be copies to physregs. If the defining instruction has been LICM'ed far away, the coalescer won't touch it. The register allocation hint does not always work - when the register allocator is backtracking, it clears the hints. This patch is more conservative than r90502, and does not break 483.xalancbmk/i686. It still breaks the PowerPC bootstrap, so it is disabled by default, and can be enabled with the -trivial-coalesce-ends option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91049 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a new "splitting" spiller.Lang Hames2009-12-091-2/+2
| | | | | | | | | | | | | | | | When a call is placed to spill an interval this spiller will first try to break the interval up into its component values. Single value intervals and intervals which have already been split (or are the result of previous splits) are spilled by the default spiller. Splitting intervals as described above may improve the performance of generated code in some circumstances. This work is experimental however, and it still miscompiles many benchmarks. It's not recommended for general use yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90951 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r90502. It was causing the llvm-gcc bootstrap on PPC to fail.Bill Wendling2009-12-051-47/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90653 91177308-0d34-0410-b5e6-96231b3b80d8
* Also attempt trivial coalescing for live intervals that end in a copy.Jakob Stoklund Olesen2009-12-041-7/+47
| | | | | | | | | | | | | The coalescer is supposed to clean these up, but when setting up parameters for a function call, there may be copies to physregs. If the defining instruction has been LICM'ed far away, the coalescer won't touch it. The register allocation hint does not always work - when the register allocator is backtracking, it clears the hints. This patch takes care of a few more cases that r90163 missed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90502 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up some loop logic.Jakob Stoklund Olesen2009-12-031-14/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90481 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR5391: support early clobber physical register def tied with a use (ewwww)Evan Cheng2009-12-011-4/+0
| | | | | | | | | - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8
* New virtual registers created for spill intervals should inherit allocation ↵Jakob Stoklund Olesen2009-11-301-0/+6
| | | | | | | | | | | | | | | | | | | hints from the original register. This helps us avoid silly copies when rematting values that are copied to a physical register: leaq _.str44(%rip), %rcx movq %rcx, %rsi call _strcmp becomes: leaq _.str44(%rip), %rsi call _strcmp The coalescer will not touch the movq because that would tie down the physical register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90163 91177308-0d34-0410-b5e6-96231b3b80d8
* More consistent labelling of basic blocks in debug outputJakob Stoklund Olesen2009-11-201-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89470 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-2/+2
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89428 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -early-coalescing optionJakob Stoklund Olesen2009-11-181-137/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89240 91177308-0d34-0410-b5e6-96231b3b80d8
* Hide a couple of options.Evan Cheng2009-11-091-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86522 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inverted conflict test in -early-coalesce.Jakob Stoklund Olesen2009-11-071-14/+15
| | | | | | | | | | A non-identity copy cannot be coalesced when the phi join destination register is live at the copy site. Also verify the condition that the PHI join source register is only used in the PHI join. Otherwise the coalescing is invalid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86322 91177308-0d34-0410-b5e6-96231b3b80d8
* The Indexes Patch.Lang Hames2009-11-031-635/+158
| | | | | | | | | | | | | | | | | | This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85979 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim unnecessary includes.Evan Cheng2009-10-201-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84597 91177308-0d34-0410-b5e6-96231b3b80d8
* If the physical register being spilled does not have an interval, spill its ↵Evan Cheng2009-10-201-5/+21
| | | | | | sub-registers instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman2009-10-091-94/+5
| | | | | | | | | | | | | | | is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
* isTriviallyReMaterializable checks theDan Gohman2009-10-091-2/+1
| | | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83671 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, andDan Gohman2009-10-071-23/+28
| | | | | | | teach it how to recognize invariant physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83476 91177308-0d34-0410-b5e6-96231b3b80d8
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