diff options
Diffstat (limited to 'lib')
60 files changed, 2702 insertions, 86 deletions
diff --git a/lib/Analysis/Android.mk b/lib/Analysis/Android.mk new file mode 100644 index 0000000000..3b0f124260 --- /dev/null +++ b/lib/Analysis/Android.mk @@ -0,0 +1,83 @@ +LOCAL_PATH:= $(call my-dir) + +analysis_SRC_FILES := \ + AliasAnalysis.cpp \ + AliasAnalysisCounter.cpp \ + AliasAnalysisEvaluator.cpp \ + AliasDebugger.cpp \ + AliasSetTracker.cpp \ + Analysis.cpp \ + BasicAliasAnalysis.cpp \ + CFGPrinter.cpp \ + CaptureTracking.cpp \ + ConstantFolding.cpp \ + DbgInfoPrinter.cpp \ + DebugInfo.cpp \ + DomPrinter.cpp \ + IVUsers.cpp \ + InlineCost.cpp \ + InstCount.cpp \ + InstructionSimplify.cpp \ + Interval.cpp \ + IntervalPartition.cpp \ + LazyValueInfo.cpp \ + LibCallAliasAnalysis.cpp \ + LibCallSemantics.cpp \ + LiveValues.cpp \ + Loads.cpp \ + NoAliasAnalysis.cpp \ + MemDepPrinter.cpp \ + MemoryBuiltins.cpp \ + MemoryDependenceAnalysis.cpp \ + RegionPass.cpp \ + LoopDependenceAnalysis.cpp \ + LoopInfo.cpp \ + LoopPass.cpp \ + PHITransAddr.cpp \ + PostDominators.cpp \ + ProfileEstimatorPass.cpp \ + ProfileInfo.cpp \ + ProfileInfoLoader.cpp \ + ProfileInfoLoaderPass.cpp \ + ProfileVerifierPass.cpp \ + ScalarEvolution.cpp \ + ScalarEvolutionAliasAnalysis.cpp \ + ScalarEvolutionExpander.cpp \ + ScalarEvolutionNormalization.cpp \ + SparsePropagation.cpp \ + Trace.cpp \ + TypeBasedAliasAnalysis.cpp \ + ValueTracking.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + $(analysis_SRC_FILES) \ + Lint.cpp \ + ModuleDebugInfoPrinter.cpp \ + RegionInfo.cpp \ + RegionPrinter.cpp + +LOCAL_MODULE:= libLLVMAnalysis + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_SRC_FILES) + +LOCAL_MODULE:= libLLVMAnalysis + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Analysis/IPA/Android.mk b/lib/Analysis/IPA/Android.mk new file mode 100644 index 0000000000..ffa9f44fb0 --- /dev/null +++ b/lib/Analysis/IPA/Android.mk @@ -0,0 +1,35 @@ +LOCAL_PATH:= $(call my-dir) + +analysis_ipa_SRC_FILES := \ + CallGraph.cpp \ + CallGraphSCCPass.cpp \ + FindUsedTypes.cpp \ + GlobalsModRef.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_ipa_SRC_FILES) + +LOCAL_MODULE:= libLLVMipa + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_ipa_SRC_FILES) + +LOCAL_MODULE:= libLLVMipa + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Analysis/NOTICE b/lib/Analysis/NOTICE new file mode 100644 index 0000000000..1b1047ca37 --- /dev/null +++ b/lib/Analysis/NOTICE @@ -0,0 +1,69 @@ +============================================================================== +LLVM Release License +============================================================================== +University of Illinois/NCSA +Open Source License + +Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign. +All rights reserved. + +Developed by: + + LLVM Team + + University of Illinois at Urbana-Champaign + + http://llvm.org + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal with +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimers. + + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimers in the + documentation and/or other materials provided with the distribution. + + * Neither the names of the LLVM Team, University of Illinois at + Urbana-Champaign, nor the names of its contributors may be used to + endorse or promote products derived from this Software without specific + prior written permission. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE +SOFTWARE. + +============================================================================== +Copyrights and Licenses for Third Party Software Distributed with LLVM: +============================================================================== +The LLVM software contains code written by third parties. Such software will +have its own individual LICENSE.TXT file in the directory in which it appears. +This file will describe the copyrights, license, and restrictions which apply +to that code. + +The disclaimer of warranty in the University of Illinois Open Source License +applies to all code in the LLVM Distribution, and nothing in any of the +other licenses gives permission to use the names of the LLVM Team or the +University of Illinois to endorse or promote products derived from this +Software. + +The following pieces of software have additional or alternate copyrights, +licenses, and/or restrictions: + +Program Directory +------- --------- +Autoconf llvm/autoconf + llvm/projects/ModuleMaker/autoconf + llvm/projects/sample/autoconf +CellSPU backend llvm/lib/Target/CellSPU/README.txt +Google Test llvm/utils/unittest/googletest +OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex} diff --git a/lib/Analysis/ProfileInfo.cpp b/lib/Analysis/ProfileInfo.cpp index 51dee2d13f..835515e09e 100644 --- a/lib/Analysis/ProfileInfo.cpp +++ b/lib/Analysis/ProfileInfo.cpp @@ -249,7 +249,7 @@ const BasicBlock *ProfileInfoT<Function,BasicBlock>:: succ_const_iterator Succ = succ_begin(BB), End = succ_end(BB); if (Succ == End) { - P[0] = BB; + P[ reinterpret_cast<const llvm::BasicBlock*>(0) ] = BB; if (Mode & GetPathToExit) { hasFoundPath = true; BB = 0; @@ -752,10 +752,10 @@ void ProfileInfoT<Function,BasicBlock>::repair(const Function *F) { Succ != End; ++Succ) { Path P; GetPath(*Succ, 0, P, GetPathToExit); - if (Dest && Dest != P[0]) { + if (Dest && Dest != P[ reinterpret_cast<const llvm::BasicBlock*>(0) ]) { AllEdgesHaveSameReturn = false; } - Dest = P[0]; + Dest = P[ reinterpret_cast<const llvm::BasicBlock*>(0) ]; } if (AllEdgesHaveSameReturn) { if(EstimateMissingEdges(BB)) { @@ -927,7 +927,7 @@ void ProfileInfoT<Function,BasicBlock>::repair(const Function *F) { Path P; const BasicBlock *Dest = GetPath(BB, 0, P, GetPathToExit | GetPathWithNewEdges); - Dest = P[0]; + Dest = P[ reinterpret_cast<const llvm::BasicBlock*>(0) ]; if (!Dest) continue; if (getEdgeWeight(getEdge(Dest,0)) == MissingValue) { diff --git a/lib/AsmParser/Android.mk b/lib/AsmParser/Android.mk new file mode 100644 index 0000000000..a54192ecfa --- /dev/null +++ b/lib/AsmParser/Android.mk @@ -0,0 +1,32 @@ +LOCAL_PATH:= $(call my-dir) + +asm_parser_SRC_FILES := \ + LLLexer.cpp \ + LLParser.cpp \ + Parser.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(asm_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LOCAL_PATH)/../../llvm-host-build.mk +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(asm_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LOCAL_PATH)/../../llvm-device-build.mk +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp index f924b5a908..30e181cf49 100644 --- a/lib/AsmParser/LLLexer.cpp +++ b/lib/AsmParser/LLLexer.cpp @@ -22,6 +22,7 @@ #include "llvm/Support/MathExtras.h" #include "llvm/Support/SourceMgr.h" #include "llvm/Support/raw_ostream.h" +#include <cctype> #include <cstdio> #include <cstdlib> #include <cstring> diff --git a/lib/Bitcode/Reader/Android.mk b/lib/Bitcode/Reader/Android.mk new file mode 100644 index 0000000000..02fc617f6a --- /dev/null +++ b/lib/Bitcode/Reader/Android.mk @@ -0,0 +1,33 @@ +LOCAL_PATH:= $(call my-dir) + +bitcode_reader_SRC_FILES := \ + BitReader.cpp \ + BitcodeReader.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_reader_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitReader + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_reader_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitReader + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Bitcode/Writer/Android.mk b/lib/Bitcode/Writer/Android.mk new file mode 100644 index 0000000000..22b2054bb4 --- /dev/null +++ b/lib/Bitcode/Writer/Android.mk @@ -0,0 +1,19 @@ +LOCAL_PATH:= $(call my-dir) + +# For the host only +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + BitWriter.cpp \ + BitcodeWriter.cpp \ + BitcodeWriterPass.cpp \ + ValueEnumerator.cpp + +LOCAL_MODULE:= libLLVMBitWriter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/CodeGen/Android.mk b/lib/CodeGen/Android.mk new file mode 100644 index 0000000000..8875792cc2 --- /dev/null +++ b/lib/CodeGen/Android.mk @@ -0,0 +1,112 @@ +LOCAL_PATH:= $(call my-dir) + +codegen_SRC_FILES := \ + AggressiveAntiDepBreaker.cpp \ + Analysis.cpp \ + BranchFolding.cpp \ + CalcSpillWeights.cpp \ + CallingConvLower.cpp \ + CodePlacementOpt.cpp \ + CriticalAntiDepBreaker.cpp \ + DeadMachineInstructionElim.cpp \ + DwarfEHPrepare.cpp \ + ELFCodeEmitter.cpp \ + ELFWriter.cpp \ + GCMetadata.cpp \ + GCMetadataPrinter.cpp \ + GCStrategy.cpp \ + IfConversion.cpp \ + InlineSpiller.cpp \ + IntrinsicLowering.cpp \ + LLVMTargetMachine.cpp \ + LatencyPriorityQueue.cpp \ + LiveInterval.cpp \ + LiveIntervalAnalysis.cpp \ + LiveRangeEdit.cpp \ + LiveStackAnalysis.cpp \ + LiveVariables.cpp \ + LocalStackSlotAllocation.cpp \ + LowerSubregs.cpp \ + MachineBasicBlock.cpp \ + MachineCSE.cpp \ + MachineDominators.cpp \ + MachineFunction.cpp \ + MachineFunctionAnalysis.cpp \ + MachineFunctionPass.cpp \ + MachineFunctionPrinterPass.cpp \ + MachineInstr.cpp \ + MachineLICM.cpp \ + MachineLoopInfo.cpp \ + MachineModuleInfo.cpp \ + MachineModuleInfoImpls.cpp \ + MachinePassRegistry.cpp \ + MachineRegisterInfo.cpp \ + MachineSSAUpdater.cpp \ + MachineSink.cpp \ + MachineVerifier.cpp \ + ObjectCodeEmitter.cpp \ + OcamlGC.cpp \ + OptimizePHIs.cpp \ + PHIElimination.cpp \ + Passes.cpp \ + PeepholeOptimizer.cpp \ + PostRAHazardRecognizer.cpp \ + PostRASchedulerList.cpp \ + PreAllocSplitting.cpp \ + ProcessImplicitDefs.cpp \ + PrologEpilogInserter.cpp \ + PseudoSourceValue.cpp \ + RegAllocFast.cpp \ + RegAllocLinearScan.cpp \ + RegAllocPBQP.cpp \ + RegisterCoalescer.cpp \ + RegisterScavenging.cpp \ + RenderMachineFunction.cpp \ + ScheduleDAG.cpp \ + ScheduleDAGEmit.cpp \ + ScheduleDAGInstrs.cpp \ + ScheduleDAGPrinter.cpp \ + ShadowStackGC.cpp \ + ShrinkWrapping.cpp \ + SimpleRegisterCoalescing.cpp \ + SjLjEHPrepare.cpp \ + SlotIndexes.cpp \ + Spiller.cpp \ + SplitKit.cpp \ + Splitter.cpp \ + StackProtector.cpp \ + StackSlotColoring.cpp \ + StrongPHIElimination.cpp \ + TailDuplication.cpp \ + TargetInstrInfoImpl.cpp \ + TargetLoweringObjectFileImpl.cpp \ + TwoAddressInstructionPass.cpp \ + UnreachableBlockElim.cpp \ + VirtRegMap.cpp \ + VirtRegRewriter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_SRC_FILES) +LOCAL_MODULE:= libLLVMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_SRC_FILES) +LOCAL_MODULE:= libLLVMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/AsmPrinter/Android.mk b/lib/CodeGen/AsmPrinter/Android.mk new file mode 100644 index 0000000000..28b5e44ae3 --- /dev/null +++ b/lib/CodeGen/AsmPrinter/Android.mk @@ -0,0 +1,39 @@ +LOCAL_PATH := $(call my-dir) + +codegen_asmprinter_SRC_FILES := \ + AsmPrinter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + AsmPrinter.cpp \ + AsmPrinterDwarf.cpp \ + AsmPrinterInlineAsm.cpp \ + DIE.cpp \ + DwarfDebug.cpp \ + DwarfException.cpp \ + OcamlGCPrinter.cpp + +LOCAL_MODULE:= libLLVMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + AsmPrinter.cpp \ + AsmPrinterInlineAsm.cpp + +LOCAL_MODULE:= libLLVMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index d1d01b630a..8fb8918719 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -13,8 +13,10 @@ #define DEBUG_TYPE "asm-printer" #include "llvm/CodeGen/AsmPrinter.h" -#include "DwarfDebug.h" -#include "DwarfException.h" +#ifndef ANDROID_TARGET_BUILD +# include "DwarfDebug.h" +# include "DwarfException.h" +#endif // ANDROID_TARGET_BUILD #include "llvm/Module.h" #include "llvm/CodeGen/GCMetadataPrinter.h" #include "llvm/CodeGen/MachineConstantPool.h" @@ -43,6 +45,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Format.h" #include "llvm/Support/Timer.h" +#include <ctype.h> using namespace llvm; static const char *DWARFGroupName = "DWARF Emission"; @@ -183,11 +186,13 @@ bool AsmPrinter::doInitialization(Module &M) { OutStreamer.AddBlankLine(); } +#ifndef ANDROID_TARGET_BUILD if (MAI->doesSupportDebugInformation()) DD = new DwarfDebug(this, &M); if (MAI->doesSupportExceptionHandling()) DE = new DwarfException(this); +#endif // ANDROID_TARGET_BUILD return false; } @@ -448,6 +453,7 @@ void AsmPrinter::EmitFunctionHeader() { } // Emit pre-function debug and/or EH information. +#ifndef ANDROID_TARGET_BUILD if (DE) { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); DE->BeginFunction(MF); @@ -456,6 +462,7 @@ void AsmPrinter::EmitFunctionHeader() { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->beginFunction(MF); } +#endif // ANDROID_TARGET_BUILD } /// EmitFunctionEntryLabel - Emit the label that is the entrypoint for the @@ -633,13 +640,15 @@ void AsmPrinter::EmitFunctionBody() { if (!II->isLabel() && !II->isImplicitDef() && !II->isKill() && !II->isDebugValue()) { HasAnyRealCode = true; + ++EmittedInsts; } - +#ifndef ANDROID_TARGET_BUILD if (ShouldPrintDebugScopes) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->beginInstruction(II); } +#endif // ANDROID_TARGET_BUILD if (isVerbose()) EmitComments(*II, OutStreamer.GetCommentOS()); @@ -670,10 +679,12 @@ void AsmPrinter::EmitFunctionBody() { break; } +#ifndef ANDROID_TARGET_BUILD if (ShouldPrintDebugScopes) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->endInstruction(II); } +#endif // ANDROID_TARGET_BUILD } } @@ -716,6 +727,7 @@ void AsmPrinter::EmitFunctionBody() { } // Emit post-function debug information. +#ifndef ANDROID_TARGET_BUILD if (DD) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->endFunction(MF); @@ -724,6 +736,7 @@ void AsmPrinter::EmitFunctionBody() { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); DE->EndFunction(); } +#endif // ANDROID_TARGET_BUILD MMI->EndFunction(); // Print out jump tables referenced by the function. @@ -746,6 +759,7 @@ bool AsmPrinter::doFinalization(Module &M) { EmitGlobalVariable(I); // Finalize debug and EH information. +#ifndef ANDROID_TARGET_BUILD if (DE) { { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); @@ -760,6 +774,7 @@ bool AsmPrinter::doFinalization(Module &M) { } delete DD; DD = 0; } +#endif // ANDROID_TARGET_BUILD // If the target wants to know about weak references, print them all. if (MAI->getWeakRefDirective()) { diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp index 40f839267d..ff44ce49b4 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp @@ -36,6 +36,7 @@ using namespace llvm; /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. void AsmPrinter::EmitInlineAsm(StringRef Str, unsigned LocCookie) const { +#ifndef ANDROID_TARGET_BUILD assert(!Str.empty() && "Can't emit empty inline asm block"); // Remember if the buffer is nul terminated or not so we can avoid a copy. @@ -85,12 +86,14 @@ void AsmPrinter::EmitInlineAsm(StringRef Str, unsigned LocCookie) const { /*NoFinalize*/ true); if (Res && !HasDiagHandler) report_fatal_error("Error parsing inline asm\n"); +#endif // ANDROID_TARGET_BUILD } /// EmitInlineAsm - This method formats and emits the specified machine /// instruction that is an inline asm. void AsmPrinter::EmitInlineAsm(const MachineInstr *MI) const { +#ifndef ANDROID_TARGET_BUILD assert(MI->isInlineAsm() && "printInlineAsm only works on inline asms"); unsigned NumOperands = MI->getNumOperands(); @@ -317,6 +320,7 @@ void AsmPrinter::EmitInlineAsm(const MachineInstr *MI) const { if (OutStreamer.hasRawTextSupport()) OutStreamer.EmitRawText(Twine("\t")+MAI->getCommentString()+ MAI->getInlineAsmEnd()); +#endif // ANDROID_TARGET_BUILD } diff --git a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp index c8a63cf239..4a4ceadd02 100644 --- a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp @@ -26,6 +26,7 @@ #include "llvm/ADT/SmallString.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/FormattedStream.h" +#include <ctype.h> using namespace llvm; namespace { diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 0143d0fbea..0027db2563 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -287,7 +287,7 @@ bool MachineCSE::isProfitableToCSE(unsigned CSReg, unsigned Reg, MachineBasicBlock *CSBB = CSMI->getParent(); MachineBasicBlock *BB = MI->getParent(); if (CSBB != BB && - find(CSBB->succ_begin(), CSBB->succ_end(), BB) == CSBB->succ_end()) + std::find(CSBB->succ_begin(), CSBB->succ_end(), BB) == CSBB->succ_end()) return false; } diff --git a/lib/CodeGen/SelectionDAG/Android.mk b/lib/CodeGen/SelectionDAG/Android.mk new file mode 100644 index 0000000000..d3522fea6f --- /dev/null +++ b/lib/CodeGen/SelectionDAG/Android.mk @@ -0,0 +1,52 @@ +LOCAL_PATH:= $(call my-dir) + +codegen_selectiondag_SRC_FILES := \ + DAGCombiner.cpp \ + FastISel.cpp \ + FunctionLoweringInfo.cpp \ + InstrEmitter.cpp \ + LegalizeDAG.cpp \ + LegalizeFloatTypes.cpp \ + LegalizeIntegerTypes.cpp \ + LegalizeTypes.cpp \ + LegalizeTypesGeneric.cpp \ + LegalizeVectorOps.cpp \ + LegalizeVectorTypes.cpp \ + ScheduleDAGFast.cpp \ + ScheduleDAGList.cpp \ + ScheduleDAGRRList.cpp \ + ScheduleDAGSDNodes.cpp \ + SelectionDAG.cpp \ + SelectionDAGBuilder.cpp \ + SelectionDAGISel.cpp \ + SelectionDAGPrinter.cpp \ + TargetLowering.cpp \ + TargetSelectionDAGInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_selectiondag_SRC_FILES) + +LOCAL_MODULE:= libLLVMSelectionDAG + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_selectiondag_SRC_FILES) + +LOCAL_MODULE:= libLLVMSelectionDAG + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 4c63588dbc..e5b1ac8ff7 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2198,7 +2198,7 @@ size_t SelectionDAGBuilder::Clusterify(CaseVector& Cases, if (Cases.size() >= 2) // Must recompute end() each iteration because it may be // invalidated by erase if we hold on to it - for (CaseItr I = Cases.begin(), J = ++(Cases.begin()); J != Cases.end(); ) { + for (CaseItr TmpBegin = Cases.begin(), I = TmpBegin, J = ++TmpBegin; J != Cases.end(); ) { const APInt& nextValue = cast<ConstantInt>(J->Low)->getValue(); const APInt& currentValue = cast<ConstantInt>(I->High)->getValue(); MachineBasicBlock* nextBB = J->BB; diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 603e7e4891..f23125f96e 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -28,6 +28,7 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" +#include <ctype.h> using namespace llvm; namespace llvm { diff --git a/lib/ExecutionEngine/JIT/Android.mk b/lib/ExecutionEngine/JIT/Android.mk new file mode 100644 index 0000000000..3c79f29946 --- /dev/null +++ b/lib/ExecutionEngine/JIT/Android.mk @@ -0,0 +1,36 @@ +LOCAL_PATH:= $(call my-dir) + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + Intercept.cpp \ + JIT.cpp \ + JITDebugRegisterer.cpp \ + JITDwarfEmitter.cpp \ + JITEmitter.cpp \ + JITMemoryManager.cpp \ + OProfileJITEventListener.cpp \ + TargetSelect.cpp + +LOCAL_MODULE:= libLLVMJIT + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + JITMemoryManager.cpp + +LOCAL_MODULE:= libLLVMJIT + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Linker/Android.mk b/lib/Linker/Android.mk new file mode 100644 index 0000000000..792a67598c --- /dev/null +++ b/lib/Linker/Android.mk @@ -0,0 +1,34 @@ +LOCAL_PATH:= $(call my-dir) + +linker_SRC_FILES := \ + LinkModules.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +LOCAL_SRC_FILES := \ + $(linker_SRC_FILES)\ + LinkArchives.cpp \ + Linker.cpp \ + LinkItems.cpp + +LOCAL_MODULE:= libLLVMLinker +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(linker_SRC_FILES) + +LOCAL_MODULE:= libLLVMLinker +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/MC/Android.mk b/lib/MC/Android.mk new file mode 100644 index 0000000000..002888d712 --- /dev/null +++ b/lib/MC/Android.mk @@ -0,0 +1,62 @@ +LOCAL_PATH:= $(call my-dir) + +mc_SRC_FILES := \ + ELFObjectWriter.cpp \ + MachObjectWriter.cpp \ + MCAsmInfo.cpp \ + MCAsmInfoCOFF.cpp \ + MCAsmInfoDarwin.cpp \ + MCAsmStreamer.cpp \ + MCAssembler.cpp \ + MCCodeEmitter.cpp \ + MCContext.cpp \ + MCDisassembler.cpp \ + MCDwarf.cpp \ + MCELFStreamer.cpp \ + MCExpr.cpp \ + MCInst.cpp \ + MCInstPrinter.cpp \ + MCLabel.cpp \ + MCLoggingStreamer.cpp \ + MCMachOStreamer.cpp \ + MCNullStreamer.cpp \ + MCObjectFormat.cpp \ + MCObjectStreamer.cpp \ + MCObjectWriter.cpp \ + MCSection.cpp \ + MCSectionCOFF.cpp \ + MCSectionELF.cpp \ + MCSectionMachO.cpp \ + MCStreamer.cpp \ + MCSymbol.cpp \ + MCValue.cpp \ + WinCOFFObjectWriter.cpp \ + WinCOFFStreamer.cpp \ + TargetAsmBackend.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_SRC_FILES) + +LOCAL_MODULE:= libLLVMMC + +LOCAL_MODULE_TAGS := optional + + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_SRC_FILES) + +LOCAL_MODULE:= libLLVMMC + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/MC/MCAsmStreamer.cpp b/lib/MC/MCAsmStreamer.cpp index 021873c2db..692f1788ca 100644 --- a/lib/MC/MCAsmStreamer.cpp +++ b/lib/MC/MCAsmStreamer.cpp @@ -23,6 +23,7 @@ #include "llvm/Support/MathExtras.h" #include "llvm/Support/Format.h" #include "llvm/Support/FormattedStream.h" +#include <ctype.h> using namespace llvm; namespace { diff --git a/lib/MC/MCParser/Android.mk b/lib/MC/MCParser/Android.mk new file mode 100644 index 0000000000..33d3aea845 --- /dev/null +++ b/lib/MC/MCParser/Android.mk @@ -0,0 +1,38 @@ +LOCAL_PATH:= $(call my-dir) + +mc_parser_SRC_FILES := \ + AsmLexer.cpp \ + AsmParser.cpp \ + COFFAsmParser.cpp \ + DarwinAsmParser.cpp \ + ELFAsmParser.cpp \ + MCAsmLexer.cpp \ + MCAsmParser.cpp \ + MCAsmParserExtension.cpp \ + TargetAsmParser.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMMCParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMMCParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/MC/MCParser/AsmLexer.cpp b/lib/MC/MCParser/AsmLexer.cpp index 867cb208ce..5c1ae2fd93 100644 --- a/lib/MC/MCParser/AsmLexer.cpp +++ b/lib/MC/MCParser/AsmLexer.cpp @@ -15,6 +15,7 @@ #include "llvm/Support/SMLoc.h" #include "llvm/Support/MemoryBuffer.h" #include "llvm/MC/MCAsmInfo.h" +#include <ctype.h> #include <cerrno> #include <cstdio> #include <cstdlib> diff --git a/lib/MC/MCParser/AsmParser.cpp b/lib/MC/MCParser/AsmParser.cpp index 3632c93740..fa7a78514e 100644 --- a/lib/MC/MCParser/AsmParser.cpp +++ b/lib/MC/MCParser/AsmParser.cpp @@ -31,6 +31,7 @@ #include "llvm/Support/SourceMgr.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetAsmParser.h" +#include <cctype> #include <vector> using namespace llvm; diff --git a/lib/MC/MCSectionMachO.cpp b/lib/MC/MCSectionMachO.cpp index 0b74636d42..853d990686 100644 --- a/lib/MC/MCSectionMachO.cpp +++ b/lib/MC/MCSectionMachO.cpp @@ -10,6 +10,7 @@ #include "llvm/MC/MCSectionMachO.h" #include "llvm/MC/MCContext.h" #include "llvm/Support/raw_ostream.h" +#include <ctype.h> using namespace llvm; /// SectionTypeDescriptors - These are strings that describe the various section diff --git a/lib/Support/Android.mk b/lib/Support/Android.mk new file mode 100644 index 0000000000..9b73488796 --- /dev/null +++ b/lib/Support/Android.mk @@ -0,0 +1,78 @@ +LOCAL_PATH:= $(call my-dir) + +support_SRC_FILES := \ + APFloat.cpp \ + APInt.cpp \ + APSInt.cpp \ + Allocator.cpp \ + CommandLine.cpp \ + ConstantRange.cpp \ + CrashRecoveryContext.cpp \ + DAGDeltaAlgorithm.cpp \ + Debug.cpp \ + DeltaAlgorithm.cpp \ + Dwarf.cpp \ + ErrorHandling.cpp \ + FileUtilities.cpp \ + FoldingSet.cpp \ + FormattedStream.cpp \ + GraphWriter.cpp \ + IsInf.cpp \ + IsNAN.cpp \ + ManagedStatic.cpp \ + MemoryBuffer.cpp \ + MemoryObject.cpp \ + PluginLoader.cpp \ + PrettyStackTrace.cpp \ + Regex.cpp \ + SmallPtrSet.cpp \ + SmallVector.cpp \ + SourceMgr.cpp \ + Statistic.cpp \ + StringExtras.cpp \ + StringMap.cpp \ + StringPool.cpp \ + StringRef.cpp \ + SystemUtils.cpp \ + TargetRegistry.cpp \ + Timer.cpp \ + ToolOutputFile.cpp \ + Triple.cpp \ + Twine.cpp \ + circular_raw_ostream.cpp \ + raw_os_ostream.cpp \ + raw_ostream.cpp \ + regcomp.c \ + regerror.c \ + regexec.c \ + regfree.c \ + regstrlcpy.c + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +# FIXME: This only requires RTTI because tblgen uses it. Fix that. +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(support_SRC_FILES) + +LOCAL_MODULE:= libLLVMSupport + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(support_SRC_FILES) + +LOCAL_MODULE:= libLLVMSupport + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Support/Timer.cpp b/lib/Support/Timer.cpp index 44ee1777cb..f83ca268b7 100644 --- a/lib/Support/Timer.cpp +++ b/lib/Support/Timer.cpp @@ -283,7 +283,7 @@ void TimerGroup::removeTimer(Timer &T) { // If the timer was started, move its data to TimersToPrint. if (T.Started) - TimersToPrint.push_back(std::make_pair(T.Time, T.Name)); + TimersToPrint.push_back(TimersToPrintEntry(T.Time, T.Name)); T.TG = 0; @@ -319,7 +319,7 @@ void TimerGroup::PrintQueuedTimers(raw_ostream &OS) { TimeRecord Total; for (unsigned i = 0, e = TimersToPrint.size(); i != e; ++i) - Total += TimersToPrint[i].first; + Total += TimersToPrint[i].Time; // Print out timing header. OS << "===" << std::string(73, '-') << "===\n"; @@ -352,9 +352,9 @@ void TimerGroup::PrintQueuedTimers(raw_ostream &OS) { // Loop through all of the timing data, printing it out. for (unsigned i = 0, e = TimersToPrint.size(); i != e; ++i) { - const std::pair<TimeRecord, std::string> &Entry = TimersToPrint[e-i-1]; - Entry.first.print(Total, OS); - OS << Entry.second << '\n'; + const TimersToPrintEntry &Entry = TimersToPrint[e-i-1]; + Entry.Time.print(Total, OS); + OS << Entry.Name << '\n'; } Total.print(Total, OS); @@ -372,7 +372,7 @@ void TimerGroup::print(raw_ostream &OS) { // reset them. for (Timer *T = FirstTimer; T; T = T->Next) { if (!T->Started) continue; - TimersToPrint.push_back(std::make_pair(T->Time, T->Name)); + TimersToPrint.push_back(TimersToPrintEntry(T->Time, T->Name)); // Clear out the time. T->Started = 0; diff --git a/lib/System/Android.mk b/lib/System/Android.mk new file mode 100644 index 0000000000..73c779e4fc --- /dev/null +++ b/lib/System/Android.mk @@ -0,0 +1,61 @@ +LOCAL_PATH:= $(call my-dir) + +system_SRC_FILES := \ + Alarm.cpp \ + Atomic.cpp \ + Disassembler.cpp \ + Errno.cpp \ + Host.cpp \ + IncludeFile.cpp \ + Memory.cpp \ + Mutex.cpp \ + Path.cpp \ + Process.cpp \ + Program.cpp \ + RWMutex.cpp \ + Signals.cpp \ + ThreadLocal.cpp \ + Threading.cpp \ + TimeValue.cpp \ + Valgrind.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(system_SRC_FILES) \ + DynamicLibrary.cpp \ + SearchForAddressOfSpecialSymbol.cpp + +LOCAL_CFLAGS += -march=i686 + +LOCAL_MODULE:= libLLVMSystem + +LOCAL_MODULE_TAGS := optional + + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(system_SRC_FILES) + +LOCAL_CFLAGS := -D__android__ + +ifneq ($(TARGET_SIMULATOR),true) +LOCAL_CFLAGS += -I bionic/libc/include +endif + +LOCAL_MODULE:= libLLVMSystem + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/System/Atomic.cpp b/lib/System/Atomic.cpp index 7ba8b774d5..a8835e37e1 100644 --- a/lib/System/Atomic.cpp +++ b/lib/System/Atomic.cpp @@ -13,6 +13,9 @@ #include "llvm/System/Atomic.h" #include "llvm/Config/config.h" +#if defined(ANDROID_TARGET_BUILD) +# include "sys/atomics.h" +#endif using namespace llvm; @@ -43,6 +46,8 @@ sys::cas_flag sys::CompareAndSwap(volatile sys::cas_flag* ptr, if (result == old_value) *ptr = new_value; return result; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_cmpxchg(old_value, new_value, (volatile int*)ptr); #elif defined(__GNUC__) return __sync_val_compare_and_swap(ptr, old_value, new_value); #elif defined(_MSC_VER) @@ -56,6 +61,8 @@ sys::cas_flag sys::AtomicIncrement(volatile sys::cas_flag* ptr) { #if LLVM_MULTITHREADED==0 ++(*ptr); return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_inc((volatile int*)ptr); #elif defined(__GNUC__) return __sync_add_and_fetch(ptr, 1); #elif defined(_MSC_VER) @@ -69,6 +76,8 @@ sys::cas_flag sys::AtomicDecrement(volatile sys::cas_flag* ptr) { #if LLVM_MULTITHREADED==0 --(*ptr); return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_dec((volatile int*)ptr); #elif defined(__GNUC__) return __sync_sub_and_fetch(ptr, 1); #elif defined(_MSC_VER) @@ -82,6 +91,13 @@ sys::cas_flag sys::AtomicAdd(volatile sys::cas_flag* ptr, sys::cas_flag val) { #if LLVM_MULTITHREADED==0 *ptr += val; return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + sys::cas_flag original, result; + do { + original = *ptr; + result = original + val; + } while (__atomic_cmpxchg(original, result, (volatile int*)ptr) != original); + return result; #elif defined(__GNUC__) return __sync_add_and_fetch(ptr, val); #elif defined(_MSC_VER) diff --git a/lib/System/DynamicLibrary.cpp b/lib/System/DynamicLibrary.cpp index 3da50a28b6..b974c1d09d 100644 --- a/lib/System/DynamicLibrary.cpp +++ b/lib/System/DynamicLibrary.cpp @@ -136,7 +136,7 @@ void* DynamicLibrary::SearchForAddressOfSymbol(const char* symbolName) { // On linux we have a weird situation. The stderr/out/in symbols are both // macros and global variables because of standards requirements. So, we // boldly use the EXPLICIT_SYMBOL macro without checking for a #define first. -#if defined(__linux__) +#if defined(__linux__) && !defined(__android__) { EXPLICIT_SYMBOL(stderr); EXPLICIT_SYMBOL(stdout); diff --git a/lib/System/Unix/Host.inc b/lib/System/Unix/Host.inc index c76d6a4e18..5b1187602e 100644 --- a/lib/System/Unix/Host.inc +++ b/lib/System/Unix/Host.inc @@ -21,6 +21,7 @@ #include "Unix.h" #include <sys/utsname.h> #include <string> +#include <ctype.h> using namespace llvm; diff --git a/lib/System/Win32/Win32.h b/lib/System/Win32/Win32.h index 00a7e75fc2..48019dd82f 100644 --- a/lib/System/Win32/Win32.h +++ b/lib/System/Win32/Win32.h @@ -22,8 +22,8 @@ #define WIN32_LEAN_AND_MEAN #include "llvm/Config/config.h" // Get build system configuration settings -#include <Windows.h> -#include <ShlObj.h> +#include <windows.h> +#include <shlobj.h> #include <cassert> #include <string> diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index c6ba65c551..8a2f034007 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -88,9 +88,11 @@ namespace { void emitWordLE(unsigned Binary); void emitDWordLE(uint64_t Binary); + void emitConstantToMemory(unsigned CPI, const Constant *CV); void emitConstPoolInstruction(const MachineInstr &MI); void emitMOVi32immInstruction(const MachineInstr &MI); void emitMOVi2piecesInstruction(const MachineInstr &MI); + void emitLEApcrelInstruction(const MachineInstr &MI); void emitLEApcrelJTInstruction(const MachineInstr &MI); void emitPseudoMoveInstruction(const MachineInstr &MI); void addPCLabel(unsigned LabelID); @@ -139,6 +141,8 @@ namespace { void emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI); + void emitMiscInstruction(const MachineInstr &MI); + void emitNEONLaneInstruction(const MachineInstr &MI); void emitNEONDupInstruction(const MachineInstr &MI); void emitNEON1RegModImmInstruction(const MachineInstr &MI); @@ -225,20 +229,25 @@ namespace { uint32_t getAddrMode5OpValue(const MachineInstr &MI, unsigned Op) const { // {12-9} = reg // {8} = (U)nsigned (add == '1', sub == '0') - // {7-0} = imm12 - const MachineOperand &MO = MI.getOperand(Op); - const MachineOperand &MO1 = MI.getOperand(Op + 1); - if (!MO.isReg()) { - emitConstPoolAddress(MO.getIndex(), ARM::reloc_arm_cp_entry); - return 0; - } - unsigned Reg = getARMRegisterNumbering(MO.getReg()); - int32_t Imm8 = MO1.getImm(); + // {7-0} = imm8 uint32_t Binary; - Binary = Imm8 & 0xff; - if (Imm8 >= 0) - Binary |= (1 << 8); + const MachineOperand &MO = MI.getOperand(Op); + uint32_t Reg = getMachineOpValue(MI, MO); Binary |= (Reg << 9); + + // If there is a non-zero immediate offset, encode it. + if (MO.isReg()) { + const MachineOperand &MO1 = MI.getOperand(Op + 1); + if (uint32_t ImmOffs = ARM_AM::getAM5Offset(MO1.getImm())) { + if (ARM_AM::getAM5Op(MO1.getImm()) == ARM_AM::add) + Binary |= 1 << 8; + Binary |= ImmOffs & 0xff; + return Binary; + } + } + + // If immediate offset is omitted, default to +0. + Binary |= 1 << 8; return Binary; } unsigned getNEONVcvtImm32OpValue(const MachineInstr &MI, unsigned Op) @@ -359,6 +368,9 @@ unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI, return getARMRegisterNumbering(MO.getReg()); else if (MO.isImm()) return static_cast<unsigned>(MO.getImm()); + else if (MO.isFPImm()) + return static_cast<unsigned>(MO.getFPImm()->getValueAPF() + .bitcastToAPInt().getHiBits(32).getLimitedValue()); else if (MO.isGlobal()) emitGlobalAddress(MO.getGlobal(), ARM::reloc_arm_branch, true, false); else if (MO.isSymbol()) @@ -509,7 +521,9 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { case ARMII::VFPLdStMulFrm: emitVFPLoadStoreMultipleInstruction(MI); break; - + case ARMII::VFPMiscFrm: + emitMiscInstruction(MI); + break; // NEON instructions. case ARMII::NGetLnFrm: case ARMII::NSetLnFrm: @@ -531,6 +545,61 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { MCE.processDebugLoc(MI.getDebugLoc(), false); } +void ARMCodeEmitter::emitConstantToMemory(unsigned CPI, const Constant *C) { + DEBUG({ + errs() << " ** Constant pool #" << CPI << " @ " + << (void*)MCE.getCurrentPCValue() << " "; + if (const Function *F = dyn_cast<Function>(C)) + errs() << F->getName(); + else + errs() << *C; + errs() << '\n'; + }); + + switch (C->getValueID()) { + default: { + llvm_unreachable("Unable to handle this constantpool entry!"); + break; + } + case Value::GlobalVariableVal: { + emitGlobalAddress(static_cast<const GlobalValue*>(C), + ARM::reloc_arm_absolute, isa<Function>(C), false); + emitWordLE(0); + break; + } + case Value::ConstantIntVal: { + const ConstantInt *CI = static_cast<const ConstantInt*>(C); + uint32_t Val = *(uint32_t*)CI->getValue().getRawData(); + emitWordLE(Val); + break; + } + case Value::ConstantFPVal: { + const ConstantFP *CFP = static_cast<const ConstantFP*>(C); + if (CFP->getType()->isFloatTy()) + emitWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); + else if (CFP->getType()->isDoubleTy()) + emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); + else { + llvm_unreachable("Unable to handle this constantpool entry!"); + } + break; + } + case Value::ConstantArrayVal: { + const ConstantArray *CA = static_cast<const ConstantArray*>(C); + for (unsigned i = 0, e = CA->getNumOperands(); i != e; ++i) + emitConstantToMemory(CPI, CA->getOperand(i)); + break; + } + case Value::ConstantVectorVal:{ + //FIXME:emit vector + const ConstantVector *CV = static_cast<const ConstantVector*>(C); + break; + } + } + + return; +} + void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) { unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index. unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index. @@ -561,35 +630,7 @@ void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) { } emitWordLE(0); } else { - const Constant *CV = MCPE.Val.ConstVal; - - DEBUG({ - errs() << " ** Constant pool #" << CPI << " @ " - << (void*)MCE.getCurrentPCValue() << " "; - if (const Function *F = dyn_cast<Function>(CV)) - errs() << F->getName(); - else - errs() << *CV; - errs() << '\n'; - }); - - if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) { - emitGlobalAddress(GV, ARM::reloc_arm_absolute, isa<Function>(GV), false); - emitWordLE(0); - } else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { - uint32_t Val = uint32_t(*CI->getValue().getRawData()); - emitWordLE(Val); - } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) { - if (CFP->getType()->isFloatTy()) - emitWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); - else if (CFP->getType()->isDoubleTy()) - emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); - else { - llvm_unreachable("Unable to handle this constantpool entry!"); - } - } else { - llvm_unreachable("Unable to handle this constantpool entry!"); - } + emitConstantToMemory(CPI, MCPE.Val.ConstVal); } } @@ -671,13 +712,39 @@ void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) { emitWordLE(Binary); } +void ARMCodeEmitter::emitLEApcrelInstruction(const MachineInstr &MI) { + // It's basically add r, pc, (LCPI - $+8) + const TargetInstrDesc &TID = MI.getDesc(); + + unsigned Binary = 0; + + // Set the conditional execution predicate + Binary |= II->getPredicate(&MI) << ARMII::CondShift; + + // Encode S bit if MI modifies CPSR. + Binary |= getAddrModeSBit(MI, TID); + + // Encode Rd. + Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift; + + // Encode Rn which is PC. + Binary |= getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; + + // Encode the displacement which is a so_imm. + // Set bit I(25) to identify this is the immediate form of <shifter_op> + Binary |= 1 << ARMII::I_BitShift; + emitConstPoolAddress(MI.getOperand(1).getIndex(), ARM::reloc_arm_so_imm_cp_entry); + + emitWordLE(Binary); +} + void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) { // It's basically add r, pc, (LJTI - $+8) const TargetInstrDesc &TID = MI.getDesc(); // Emit the 'add' instruction. - unsigned Binary = 0x4 << 21; // add: Insts{24-31} = 0b0100 + unsigned Binary = 0x4 << 21; // add: Insts{21-24} = 0b0100 // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -815,7 +882,10 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) { else emitMOVi2piecesInstruction(MI); break; - + case ARM::LEApcrel: + // Materialize constantpool index address. + emitLEApcrelInstruction(MI); + break; case ARM::LEApcrelJT: // Materialize jumptable address. emitLEApcrelJTInstruction(MI); @@ -900,7 +970,7 @@ unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) { unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI, const TargetInstrDesc &TID) const { - for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){ + for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i >= e; --i){ const MachineOperand &MO = MI.getOperand(i-1); if (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR) return 1 << ARMII::S_BitShift; @@ -1018,7 +1088,8 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI, // If this is an LDRi12, STRi12 or LDRcp, nothing more needs be done. if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRcp || - MI.getOpcode() == ARM::STRi12) { + MI.getOpcode() == ARM::STRi12 || MI.getOpcode() == ARM::LDRBi12 || + MI.getOpcode() == ARM::STRBi12) { emitWordLE(Binary); return; } @@ -1452,9 +1523,10 @@ static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegD); RegD = getARMRegisterNumbering(RegD); - if (!isSPVFP) - Binary |= RegD << ARMII::RegRdShift; - else { + if (!isSPVFP) { + Binary |= (RegD & 0x0F) << ARMII::RegRdShift; + Binary |= ((RegD & 0x10) >> 4) << ARMII::D_BitShift; + } else { Binary |= ((RegD & 0x1E) >> 1) << ARMII::RegRdShift; Binary |= (RegD & 0x01) << ARMII::D_BitShift; } @@ -1466,9 +1538,10 @@ static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegN); RegN = getARMRegisterNumbering(RegN); - if (!isSPVFP) - Binary |= RegN << ARMII::RegRnShift; - else { + if (!isSPVFP) { + Binary |= (RegN & 0x0F) << ARMII::RegRnShift; + Binary |= ((RegN & 0x10) >> 4) << ARMII::N_BitShift; + } else { Binary |= ((RegN & 0x1E) >> 1) << ARMII::RegRnShift; Binary |= (RegN & 0x01) << ARMII::N_BitShift; } @@ -1480,9 +1553,10 @@ static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegM); RegM = getARMRegisterNumbering(RegM); - if (!isSPVFP) - Binary |= RegM; - else { + if (!isSPVFP) { + Binary |= (RegM & 0x0F); + Binary |= ((RegM & 0x10) >> 4) << ARMII::M_BitShift; + } else { Binary |= ((RegM & 0x1E) >> 1); Binary |= (RegM & 0x01) << ARMII::M_BitShift; } @@ -1499,9 +1573,6 @@ void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) { Binary |= II->getPredicate(&MI) << ARMII::CondShift; unsigned OpIdx = 0; - assert((Binary & ARMII::D_BitShift) == 0 && - (Binary & ARMII::N_BitShift) == 0 && - (Binary & ARMII::M_BitShift) == 0 && "VFP encoding bug!"); // Encode Dd / Sd. Binary |= encodeVFPRd(MI, OpIdx++); @@ -1591,6 +1662,12 @@ void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) { // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; + if (MI.getOpcode() == ARM::VLDRS || MI.getOpcode() == ARM::VLDRD || + MI.getOpcode() == ARM::VSTRS || MI.getOpcode() == ARM::VSTRD){ + emitWordLE(Binary); + return; + } + unsigned OpIdx = 0; // Encode Dd / Sd. @@ -1666,6 +1743,17 @@ ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) { emitWordLE(Binary); } +void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) { + unsigned Opcode = MI.getDesc().Opcode; + // Part of binary is determined by TableGn. + unsigned Binary = getBinaryCodeForInstr(MI); + + // Set the conditional execution predicate + Binary |= II->getPredicate(&MI) << ARMII::CondShift; + + emitWordLE(Binary); +} + static unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) { unsigned RegD = MI.getOperand(OpIdx).getReg(); unsigned Binary = 0; diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index f38c452fce..1d4f75fb5e 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -690,8 +690,7 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { break; } - case ARM::MOVi32imm: - case ARM::MOVCCi32imm: + //FIXME:Expanding MOVi32imm needs more encoding. case ARM::t2MOVi32imm: case ARM::t2MOVCCi32imm: { unsigned PredReg = 0; diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 5a68c565bb..ea91b660f8 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2880,8 +2880,10 @@ def REVSH : AMiscA1I<0b01101111, 0b1011, (outs GPR:$Rd), (ins GPR:$Rm), Requires<[IsARM, HasV6]>; def lsl_shift_imm : SDNodeXForm<imm, [{ - unsigned Sh = ARM_AM::getSORegOpc(ARM_AM::lsl, N->getZExtValue()); - return CurDAG->getTargetConstant(Sh, MVT::i32); + // Note that since the shift kind is fixed for both PKHBT and PKHTB, + // we don't encode anything other than the ShiftAmt [see ARMCodeEmitter.cpp] + //unsigned Sh = ARM_AM::getSORegOpc(ARM_AM::lsl, N->getZExtValue()); + return CurDAG->getTargetConstant(N->getZExtValue(), MVT::i32); }]>; def lsl_amt : PatLeaf<(i32 imm), [{ @@ -2903,8 +2905,10 @@ def : ARMV6Pat<(or (and GPR:$Rn, 0xFFFF), (shl GPR:$Rm, imm16_31:$sh)), (PKHBT GPR:$Rn, GPR:$Rm, (lsl_shift_imm imm16_31:$sh))>; def asr_shift_imm : SDNodeXForm<imm, [{ - unsigned Sh = ARM_AM::getSORegOpc(ARM_AM::asr, N->getZExtValue()); - return CurDAG->getTargetConstant(Sh, MVT::i32); + // Note that since the shift kind is fixed for both PKHBT and PKHTB, + // we don't encode anything other than the ShiftAmt [see ARMCodeEmitter.cpp] + //unsigned Sh = ARM_AM::getSORegOpc(ARM_AM::asr, N->getZExtValue()); + return CurDAG->getTargetConstant(N->getZExtValue(), MVT::i32); }]>; def asr_amt : PatLeaf<(i32 imm), [{ diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index e4048dd886..1416893eee 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -1039,9 +1039,9 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm), // Encode instruction operands. let Inst{15-12} = Sd{4-1}; let Inst{22} = Sd{0}; - let Inst{19} = imm{31}; // The immediate is handled as a double. - let Inst{18-16} = imm{22-20}; - let Inst{3-0} = imm{19-16}; + let Inst{19} = imm{31}; + let Inst{18-16} = imm{25-23}; + let Inst{3-0} = imm{22-19}; // Encode remaining instruction bits. let Inst{27-23} = 0b11101; diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp index c460cea74f..289c7ecc04 100644 --- a/lib/Target/ARM/ARMJITInfo.cpp +++ b/lib/Target/ARM/ARMJITInfo.cpp @@ -15,6 +15,7 @@ #include "ARMJITInfo.h" #include "ARMInstrInfo.h" #include "ARMConstantPoolValue.h" +#include "ARMAddressingModes.h" #include "ARMRelocations.h" #include "ARMSubtarget.h" #include "llvm/Function.h" @@ -48,7 +49,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction; // write our own wrapper, which does things our way, so we have complete // control over register saving and restoring. extern "C" { -#if defined(__arm__) +#if defined(__arm__) && !defined(ANDROID) void ARMCompilationCallback(); asm( ".text\n" @@ -247,6 +248,7 @@ intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const { return getJumpTableBaseAddr(MR->getJumpTableIndex()); case ARM::reloc_arm_cp_entry: case ARM::reloc_arm_vfp_cp_entry: + case ARM::reloc_arm_so_imm_cp_entry: // Constant pool entry address. return getConstantPoolEntryAddr(MR->getConstantPoolIndex()); case ARM::reloc_arm_machine_cp_entry: { @@ -293,6 +295,29 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR, getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; break; } + case ARM::reloc_arm_so_imm_cp_entry: { + ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; + // If the result is positive, set bit U(23) to 1. + if (ResultPtr >= 0) + *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift; + else { + // Otherwise, obtain the absolute value and set bit U(23) to 0. + *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift); + // FIXME: Also set bit 22 to 1 since 'sub' instruction is going to be used. + *((intptr_t*)RelocPos) |= 1 << 22; + ResultPtr = - ResultPtr; + } + + int SoImmVal = ARM_AM::getSOImmVal(ResultPtr); + assert(SoImmVal != -1 && "Not a valid so_imm value!"); + *((intptr_t*)RelocPos) |= (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1) + << ARMII::SoRotImmShift; + *((intptr_t*)RelocPos) |= ARM_AM::getSOImmValImm((unsigned)SoImmVal); + // Set register Rn to PC. + *((intptr_t*)RelocPos) |= + getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; + break; + } case ARM::reloc_arm_pic_jt: case ARM::reloc_arm_machine_cp_entry: case ARM::reloc_arm_absolute: { diff --git a/lib/Target/ARM/ARMRelocations.h b/lib/Target/ARM/ARMRelocations.h index 86e7206f2c..291f3cc613 100644 --- a/lib/Target/ARM/ARMRelocations.h +++ b/lib/Target/ARM/ARMRelocations.h @@ -35,6 +35,10 @@ namespace llvm { // should be divided by 4. reloc_arm_vfp_cp_entry, + // reloc_arm_so_imm - Same as reloc_arm_cp_entry except contant should be + // encoded as so_imm value. + reloc_arm_so_imm_cp_entry, + // reloc_arm_machine_cp_entry - Relocation of a ARM machine constantpool // entry. reloc_arm_machine_cp_entry, diff --git a/lib/Target/ARM/Android.mk b/lib/Target/ARM/Android.mk new file mode 100644 index 0000000000..51a257fbfa --- /dev/null +++ b/lib/Target/ARM/Android.mk @@ -0,0 +1,90 @@ +LOCAL_PATH := $(call my-dir) + +arm_codegen_TBLGEN_TABLES := \ + ARMGenAsmWriter.inc \ + ARMGenMCCodeEmitter.inc \ + ARMGenRegisterInfo.h.inc\ + ARMGenRegisterNames.inc \ + ARMGenRegisterInfo.inc \ + ARMGenInstrNames.inc \ + ARMGenInstrInfo.inc \ + ARMGenDAGISel.inc \ + ARMGenFastISel.inc \ + ARMGenSubtarget.inc \ + ARMGenCodeEmitter.inc \ + ARMGenCallingConv.inc + +arm_codegen_SRC_FILES := \ + ARMAsmBackend.cpp \ + ARMAsmPrinter.cpp \ + ARMBaseInstrInfo.cpp \ + ARMBaseRegisterInfo.cpp \ + ARMCodeEmitter.cpp \ + ARMConstantIslandPass.cpp \ + ARMConstantPoolValue.cpp \ + ARMELFWriterInfo.cpp \ + ARMExpandPseudoInsts.cpp \ + ARMFastISel.cpp \ + ARMFrameInfo.cpp \ + ARMGlobalMerge.cpp \ + ARMISelDAGToDAG.cpp \ + ARMISelLowering.cpp \ + ARMInstrInfo.cpp \ + ARMJITInfo.cpp \ + ARMLoadStoreOptimizer.cpp \ + ARMMCAsmInfo.cpp \ + ARMMCCodeEmitter.cpp\ + ARMMCInstLower.cpp \ + ARMRegisterInfo.cpp \ + ARMSelectionDAGInfo.cpp \ + ARMSubtarget.cpp \ + ARMTargetMachine.cpp \ + ARMTargetObjectFile.cpp \ + InstPrinter/ARMInstPrinter.cpp \ + NEONMoveFix.cpp \ + Thumb1FrameInfo.cpp \ + Thumb1InstrInfo.cpp \ + Thumb1RegisterInfo.cpp \ + Thumb2HazardRecognizer.cpp \ + Thumb2ITBlockPass.cpp \ + Thumb2InstrInfo.cpp \ + Thumb2RegisterInfo.cpp \ + Thumb2SizeReduction.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(arm_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(arm_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/ARM/AsmParser/Android.mk b/lib/Target/ARM/AsmParser/Android.mk new file mode 100644 index 0000000000..552dedda8c --- /dev/null +++ b/lib/Target/ARM/AsmParser/Android.mk @@ -0,0 +1,30 @@ +LOCAL_PATH := $(call my-dir) + +# For the host only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := \ + ARMGenInstrNames.inc \ + ARMGenRegisterNames.inc \ + ARMGenRegisterInfo.h.inc \ + ARMGenAsmMatcher.inc + + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := \ + ARMAsmLexer.cpp \ + ARMAsmParser.cpp + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/ARM/Disassembler/Android.mk b/lib/Target/ARM/Disassembler/Android.mk new file mode 100644 index 0000000000..0e3c32c4d5 --- /dev/null +++ b/lib/Target/ARM/Disassembler/Android.mk @@ -0,0 +1,58 @@ +LOCAL_PATH := $(call my-dir) + +arm_disassembler_TBLGEN_TABLES := \ + ARMGenDecoderTables.inc \ + ARMGenEDInfo.inc \ + ARMGenInstrNames.inc \ + ARMGenInstrInfo.inc \ + ARMGenRegisterNames.inc \ + ARMGenRegisterInfo.h.inc + +arm_disassembler_SRC_FILES := \ + ARMDisassembler.cpp \ + ARMDisassemblerCore.cpp + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMDisassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMDisassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + diff --git a/lib/Target/ARM/InstPrinter/Android.mk b/lib/Target/ARM/InstPrinter/Android.mk new file mode 100644 index 0000000000..3a35023ed6 --- /dev/null +++ b/lib/Target/ARM/InstPrinter/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +arm_asm_printer_TBLGEN_TABLES := \ + ARMGenAsmWriter.inc \ + ARMGenRegisterNames.inc\ + ARMGenInstrNames.inc + +arm_asm_printer_SRC_FILES := \ + ARMInstPrinter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_asm_printer_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMAsmPrinter + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_asm_printer_SRC_FILES) + +LOCAL_C_INCLUDES+= \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) + diff --git a/lib/Target/ARM/TargetInfo/Android.mk b/lib/Target/ARM/TargetInfo/Android.mk new file mode 100644 index 0000000000..e07da39577 --- /dev/null +++ b/lib/Target/ARM/TargetInfo/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +arm_target_info_TBLGEN_TABLES := \ + ARMGenRegisterNames.inc \ + ARMGenInstrNames.inc + +arm_target_info_SRC_FILES := \ + ARMTargetInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMInfo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMInfo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/Android.mk b/lib/Target/Android.mk new file mode 100644 index 0000000000..01b9129c3b --- /dev/null +++ b/lib/Target/Android.mk @@ -0,0 +1,42 @@ +LOCAL_PATH:= $(call my-dir) + +target_SRC_FILES := \ + Mangler.cpp \ + SubtargetFeature.cpp \ + Target.cpp \ + TargetAsmLexer.cpp \ + TargetData.cpp \ + TargetELFWriterInfo.cpp \ + TargetFrameInfo.cpp \ + TargetInstrInfo.cpp \ + TargetIntrinsicInfo.cpp \ + TargetLoweringObjectFile.cpp \ + TargetMachine.cpp \ + TargetRegisterInfo.cpp \ + TargetSubtarget.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(target_SRC_FILES) + +LOCAL_MODULE:= libLLVMTarget + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(target_SRC_FILES) + +LOCAL_MODULE:= libLLVMTarget + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp index eca97ab096..1222180c07 100644 --- a/lib/Target/TargetInstrInfo.cpp +++ b/lib/Target/TargetInstrInfo.cpp @@ -17,6 +17,7 @@ #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/Support/ErrorHandling.h" +#include <ctype.h> using namespace llvm; //===----------------------------------------------------------------------===// diff --git a/lib/Target/X86/Android.mk b/lib/Target/X86/Android.mk new file mode 100644 index 0000000000..a30528b9e2 --- /dev/null +++ b/lib/Target/X86/Android.mk @@ -0,0 +1,72 @@ +LOCAL_PATH := $(call my-dir) + +x86_codegen_TBLGEN_TABLES := \ + X86GenRegisterInfo.h.inc \ + X86GenRegisterNames.inc \ + X86GenRegisterInfo.inc \ + X86GenInstrNames.inc \ + X86GenInstrInfo.inc \ + X86GenDAGISel.inc \ + X86GenFastISel.inc \ + X86GenSubtarget.inc \ + X86GenCallingConv.inc + +x86_codegen_SRC_FILES := \ + SSEDomainFix.cpp \ + X86AsmBackend.cpp \ + X86COFFMachineModuleInfo.cpp \ + X86CodeEmitter.cpp \ + X86ELFWriterInfo.cpp \ + X86FastISel.cpp \ + X86FloatingPoint.cpp\ + X86FrameInfo.cpp \ + X86ISelDAGToDAG.cpp \ + X86ISelLowering.cpp \ + X86InstrInfo.cpp \ + X86JITInfo.cpp \ + X86MCAsmInfo.cpp \ + X86MCCodeEmitter.cpp \ + X86MCInstLower.cpp \ + X86RegisterInfo.cpp \ + X86SelectionDAGInfo.cpp \ + X86Subtarget.cpp \ + X86TargetMachine.cpp \ + X86TargetObjectFile.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMX86CodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMX86CodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/X86/AsmParser/Android.mk b/lib/Target/X86/AsmParser/Android.mk new file mode 100644 index 0000000000..00b06c4b38 --- /dev/null +++ b/lib/Target/X86/AsmParser/Android.mk @@ -0,0 +1,29 @@ +LOCAL_PATH := $(call my-dir) + +# For the device only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := \ + X86GenAsmMatcher.inc \ + X86GenInstrNames.inc \ + X86GenRegisterNames.inc + + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := \ + X86AsmLexer.cpp \ + X86AsmParser.cpp + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86AsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/AsmPrinter/Android.mk b/lib/Target/X86/AsmPrinter/Android.mk new file mode 100644 index 0000000000..3f5538a7ca --- /dev/null +++ b/lib/Target/X86/AsmPrinter/Android.mk @@ -0,0 +1,57 @@ +LOCAL_PATH := $(call my-dir) + +x86_asm_printer_TBLGEN_TABLES := \ + X86GenAsmWriter.inc \ + X86GenAsmWriter1.inc \ + X86GenInstrNames.inc \ + X86GenRegisterNames.inc \ + X86GenRegisterInfo.h.inc + +x86_asm_printer_SRC_FILES := \ + X86AsmPrinter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_asm_printer_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86AsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_asm_printer_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86AsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp new file mode 100644 index 0000000000..d0aa2900c0 --- /dev/null +++ b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp @@ -0,0 +1,722 @@ +//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains a printer that converts from our internal representation +// of machine-dependent LLVM code to X86 machine code. +// +//===----------------------------------------------------------------------===// + +#include "X86AsmPrinter.h" +#include "InstPrinter/X86ATTInstPrinter.h" +#include "InstPrinter/X86IntelInstPrinter.h" +#include "X86MCInstLower.h" +#include "X86.h" +#include "X86COFFMachineModuleInfo.h" +#include "X86MachineFunctionInfo.h" +#include "X86TargetMachine.h" +#include "llvm/CallingConv.h" +#include "llvm/DerivedTypes.h" +#include "llvm/Module.h" +#include "llvm/Type.h" +#include "llvm/Analysis/DebugInfo.h" +#include "llvm/Assembly/Writer.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/CodeGen/MachineJumpTableInfo.h" +#include "llvm/CodeGen/MachineModuleInfoImpls.h" +#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Target/Mangler.h" +#include "llvm/Target/TargetOptions.h" +#include "llvm/Target/TargetRegistry.h" +#include "llvm/ADT/SmallString.h" +using namespace llvm; + +//===----------------------------------------------------------------------===// +// Primitive Helper Functions. +//===----------------------------------------------------------------------===// + +/// runOnMachineFunction - Emit the function body. +/// +bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) { + SetupMachineFunction(MF); + + if (Subtarget->isTargetCOFF()) { + bool Intrn = MF.getFunction()->hasInternalLinkage(); + OutStreamer.BeginCOFFSymbolDef(CurrentFnSym); + OutStreamer.EmitCOFFSymbolStorageClass(Intrn ? COFF::IMAGE_SYM_CLASS_STATIC + : COFF::IMAGE_SYM_CLASS_EXTERNAL); + OutStreamer.EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION + << COFF::SCT_COMPLEX_TYPE_SHIFT); + OutStreamer.EndCOFFSymbolDef(); + } + + // Have common code print out the function header with linkage info etc. + EmitFunctionHeader(); + + // Emit the rest of the function body. + EmitFunctionBody(); + + // We didn't modify anything. + return false; +} + +/// printSymbolOperand - Print a raw symbol reference operand. This handles +/// jump tables, constant pools, global address and external symbols, all of +/// which print to a label with various suffixes for relocation types etc. +void X86AsmPrinter::printSymbolOperand(const MachineOperand &MO, + raw_ostream &O) { + switch (MO.getType()) { + default: llvm_unreachable("unknown symbol type!"); + case MachineOperand::MO_JumpTableIndex: + O << *GetJTISymbol(MO.getIndex()); + break; + case MachineOperand::MO_ConstantPoolIndex: + O << *GetCPISymbol(MO.getIndex()); + printOffset(MO.getOffset(), O); + break; + case MachineOperand::MO_GlobalAddress: { + const GlobalValue *GV = MO.getGlobal(); + + MCSymbol *GVSym; + if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB) + GVSym = GetSymbolWithGlobalValueBase(GV, "$stub"); + else if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || + MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE || + MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE) + GVSym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); + else + GVSym = Mang->getSymbol(GV); + + // Handle dllimport linkage. + if (MO.getTargetFlags() == X86II::MO_DLLIMPORT) + GVSym = OutContext.GetOrCreateSymbol(Twine("__imp_") + GVSym->getName()); + + if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || + MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) { + MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); + MachineModuleInfoImpl::StubValueTy &StubSym = + MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym); + if (StubSym.getPointer() == 0) + StubSym = MachineModuleInfoImpl:: + StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); + } else if (MO.getTargetFlags() == X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE){ + MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); + MachineModuleInfoImpl::StubValueTy &StubSym = + MMI->getObjFileInfo<MachineModuleInfoMachO>().getHiddenGVStubEntry(Sym); + if (StubSym.getPointer() == 0) + StubSym = MachineModuleInfoImpl:: + StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); + } else if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB) { + MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$stub"); + MachineModuleInfoImpl::StubValueTy &StubSym = + MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym); + if (StubSym.getPointer() == 0) + StubSym = MachineModuleInfoImpl:: + StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage()); + } + + // If the name begins with a dollar-sign, enclose it in parens. We do this + // to avoid having it look like an integer immediate to the assembler. + if (GVSym->getName()[0] != '$') + O << *GVSym; + else + O << '(' << *GVSym << ')'; + printOffset(MO.getOffset(), O); + break; + } + case MachineOperand::MO_ExternalSymbol: { + const MCSymbol *SymToPrint; + if (MO.getTargetFlags() == X86II::MO_DARWIN_STUB) { + SmallString<128> TempNameStr; + TempNameStr += StringRef(MO.getSymbolName()); + TempNameStr += StringRef("$stub"); + + MCSymbol *Sym = GetExternalSymbolSymbol(TempNameStr.str()); + MachineModuleInfoImpl::StubValueTy &StubSym = + MMI->getObjFileInfo<MachineModuleInfoMachO>().getFnStubEntry(Sym); + if (StubSym.getPointer() == 0) { + TempNameStr.erase(TempNameStr.end()-5, TempNameStr.end()); + StubSym = MachineModuleInfoImpl:: + StubValueTy(OutContext.GetOrCreateSymbol(TempNameStr.str()), + true); + } + SymToPrint = StubSym.getPointer(); + } else { + SymToPrint = GetExternalSymbolSymbol(MO.getSymbolName()); + } + + // If the name begins with a dollar-sign, enclose it in parens. We do this + // to avoid having it look like an integer immediate to the assembler. + if (SymToPrint->getName()[0] != '$') + O << *SymToPrint; + else + O << '(' << *SymToPrint << '('; + break; + } + } + + switch (MO.getTargetFlags()) { + default: + llvm_unreachable("Unknown target flag on GV operand"); + case X86II::MO_NO_FLAG: // No flag. + break; + case X86II::MO_DARWIN_NONLAZY: + case X86II::MO_DLLIMPORT: + case X86II::MO_DARWIN_STUB: + // These affect the name of the symbol, not any suffix. + break; + case X86II::MO_GOT_ABSOLUTE_ADDRESS: + O << " + [.-" << *MF->getPICBaseSymbol() << ']'; + break; + case X86II::MO_PIC_BASE_OFFSET: + case X86II::MO_DARWIN_NONLAZY_PIC_BASE: + case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: + O << '-' << *MF->getPICBaseSymbol(); + break; + case X86II::MO_TLSGD: O << "@TLSGD"; break; + case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; + case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; + case X86II::MO_TPOFF: O << "@TPOFF"; break; + case X86II::MO_NTPOFF: O << "@NTPOFF"; break; + case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break; + case X86II::MO_GOT: O << "@GOT"; break; + case X86II::MO_GOTOFF: O << "@GOTOFF"; break; + case X86II::MO_PLT: O << "@PLT"; break; + case X86II::MO_TLVP: O << "@TLVP"; break; + case X86II::MO_TLVP_PIC_BASE: + O << "@TLVP" << '-' << *MF->getPICBaseSymbol(); + break; + } +} + +/// print_pcrel_imm - This is used to print an immediate value that ends up +/// being encoded as a pc-relative value. These print slightly differently, for +/// example, a $ is not emitted. +void X86AsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo, + raw_ostream &O) { + const MachineOperand &MO = MI->getOperand(OpNo); + switch (MO.getType()) { + default: llvm_unreachable("Unknown pcrel immediate operand"); + case MachineOperand::MO_Register: + // pc-relativeness was handled when computing the value in the reg. + printOperand(MI, OpNo, O); + return; + case MachineOperand::MO_Immediate: + O << MO.getImm(); + return; + case MachineOperand::MO_MachineBasicBlock: + O << *MO.getMBB()->getSymbol(); + return; + case MachineOperand::MO_GlobalAddress: + case MachineOperand::MO_ExternalSymbol: + printSymbolOperand(MO, O); + return; + } +} + + +void X86AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, + raw_ostream &O, const char *Modifier) { + const MachineOperand &MO = MI->getOperand(OpNo); + switch (MO.getType()) { + default: llvm_unreachable("unknown operand type!"); + case MachineOperand::MO_Register: { + O << '%'; + unsigned Reg = MO.getReg(); + if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) { + EVT VT = (strcmp(Modifier+6,"64") == 0) ? + MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 : + ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8)); + Reg = getX86SubSuperRegister(Reg, VT); + } + O << X86ATTInstPrinter::getRegisterName(Reg); + return; + } + + case MachineOperand::MO_Immediate: + O << '$' << MO.getImm(); + return; + + case MachineOperand::MO_JumpTableIndex: + case MachineOperand::MO_ConstantPoolIndex: + case MachineOperand::MO_GlobalAddress: + case MachineOperand::MO_ExternalSymbol: { + O << '$'; + printSymbolOperand(MO, O); + break; + } + } +} + +void X86AsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, + raw_ostream &O) { + unsigned char value = MI->getOperand(Op).getImm(); + assert(value <= 7 && "Invalid ssecc argument!"); + switch (value) { + case 0: O << "eq"; break; + case 1: O << "lt"; break; + case 2: O << "le"; break; + case 3: O << "unord"; break; + case 4: O << "neq"; break; + case 5: O << "nlt"; break; + case 6: O << "nle"; break; + case 7: O << "ord"; break; + } +} + +void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op, + raw_ostream &O, const char *Modifier) { + const MachineOperand &BaseReg = MI->getOperand(Op); + const MachineOperand &IndexReg = MI->getOperand(Op+2); + const MachineOperand &DispSpec = MI->getOperand(Op+3); + + // If we really don't want to print out (rip), don't. + bool HasBaseReg = BaseReg.getReg() != 0; + if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && + BaseReg.getReg() == X86::RIP) + HasBaseReg = false; + + // HasParenPart - True if we will print out the () part of the mem ref. + bool HasParenPart = IndexReg.getReg() || HasBaseReg; + + if (DispSpec.isImm()) { + int DispVal = DispSpec.getImm(); + if (DispVal || !HasParenPart) + O << DispVal; + } else { + assert(DispSpec.isGlobal() || DispSpec.isCPI() || + DispSpec.isJTI() || DispSpec.isSymbol()); + printSymbolOperand(MI->getOperand(Op+3), O); + } + + if (HasParenPart) { + assert(IndexReg.getReg() != X86::ESP && + "X86 doesn't allow scaling by ESP"); + + O << '('; + if (HasBaseReg) + printOperand(MI, Op, O, Modifier); + + if (IndexReg.getReg()) { + O << ','; + printOperand(MI, Op+2, O, Modifier); + unsigned ScaleVal = MI->getOperand(Op+1).getImm(); + if (ScaleVal != 1) + O << ',' << ScaleVal; + } + O << ')'; + } +} + +void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op, + raw_ostream &O, const char *Modifier) { + assert(isMem(MI, Op) && "Invalid memory reference!"); + const MachineOperand &Segment = MI->getOperand(Op+4); + if (Segment.getReg()) { + printOperand(MI, Op+4, O, Modifier); + O << ':'; + } + printLeaMemReference(MI, Op, O, Modifier); +} + +void X86AsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op, + raw_ostream &O) { + O << *MF->getPICBaseSymbol() << '\n'; + O << *MF->getPICBaseSymbol() << ':'; +} + +bool X86AsmPrinter::printAsmMRegister(const MachineOperand &MO, char Mode, + raw_ostream &O) { + unsigned Reg = MO.getReg(); + switch (Mode) { + default: return true; // Unknown mode. + case 'b': // Print QImode register + Reg = getX86SubSuperRegister(Reg, MVT::i8); + break; + case 'h': // Print QImode high register + Reg = getX86SubSuperRegister(Reg, MVT::i8, true); + break; + case 'w': // Print HImode register + Reg = getX86SubSuperRegister(Reg, MVT::i16); + break; + case 'k': // Print SImode register + Reg = getX86SubSuperRegister(Reg, MVT::i32); + break; + case 'q': // Print DImode register + Reg = getX86SubSuperRegister(Reg, MVT::i64); + break; + } + + O << '%' << X86ATTInstPrinter::getRegisterName(Reg); + return false; +} + +/// PrintAsmOperand - Print out an operand for an inline asm expression. +/// +bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, + const char *ExtraCode, raw_ostream &O) { + // Does this asm operand have a single letter operand modifier? + if (ExtraCode && ExtraCode[0]) { + if (ExtraCode[1] != 0) return true; // Unknown modifier. + + const MachineOperand &MO = MI->getOperand(OpNo); + + switch (ExtraCode[0]) { + default: return true; // Unknown modifier. + case 'a': // This is an address. Currently only 'i' and 'r' are expected. + if (MO.isImm()) { + O << MO.getImm(); + return false; + } + if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol()) { + printSymbolOperand(MO, O); + if (Subtarget->isPICStyleRIPRel()) + O << "(%rip)"; + return false; + } + if (MO.isReg()) { + O << '('; + printOperand(MI, OpNo, O); + O << ')'; + return false; + } + return true; + + case 'c': // Don't print "$" before a global var name or constant. + if (MO.isImm()) + O << MO.getImm(); + else if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol()) + printSymbolOperand(MO, O); + else + printOperand(MI, OpNo, O); + return false; + + case 'A': // Print '*' before a register (it must be a register) + if (MO.isReg()) { + O << '*'; + printOperand(MI, OpNo, O); + return false; + } + return true; + + case 'b': // Print QImode register + case 'h': // Print QImode high register + case 'w': // Print HImode register + case 'k': // Print SImode register + case 'q': // Print DImode register + if (MO.isReg()) + return printAsmMRegister(MO, ExtraCode[0], O); + printOperand(MI, OpNo, O); + return false; + + case 'P': // This is the operand of a call, treat specially. + print_pcrel_imm(MI, OpNo, O); + return false; + + case 'n': // Negate the immediate or print a '-' before the operand. + // Note: this is a temporary solution. It should be handled target + // independently as part of the 'MC' work. + if (MO.isImm()) { + O << -MO.getImm(); + return false; + } + O << '-'; + } + } + + printOperand(MI, OpNo, O); + return false; +} + +bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, + unsigned OpNo, unsigned AsmVariant, + const char *ExtraCode, + raw_ostream &O) { + if (ExtraCode && ExtraCode[0]) { + if (ExtraCode[1] != 0) return true; // Unknown modifier. + + switch (ExtraCode[0]) { + default: return true; // Unknown modifier. + case 'b': // Print QImode register + case 'h': // Print QImode high register + case 'w': // Print HImode register + case 'k': // Print SImode register + case 'q': // Print SImode register + // These only apply to registers, ignore on mem. + break; + case 'P': // Don't print @PLT, but do print as memory. + printMemReference(MI, OpNo, O, "no-rip"); + return false; + } + } + printMemReference(MI, OpNo, O); + return false; +} + +void X86AsmPrinter::EmitStartOfAsmFile(Module &M) { + if (Subtarget->isTargetDarwin()) + OutStreamer.SwitchSection(getObjFileLowering().getTextSection()); +} + + +void X86AsmPrinter::EmitEndOfAsmFile(Module &M) { + if (Subtarget->isTargetDarwin()) { + // All darwin targets use mach-o. + MachineModuleInfoMachO &MMIMacho = + MMI->getObjFileInfo<MachineModuleInfoMachO>(); + + // Output stubs for dynamically-linked functions. + MachineModuleInfoMachO::SymbolListTy Stubs; + + Stubs = MMIMacho.GetFnStubList(); + if (!Stubs.empty()) { + const MCSection *TheSection = + OutContext.getMachOSection("__IMPORT", "__jump_table", + MCSectionMachO::S_SYMBOL_STUBS | + MCSectionMachO::S_ATTR_SELF_MODIFYING_CODE | + MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS, + 5, SectionKind::getMetadata()); + OutStreamer.SwitchSection(TheSection); + + for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { + // L_foo$stub: + OutStreamer.EmitLabel(Stubs[i].first); + // .indirect_symbol _foo + OutStreamer.EmitSymbolAttribute(Stubs[i].second.getPointer(), + MCSA_IndirectSymbol); + // hlt; hlt; hlt; hlt; hlt hlt = 0xf4 = -12. + const char HltInsts[] = { -12, -12, -12, -12, -12 }; + OutStreamer.EmitBytes(StringRef(HltInsts, 5), 0/*addrspace*/); + } + + Stubs.clear(); + OutStreamer.AddBlankLine(); + } + + // Output stubs for external and common global variables. + Stubs = MMIMacho.GetGVStubList(); + if (!Stubs.empty()) { + const MCSection *TheSection = + OutContext.getMachOSection("__IMPORT", "__pointers", + MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS, + SectionKind::getMetadata()); + OutStreamer.SwitchSection(TheSection); + + for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { + // L_foo$non_lazy_ptr: + OutStreamer.EmitLabel(Stubs[i].first); + // .indirect_symbol _foo + MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; + OutStreamer.EmitSymbolAttribute(MCSym.getPointer(), + MCSA_IndirectSymbol); + // .long 0 + if (MCSym.getInt()) + // External to current translation unit. + OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); + else + // Internal to current translation unit. + // + // When we place the LSDA into the TEXT section, the type info + // pointers need to be indirect and pc-rel. We accomplish this by + // using NLPs. However, sometimes the types are local to the file. So + // we need to fill in the value for the NLP in those cases. + OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(), + OutContext), + 4/*size*/, 0/*addrspace*/); + } + Stubs.clear(); + OutStreamer.AddBlankLine(); + } + + Stubs = MMIMacho.GetHiddenGVStubList(); + if (!Stubs.empty()) { + OutStreamer.SwitchSection(getObjFileLowering().getDataSection()); + EmitAlignment(2); + + for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { + // L_foo$non_lazy_ptr: + OutStreamer.EmitLabel(Stubs[i].first); + // .long _foo + OutStreamer.EmitValue(MCSymbolRefExpr:: + Create(Stubs[i].second.getPointer(), + OutContext), + 4/*size*/, 0/*addrspace*/); + } + Stubs.clear(); + OutStreamer.AddBlankLine(); + } + + // Funny Darwin hack: This flag tells the linker that no global symbols + // contain code that falls through to other global symbols (e.g. the obvious + // implementation of multiple entry points). If this doesn't occur, the + // linker can safely perform dead code stripping. Since LLVM never + // generates code that does this, it is always safe to set. + OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); + } + + if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing() && + MMI->callsExternalVAFunctionWithFloatingPointArguments()) { + StringRef SymbolName = Subtarget->is64Bit() ? "_fltused" : "__fltused"; + MCSymbol *S = MMI->getContext().GetOrCreateSymbol(SymbolName); + OutStreamer.EmitSymbolAttribute(S, MCSA_Global); + } + + if (Subtarget->isTargetCOFF()) { + X86COFFMachineModuleInfo &COFFMMI = + MMI->getObjFileInfo<X86COFFMachineModuleInfo>(); + + // Emit type information for external functions + typedef X86COFFMachineModuleInfo::externals_iterator externals_iterator; + for (externals_iterator I = COFFMMI.externals_begin(), + E = COFFMMI.externals_end(); + I != E; ++I) { + OutStreamer.BeginCOFFSymbolDef(CurrentFnSym); + OutStreamer.EmitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_EXTERNAL); + OutStreamer.EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION + << COFF::SCT_COMPLEX_TYPE_SHIFT); + OutStreamer.EndCOFFSymbolDef(); + } + + // Necessary for dllexport support + std::vector<const MCSymbol*> DLLExportedFns, DLLExportedGlobals; + + const TargetLoweringObjectFileCOFF &TLOFCOFF = + static_cast<const TargetLoweringObjectFileCOFF&>(getObjFileLowering()); + + for (Module::const_iterator I = M.begin(), E = M.end(); I != E; ++I) + if (I->hasDLLExportLinkage()) + DLLExportedFns.push_back(Mang->getSymbol(I)); + + for (Module::const_global_iterator I = M.global_begin(), + E = M.global_end(); I != E; ++I) + if (I->hasDLLExportLinkage()) + DLLExportedGlobals.push_back(Mang->getSymbol(I)); + + // Output linker support code for dllexported globals on windows. + if (!DLLExportedGlobals.empty() || !DLLExportedFns.empty()) { + OutStreamer.SwitchSection(TLOFCOFF.getDrectveSection()); + SmallString<128> name; + for (unsigned i = 0, e = DLLExportedGlobals.size(); i != e; ++i) { + if (Subtarget->isTargetWindows()) + name = " /EXPORT:"; + else + name = " -export:"; + name += DLLExportedGlobals[i]->getName(); + if (Subtarget->isTargetWindows()) + name += ",DATA"; + else + name += ",data"; + OutStreamer.EmitBytes(name, 0); + } + + for (unsigned i = 0, e = DLLExportedFns.size(); i != e; ++i) { + if (Subtarget->isTargetWindows()) + name = " /EXPORT:"; + else + name = " -export:"; + name += DLLExportedFns[i]->getName(); + OutStreamer.EmitBytes(name, 0); + } + } + } + + if (Subtarget->isTargetELF()) { + const TargetLoweringObjectFileELF &TLOFELF = + static_cast<const TargetLoweringObjectFileELF &>(getObjFileLowering()); + + MachineModuleInfoELF &MMIELF = MMI->getObjFileInfo<MachineModuleInfoELF>(); + + // Output stubs for external and common global variables. + MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList(); + if (!Stubs.empty()) { + OutStreamer.SwitchSection(TLOFELF.getDataRelSection()); + const TargetData *TD = TM.getTargetData(); + + for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { + OutStreamer.EmitLabel(Stubs[i].first); + OutStreamer.EmitSymbolValue(Stubs[i].second.getPointer(), + TD->getPointerSize(), 0); + } + Stubs.clear(); + } + } +} + +MachineLocation +X86AsmPrinter::getDebugValueLocation(const MachineInstr *MI) const { + MachineLocation Location; + assert (MI->getNumOperands() == 7 && "Invalid no. of machine operands!"); + // Frame address. Currently handles register +- offset only. + + if (MI->getOperand(0).isReg() && MI->getOperand(3).isImm()) + Location.set(MI->getOperand(0).getReg(), MI->getOperand(3).getImm()); + else { + DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n"); + } + return Location; +} + +void X86AsmPrinter::PrintDebugValueComment(const MachineInstr *MI, + raw_ostream &O) { + // Only the target-dependent form of DBG_VALUE should get here. + // Referencing the offset and metadata as NOps-2 and NOps-1 is + // probably portable to other targets; frame pointer location is not. + unsigned NOps = MI->getNumOperands(); + assert(NOps==7); + O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: "; + // cast away const; DIetc do not take const operands for some reason. + DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata())); + if (V.getContext().isSubprogram()) + O << DISubprogram(V.getContext()).getDisplayName() << ":"; + O << V.getName(); + O << " <- "; + // Frame address. Currently handles register +- offset only. + O << '['; + if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg()) + printOperand(MI, 0, O); + else + O << "undef"; + O << '+'; printOperand(MI, 3, O); + O << ']'; + O << "+"; + printOperand(MI, NOps-2, O); +} + + + +//===----------------------------------------------------------------------===// +// Target Registry Stuff +//===----------------------------------------------------------------------===// + +static MCInstPrinter *createX86MCInstPrinter(const Target &T, + unsigned SyntaxVariant, + const MCAsmInfo &MAI) { + if (SyntaxVariant == 0) + return new X86ATTInstPrinter(MAI); + if (SyntaxVariant == 1) + return new X86IntelInstPrinter(MAI); + return 0; +} + +// Force static initialization. +extern "C" void LLVMInitializeX86AsmPrinter() { + RegisterAsmPrinter<X86AsmPrinter> X(TheX86_32Target); + RegisterAsmPrinter<X86AsmPrinter> Y(TheX86_64Target); + + TargetRegistry::RegisterMCInstPrinter(TheX86_32Target,createX86MCInstPrinter); + TargetRegistry::RegisterMCInstPrinter(TheX86_64Target,createX86MCInstPrinter); +} diff --git a/lib/Target/X86/Disassembler/Android.mk b/lib/Target/X86/Disassembler/Android.mk new file mode 100644 index 0000000000..0c657227c7 --- /dev/null +++ b/lib/Target/X86/Disassembler/Android.mk @@ -0,0 +1,55 @@ +LOCAL_PATH := $(call my-dir) + +x86_disassembler_TBLGEN_TABLES := \ + X86GenDisassemblerTables.inc \ + X86GenEDInfo.inc \ + X86GenRegisterNames.inc + +x86_disassembler_SRC_FILES := \ + X86Disassembler.cpp \ + X86DisassemblerDecoder.c + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Disassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Disassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/InstPrinter/Android.mk b/lib/Target/X86/InstPrinter/Android.mk new file mode 100644 index 0000000000..ccc219fb13 --- /dev/null +++ b/lib/Target/X86/InstPrinter/Android.mk @@ -0,0 +1,57 @@ +LOCAL_PATH := $(call my-dir) + +x86_instprinter_TBLGEN_TABLES := \ + X86GenAsmWriter.inc \ + X86GenAsmWriter1.inc \ + X86GenInstrNames.inc \ + X86GenRegisterNames.inc \ + X86GenRegisterInfo.h.inc + +x86_instprinter_SRC_FILES := \ + X86ATTInstPrinter.cpp \ + X86IntelInstPrinter.cpp \ + X86InstComments.cpp + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_instprinter_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_instprinter_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86InstPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_instprinter_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_instprinter_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE := libLLVMX86InstPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp index a553a7c19a..a92a651bda 100644 --- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -21,6 +21,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/FormattedStream.h" #include "X86GenInstrNames.inc" +#include <ctype.h> using namespace llvm; // Include the auto-generated portion of the assembly writer. diff --git a/lib/Target/X86/TargetInfo/Android.mk b/lib/Target/X86/TargetInfo/Android.mk new file mode 100644 index 0000000000..4c99807105 --- /dev/null +++ b/lib/Target/X86/TargetInfo/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +x86_target_info_TBLGEN_TABLES := \ + X86GenRegisterNames.inc \ + X86GenInstrNames.inc + +x86_target_info_SRC_FILES := \ + X86TargetInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Info + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Info + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Transforms/IPO/Android.mk b/lib/Transforms/IPO/Android.mk new file mode 100644 index 0000000000..e7376c7519 --- /dev/null +++ b/lib/Transforms/IPO/Android.mk @@ -0,0 +1,52 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_ipo_SRC_FILES := \ + ArgumentPromotion.cpp \ + ConstantMerge.cpp \ + DeadArgumentElimination.cpp \ + DeadTypeElimination.cpp \ + ExtractGV.cpp \ + FunctionAttrs.cpp \ + GlobalDCE.cpp \ + GlobalOpt.cpp \ + IPConstantPropagation.cpp \ + IPO.cpp \ + InlineAlways.cpp \ + InlineSimple.cpp \ + Inliner.cpp \ + Internalize.cpp \ + LoopExtractor.cpp \ + LowerSetJmp.cpp \ + MergeFunctions.cpp \ + PartialInlining.cpp \ + PartialSpecialization.cpp \ + PruneEH.cpp \ + StripDeadPrototypes.cpp \ + StripSymbols.cpp \ + StructRetPromotion.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_ipo_SRC_FILES) +LOCAL_MODULE:= libLLVMipo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_ipo_SRC_FILES) +LOCAL_MODULE:= libLLVMipo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/InstCombine/Android.mk b/lib/Transforms/InstCombine/Android.mk new file mode 100644 index 0000000000..b30fcd9df5 --- /dev/null +++ b/lib/Transforms/InstCombine/Android.mk @@ -0,0 +1,42 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_inst_combine_SRC_FILES := \ + InstCombineAddSub.cpp \ + InstCombineAndOrXor.cpp \ + InstCombineCalls.cpp \ + InstCombineCasts.cpp \ + InstCombineCompares.cpp \ + InstCombineLoadStoreAlloca.cpp \ + InstCombineMulDivRem.cpp \ + InstCombinePHI.cpp \ + InstCombineSelect.cpp \ + InstCombineShifts.cpp \ + InstCombineSimplifyDemanded.cpp \ + InstCombineVectorOps.cpp \ + InstructionCombining.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_inst_combine_SRC_FILES) +LOCAL_MODULE:= libLLVMInstCombine + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_inst_combine_SRC_FILES) +LOCAL_MODULE:= libLLVMInstCombine + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/Instrumentation/Android.mk b/lib/Transforms/Instrumentation/Android.mk new file mode 100644 index 0000000000..29431edd65 --- /dev/null +++ b/lib/Transforms/Instrumentation/Android.mk @@ -0,0 +1,17 @@ +LOCAL_PATH:= $(call my-dir) + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + EdgeProfiling.cpp \ + ProfilingUtils.cpp \ + OptimalEdgeProfiling.cpp + +LOCAL_MODULE:= libLLVMInstrumentation + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Transforms/Scalar/Android.mk b/lib/Transforms/Scalar/Android.mk new file mode 100644 index 0000000000..25dc32af32 --- /dev/null +++ b/lib/Transforms/Scalar/Android.mk @@ -0,0 +1,61 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_scalar_SRC_FILES := \ + ADCE.cpp \ + BasicBlockPlacement.cpp \ + CodeGenPrepare.cpp \ + ConstantProp.cpp \ + CorrelatedValuePropagation.cpp \ + DCE.cpp \ + DeadStoreElimination.cpp \ + GEPSplitter.cpp \ + GVN.cpp \ + IndVarSimplify.cpp \ + JumpThreading.cpp \ + LICM.cpp \ + LoopDeletion.cpp \ + LoopRotation.cpp \ + LoopStrengthReduce.cpp \ + LoopUnrollPass.cpp \ + LoopUnswitch.cpp \ + LowerAtomic.cpp \ + MemCpyOptimizer.cpp \ + Reassociate.cpp \ + Reg2Mem.cpp \ + SCCP.cpp \ + Scalar.cpp \ + ScalarReplAggregates.cpp \ + SimplifyCFGPass.cpp \ + SimplifyHalfPowrLibCalls.cpp \ + SimplifyLibCalls.cpp \ + Sink.cpp \ + TailDuplication.cpp \ + TailRecursionElimination.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + $(transforms_scalar_SRC_FILES) + +LOCAL_MODULE:= libLLVMScalarOpts + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_scalar_SRC_FILES) +LOCAL_MODULE:= libLLVMScalarOpts + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/Utils/Android.mk b/lib/Transforms/Utils/Android.mk new file mode 100644 index 0000000000..55dadf5d66 --- /dev/null +++ b/lib/Transforms/Utils/Android.mk @@ -0,0 +1,53 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_utils_SRC_FILES := \ + AddrModeMatcher.cpp \ + BasicBlockUtils.cpp \ + BasicInliner.cpp \ + BreakCriticalEdges.cpp \ + BuildLibCalls.cpp \ + CloneFunction.cpp \ + CloneLoop.cpp \ + CloneModule.cpp \ + CodeExtractor.cpp \ + DemoteRegToStack.cpp \ + InlineFunction.cpp \ + InstructionNamer.cpp \ + LCSSA.cpp \ + Local.cpp \ + LoopSimplify.cpp \ + LoopUnroll.cpp \ + LowerInvoke.cpp \ + LowerSwitch.cpp \ + Mem2Reg.cpp \ + PromoteMemoryToRegister.cpp \ + SSAUpdater.cpp \ + SimplifyCFG.cpp \ + UnifyFunctionExitNodes.cpp \ + ValueMapper.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_utils_SRC_FILES) +LOCAL_MODULE:= libLLVMTransformUtils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_utils_SRC_FILES) +LOCAL_MODULE:= libLLVMTransformUtils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/VMCore/Android.mk b/lib/VMCore/Android.mk new file mode 100644 index 0000000000..09b4a0b497 --- /dev/null +++ b/lib/VMCore/Android.mk @@ -0,0 +1,68 @@ +LOCAL_PATH:= $(call my-dir) + +vmcore_SRC_FILES := \ + AsmWriter.cpp \ + Attributes.cpp \ + AutoUpgrade.cpp \ + BasicBlock.cpp \ + ConstantFold.cpp \ + Constants.cpp \ + Core.cpp \ + DebugLoc.cpp \ + Dominators.cpp \ + Function.cpp \ + GVMaterializer.cpp \ + Globals.cpp \ + IRBuilder.cpp \ + InlineAsm.cpp \ + Instruction.cpp \ + Instructions.cpp \ + IntrinsicInst.cpp \ + LLVMContext.cpp \ + LLVMContextImpl.cpp \ + LeakDetector.cpp \ + Metadata.cpp \ + Module.cpp \ + Pass.cpp \ + PassManager.cpp \ + PassRegistry.cpp \ + PrintModulePass.cpp \ + Type.cpp \ + TypeSymbolTable.cpp \ + Use.cpp \ + Value.cpp \ + ValueSymbolTable.cpp \ + ValueTypes.cpp \ + Verifier.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(vmcore_SRC_FILES) + +LOCAL_MODULE:= libLLVMCore + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(vmcore_SRC_FILES) + +LOCAL_MODULE:= libLLVMCore + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/VMCore/LLVMContext.cpp b/lib/VMCore/LLVMContext.cpp index 15ae0ec5d5..707faa8f16 100644 --- a/lib/VMCore/LLVMContext.cpp +++ b/lib/VMCore/LLVMContext.cpp @@ -19,6 +19,7 @@ #include "llvm/Support/ManagedStatic.h" #include "llvm/Support/SourceMgr.h" #include "LLVMContextImpl.h" +#include <ctype.h> using namespace llvm; static ManagedStatic<LLVMContext> GlobalContext; |