diff options
Diffstat (limited to 'lib/Target/IA64/IA64ISelLowering.cpp')
| -rw-r--r-- | lib/Target/IA64/IA64ISelLowering.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp index 8e675eba9a..587860c5b5 100644 --- a/lib/Target/IA64/IA64ISelLowering.cpp +++ b/lib/Target/IA64/IA64ISelLowering.cpp @@ -194,7 +194,7 @@ void IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, switch (getValueType(I->getType()).getSimpleVT()) { default: - LLVM_UNREACHABLE("ERROR in LowerArgs: can't lower this type of arg."); + llvm_unreachable("ERROR in LowerArgs: can't lower this type of arg."); case MVT::f32: // fixme? (well, will need to for weird FP structy stuff, // see intel ABI docs) @@ -298,7 +298,7 @@ void IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, // Finally, inform the code generator which regs we return values in. // (see the ISD::RET: case in the instruction selector) switch (getValueType(F.getReturnType()).getSimpleVT()) { - default: LLVM_UNREACHABLE("i have no idea where to return this type!"); + default: llvm_unreachable("i have no idea where to return this type!"); case MVT::isVoid: break; case MVT::i1: case MVT::i8: @@ -362,7 +362,7 @@ IA64TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, SDValue ValToStore(0, 0), ValToConvert(0, 0); unsigned ObjSize=8; switch (ObjectVT.getSimpleVT()) { - default: LLVM_UNREACHABLE("unexpected argument type!"); + default: llvm_unreachable("unexpected argument type!"); case MVT::i1: case MVT::i8: case MVT::i16: @@ -493,7 +493,7 @@ IA64TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, if (InFlag.getNode()) CallOperands.push_back(InFlag); else - LLVM_UNREACHABLE("this should never happen!"); + llvm_unreachable("this should never happen!"); // to make way for a hack: Chain = DAG.getNode(IA64ISD::BRCALL, dl, NodeTys, @@ -516,7 +516,7 @@ IA64TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, SDValue RetVal; if (RetTyVT != MVT::isVoid) { switch (RetTyVT.getSimpleVT()) { - default: LLVM_UNREACHABLE("Unknown value type to return!"); + default: llvm_unreachable("Unknown value type to return!"); case MVT::i1: { // bools are just like other integers (returned in r8) // we *could* fall through to the truncate below, but this saves a // few redundant predicate ops @@ -573,15 +573,15 @@ SDValue IA64TargetLowering:: LowerOperation(SDValue Op, SelectionDAG &DAG) { DebugLoc dl = Op.getDebugLoc(); switch (Op.getOpcode()) { - default: LLVM_UNREACHABLE("Should not custom lower this!"); + default: llvm_unreachable("Should not custom lower this!"); case ISD::GlobalTLSAddress: - LLVM_UNREACHABLE("TLS not implemented for IA64."); + llvm_unreachable("TLS not implemented for IA64."); case ISD::RET: { SDValue AR_PFSVal, Copy; switch(Op.getNumOperands()) { default: - LLVM_UNREACHABLE("Do not know how to return this many arguments!"); + llvm_unreachable("Do not know how to return this many arguments!"); case 1: AR_PFSVal = DAG.getCopyFromReg(Op.getOperand(0), dl, VirtGPR, MVT::i64); AR_PFSVal = DAG.getCopyToReg(AR_PFSVal.getValue(1), dl, IA64::AR_PFS, |