diff options
Diffstat (limited to 'include/llvm/CodeGen')
| -rw-r--r-- | include/llvm/CodeGen/AsmPrinter.h | 8 | ||||
| -rw-r--r-- | include/llvm/CodeGen/DwarfWriter.h | 2 | ||||
| -rw-r--r-- | include/llvm/CodeGen/LinkAllCodegenComponents.h | 10 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SchedulerRegistry.h | 12 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 4 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 4 |
6 files changed, 20 insertions, 20 deletions
diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 241a998925..c1d86a2190 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -65,8 +65,8 @@ namespace llvm { // Necessary for external weak linkage support std::set<const GlobalValue*> ExtWeakSymbols; - /// OptLevel - Generating code at a specific optimization level. - unsigned OptLevel; + /// Fast - Generating code via fast instruction selection. + bool Fast; public: /// Output stream on which we're printing assembly code. /// @@ -110,8 +110,8 @@ namespace llvm { bool VerboseAsm; protected: - explicit AsmPrinter(raw_ostream &o, TargetMachine &TM, - const TargetAsmInfo *T, unsigned OL, bool V); + AsmPrinter(raw_ostream &o, TargetMachine &TM, + const TargetAsmInfo *T, bool F, bool V); public: virtual ~AsmPrinter(); diff --git a/include/llvm/CodeGen/DwarfWriter.h b/include/llvm/CodeGen/DwarfWriter.h index 5641407001..4b35b288c9 100644 --- a/include/llvm/CodeGen/DwarfWriter.h +++ b/include/llvm/CodeGen/DwarfWriter.h @@ -81,7 +81,7 @@ public: void EndFunction(MachineFunction *MF); /// ValidDebugInfo - Return true if V represents valid debug info value. - bool ValidDebugInfo(Value *V, unsigned OptLevel); + bool ValidDebugInfo(Value *V, bool FastISel); /// RecordSourceLine - Register a source line with debug info. Returns a /// unique label ID used to generate a label and provide correspondence to diff --git a/include/llvm/CodeGen/LinkAllCodegenComponents.h b/include/llvm/CodeGen/LinkAllCodegenComponents.h index 84d9819c2d..74026a4791 100644 --- a/include/llvm/CodeGen/LinkAllCodegenComponents.h +++ b/include/llvm/CodeGen/LinkAllCodegenComponents.h @@ -42,11 +42,11 @@ namespace { llvm::linkOcamlGC(); llvm::linkShadowStackGC(); - (void) llvm::createBURRListDAGScheduler(NULL, 3); - (void) llvm::createTDRRListDAGScheduler(NULL, 3); - (void) llvm::createTDListDAGScheduler(NULL, 3); - (void) llvm::createFastDAGScheduler(NULL, 3); - (void) llvm::createDefaultScheduler(NULL, 3); + (void) llvm::createBURRListDAGScheduler(NULL, false); + (void) llvm::createTDRRListDAGScheduler(NULL, false); + (void) llvm::createTDListDAGScheduler(NULL, false); + (void) llvm::createFastDAGScheduler(NULL, false); + (void) llvm::createDefaultScheduler(NULL, false); } } ForceCodegenLinking; // Force link by creating a global definition. diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h index e02dc7a392..c967bfc446 100644 --- a/include/llvm/CodeGen/SchedulerRegistry.h +++ b/include/llvm/CodeGen/SchedulerRegistry.h @@ -32,7 +32,7 @@ class MachineBasicBlock; class RegisterScheduler : public MachinePassRegistryNode { public: - typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, unsigned); + typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, bool); static MachinePassRegistry Registry; @@ -64,27 +64,27 @@ public: /// createBURRListDAGScheduler - This creates a bottom up register usage /// reduction list scheduler. ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS, - unsigned OptLevel); + bool Fast); /// createTDRRListDAGScheduler - This creates a top down register usage /// reduction list scheduler. ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS, - unsigned OptLevel); + bool Fast); /// createTDListDAGScheduler - This creates a top-down list scheduler with /// a hazard recognizer. ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS, - unsigned OptLevel); + bool Fast); /// createFastDAGScheduler - This creates a "fast" scheduler. /// ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS, - unsigned OptLevel); + bool Fast); /// createDefaultScheduler - This creates an instruction scheduler appropriate /// for the target. ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS, - unsigned OptLevel); + bool Fast); } // end namespace llvm diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index d2d17cfa2e..a350d5fd93 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -202,7 +202,7 @@ public: /// certain types of nodes together, or eliminating superfluous nodes. The /// Level argument controls whether Combine is allowed to produce nodes and /// types that are illegal on the target. - void Combine(CombineLevel Level, AliasAnalysis &AA, unsigned OptLevel); + void Combine(CombineLevel Level, AliasAnalysis &AA, bool Fast); /// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that /// only uses types natively supported by the target. Returns "true" if it @@ -218,7 +218,7 @@ public: /// /// Note that this is an involved process that may invalidate pointers into /// the graph. - void Legalize(bool TypesNeedLegalizing, unsigned OptLevel); + void Legalize(bool TypesNeedLegalizing, bool Fast); /// RemoveDeadNodes - This method deletes all unreachable nodes in the /// SelectionDAG. diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index d8802c7d9d..e6bf8d76f4 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -51,10 +51,10 @@ public: MachineBasicBlock *BB; AliasAnalysis *AA; GCFunctionInfo *GFI; - unsigned OptLevel; + bool Fast; static char ID; - explicit SelectionDAGISel(TargetMachine &tm, unsigned OL = 3); + explicit SelectionDAGISel(TargetMachine &tm, bool fast = false); virtual ~SelectionDAGISel(); TargetLowering &getTargetLowering() { return TLI; } |