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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-21 18:54:25 +0000 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2011-11-14 09:11:01 -0800 |
| commit | 4d2df7abe37c4a77e1f8704e885b8318e69dd70b (patch) | |
| tree | 8d09d19bc8619d8bc6a87d4bb1d6b5927eec557e /lib/Transforms | |
| parent | a55723f31ed5f46e4697f1b27f3d35b11f8a682c (diff) | |
| download | external_llvm-4d2df7abe37c4a77e1f8704e885b8318e69dd70b.tar.gz external_llvm-4d2df7abe37c4a77e1f8704e885b8318e69dd70b.tar.bz2 external_llvm-4d2df7abe37c4a77e1f8704e885b8318e69dd70b.zip | |
ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.
Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms')
0 files changed, 0 insertions, 0 deletions