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| author | Edwin Török <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
|---|---|---|
| committer | Edwin Török <edwintorok@gmail.com> | 2009-07-08 20:53:28 +0000 |
| commit | 4d9756a9843862edb9daddfaa0d8c78ac1c52b32 (patch) | |
| tree | 84addd27fd1610e6e8b5a9a82162914726abab4c /lib/Target/Alpha/AlphaInstrInfo.cpp | |
| parent | baf982b5cb66e22f492741ca30ea4e2d34399674 (diff) | |
| download | external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.tar.gz external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.tar.bz2 external_llvm-4d9756a9843862edb9daddfaa0d8c78ac1c52b32.zip | |
Implement changes from Chris's feedback.
Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 17a9bc2f68..62b5d4c301 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -201,7 +201,7 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, @@ -217,7 +217,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::STQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)); @@ -246,7 +246,7 @@ AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg) .addFrameIndex(FrameIdx).addReg(Alpha::F31); else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); } void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, @@ -261,7 +261,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, else if (RC == Alpha::GPRCRegisterClass) Opc = Alpha::LDQ; else - llvm_report_error("Unhandled register class"); + LLVM_UNREACHABLE("Unhandled register class"); DebugLoc DL = DebugLoc::getUnknownLoc(); MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); |